Prosecution Insights
Last updated: April 19, 2026
Application No. 18/453,606

DAMPING FILTERS FOR REDUCED ELECTROMAGNETIC EMISSIONS

Non-Final OA §102§103
Filed
Aug 22, 2023
Examiner
AL-TAWEEL, MUAAMAR QAHTAN
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Apple Inc.
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
99%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allow Rate
39 granted / 44 resolved
+20.6% vs TC avg
Strong +15% interview lift
Without
With
+15.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
58 currently pending
Career history
102
Total Applications
across all art units

Statute-Specific Performance

§103
51.6%
+11.6% vs TC avg
§102
46.5%
+6.5% vs TC avg
§112
1.8%
-38.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 44 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-4, 7-9, 17 and 19-20 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Wang et al (US Publication No. 20180054184). Regarding claim 1, Wang discloses an electrical system (100, fig. 2 shown below, para. [0019]- [0024]) comprising: an inductive load (210); a switching converter (103) that receives power from a power source (208) and converts it to a voltage or current level (i.e., power converter 103 is the inverter 102) suitable for the inductive load (210) ; a wiring harness (114) having a first end (E1) coupled to an output (E1) of the switching converter (103) and a second end (E2) coupled to the inductive load (210); and an RC filter network (RC3) coupled (i.e., via 224) to at least one end (E1/E2) of the wiring harness (114), the RC filter network (RC3) having a filter capacitance (C) and a damping resistance (R), wherein the filter capacitance (C) and damping resistance (R) are selected to reduce common mode noise (i.e., such as to reduce a common mode noise level, see for example para. [0024]) caused by conducted electromagnetic emissions (i.e., such as of a self-powered active electromagnetic interference (EMI) filter for reducing common mode noise levels in inverters, see for example para. [0018]) associated with switching operation of the switching converter (103). PNG media_image1.png 487 673 media_image1.png Greyscale Regarding claim 2, Wang discloses the electrical system (100, fig. 2 shown above, para. [0019]- [0024]), wherein the RC filter network (RC3) further comprises one or more series combinations (i.e., RC3 = (R-C)//(R-C)//(R-C)) of the filter capacitance (C) and the damping resistance (R). Regarding claim 3, Wang discloses the electrical system (100, fig. 2 shown above, para. [0019]- [0024]), wherein the series combinations (i.e., RC3 = (R-C)//(R-C)//(R-C)) of the filter capacitance (C) and the damping resistance (R) couple each power conductor (i.e., via 224) of the wiring harness (114) to a signal ground (i.e., 218 is grounded) associated with the switching converter (i.e., 103; 218 is grounded with respect to 112) or a chassis ground (i.e., 218 is grounded) associated with the electrical system (i.e., 100; 218 is grounded with respect to 114). Regarding claim 4, Wang discloses the electrical system (100, fig. 2 shown above, para. [0019]- [0024]), wherein the RC filter network (RC3) is coupled (i.e., via 224) in parallel (i.e., RC3 = (R-C)//(R-C)//(R-C)) with the wiring harness (114) coupling a first end (E1) of each power conductor of the wiring harness (114) to a second end (E2) of each power conductor of the wiring harness (i.e., 114; RC3 is clamped to 114 via 224). Regarding claim 7, Wang discloses the electrical system (100, fig. 2 shown above, para. [0019]- [0024]), further comprising a filter (Y) coupled (i.e., Y is clamped to 112 via 224) between an input (X) of the switching converter (103) and the power source (208). Regarding claim 8, Wang discloses the electrical system (100, fig. 2 shown above, para. [0019]- [0024]), wherein the switching converter (103) is an inverter (102). Regarding claim 9, Wang discloses the electrical system (100, fig. 2 shown above, para. [0019]- [0024]), wherein the inductive load (210) is a motor (210). Regarding claim 17, Wang discloses the electrical system (100, fig. 2 shown above, para. [0019]- [0024]), comprising: an inductive load (210); a switching converter (103) that receives power from a power source (208) and converts it to a voltage or current level (i.e., power converter 103 is the inverter 102) suitable for the inductive load (210); a filter (Y) coupled (i.e., Y is clamped to 112 via 224) between the switching converter (103) and the power source (208); a wiring harness (114) having a first end (E1) coupled to an output (E1) of the switching converter (103) and a second end (E2) coupled to the inductive load (210); and an RC filter network (RC3) coupled (i.e., RC3 is clamped to 114 via 224) to at least one end (E1/E2) of the wiring harness (114), the RC filter network (RC3) having a filter capacitance (C) and a damping resistance (R) selected to reduce common mode noise (i.e., such as to reduce a common mode noise level, see for example para. [0024]) caused by conducted electromagnetic emissions (i.e., such as of a self-powered active electromagnetic interference (EMI) filter for reducing common mode noise levels in inverters, see for example para. [0018]) associated with switching operation of the switching converter (103). Regarding claim 19, Wang discloses the electrical system (100, fig. 2 shown above, para. [0019]- [0024]), wherein the RC filter network (RC3) couples each power conductor of the wiring harness (114) to a signal ground (i.e., 218 is grounded) associated with the switching converter (i.e., 103; 218 is grounded with respect to 112) or a chassis ground (i.e., 218 is grounded) associated with the electrical system (i.e., 100; 218 is grounded with respect to 114). Regarding claim 20, Wang discloses the electrical system (100, fig. 2 shown above, para. [0019]- [0024]), wherein the RC filter network (RC3) is coupled (i.e., via 224) in parallel (i.e., RC3 = (R-C)//(R-C)//(R-C)) with the wiring harness (114) coupling a first end (E1) of each power conductor of the wiring harness (114) to a second end (E2) of each power conductor of the wiring harness (i.e., 114; RC3 is clamped to 114 via 224). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 5, 11-12 and 14-16 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al (US Publication No. 20180054184) in view of Higuchi et al (US Publication No. 20110050135). Regarding claim 5, Wang discloses the electrical system (100, fig. 2 shown above, para. [0019]- [0024]). Wang does not explicitly disclose further comprising at least one of a first inductance coupled between the output of the switching converter and the first end of the wiring harness and a second inductance coupled between the second end of the wiring harness and the inductive load. Higuchi discloses (fig. 1 shown below, para. [0031]- [0037]) an output filter includes a polyphase common-mode filter having a polyphase common-mode choke connected to an output of a power converter. Wherein; further comprising at least one of a first inductance (121) coupled between the output (u, v, w) of the switching converter (101) and the first end (E11) of the wiring harness (WH) and a second inductance (131) coupled between the second end (E22) of the wiring harness (WH) and the inductive load (102). PNG media_image2.png 448 677 media_image2.png Greyscale It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the inductance devices in Wang, as taught by Higuchi, as it provides the advantage of optimizing the circuit design towards protecting the switching devices and improving the quality of the output power. Regarding claim 11, Wang in view of Higuchi and the teachings of Wang as modified by Higuchi have been discussed above. Wang further discloses (100, fig. 2 shown above, para. [0019]- [0024]); an electrical system (100) comprising: an inductive load (210); a switching converter (103) that receives power from a power source (208) and converts it to a voltage or current level (i.e., power converter 103 is the inverter 102) suitable for the inductive load (210); a wiring harness (114) having a first end (E1) coupled to an output (E1) of the switching converter (103) and a second end (E2) coupled to the inductive load (210); the RC filter network (RC3) further comprising a filter capacitance (C) and a damping resistance (R) selected to reduce common mode noise (i.e., such as to reduce a common mode noise level, see for example para. [0024]) caused by conducted electromagnetic emissions (i.e., such as of a self-powered active electromagnetic interference (EMI) filter for reducing common mode noise levels in inverters, see for example para. [0018]) associated with switching operation of the switching converter (103) Higuchi furthermore discloses (fig. 1 shown above, para. [0031]- [0037]); a first output inductance (121) coupled between the switching converter (101) and the first end (E11) of the wiring harness (WH); and an RC filter network (150) coupled (i.e., via 104 and 122) to the first output inductance (121) and the first end (E11) of the wiring harness (WH). Regarding claim 12, Wang in view of Higuchi and the teachings of Wang as modified by Higuchi have been discussed above. Wang discloses (100, fig. 2 shown above, para. [0019]- [0024]); further comprising a filter (Y) coupled (i.e., via 224) between the switching converter (103) and the power source (208). Regarding claim 14, Wang in view of Higuchi and the teachings of Wang as modified by Higuchi have been discussed above. Higuchi discloses (fig. 1 shown above, para. [0031]- [0037]); wherein the first output inductance (121) is a common mode choke (i.e., such as the polyphase common-mode filter 120 includes a polyphase common-mode choke 121, see for example para. [0033]). Regarding claim 15, Wang in view of Higuchi and the teachings of Wang as modified by Higuchi have been discussed above. Higuchi discloses (fig. 1 shown above, para. [0031]- [0037]); further comprising a second output inductance (131) coupled between the second end (E22) of the wiring harness (WH) and the inductive load (102). Regarding claim 16, Wang in view of Higuchi and the teachings of Wang as modified by Higuchi have been discussed above. Wang discloses (100, fig. 2 shown above, para. [0019]- [0024]); wherein the RC filter network (RC3) further comprises a series combination (i.e., RC3 = (R-C)//(R-C)//(R-C)) of a filter capacitance (C) and a damping resistance (R) coupling (i.e., RC3 is clamped to 114 via 224) each power conductor of the wiring harness (114) to a signal ground (i.e., 218 is grounded) associated with the switching converter (i.e., 103; 218 is grounded with respect to 112) or a chassis ground (i.e., 218 is grounded) associated with the electrical system (i.e., 100; 218 is grounded with respect to 114). Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al (US Publication No. 20180054184) in view of Higuchi et al (US Publication No. 20110050135) and further in view of Chen (US Publication No. 20140218132). Regarding claim 6, Wang in view of Higuchi and the teachings of Wang as modified by Higuchi have been discussed above. Neither Wang nor Higuchi explicitly disclose wherein at least one of the first and second inductances is selected from the group consisting of: discrete inductors, ferrite beads, and a common mode choke. Chen discloses a system, hybrid common mode choke, and method that include a differential signal transmitter and a differential signal receiver (126, fig. 1, para. [0021]- [0026]); wherein at least one of the first and second inductances is selected from the group consisting of: discrete inductors, ferrite beads, and a common mode choke (i.e., such as in comparison to the discrete common mode chokes, other discrete components, such as ceramic capacitors, ferrite beads, and inductors, are each less than two cents per unit. By reducing the number of discrete common mode chokes in each computing device, the overall cost of the computing device may also be reduced, see for example para. [0012]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the inductor device to be selected form a list of (discrete inductors, ferrite beads, and a common mode choke) in Wang, as taught by Chen, as it provides the advantage of optimizing the circuit design towards reducing the manufacturing overall cost. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al (US Publication No. 20180054184) in view of Mirafzal et al (US Patent No. 8373952). Regarding claim 10, Wang discloses the electrical system (100, fig. 2 shown above, para. [0019]- [0024]). Wang does not explicitly disclose wherein the switching converter is a solenoid. Mirafzal discloses an integrated DC link inductor and current sensor winding having a core that includes at least two primary legs and at least one secondary leg (10, fig. 1, Col. 3 lines 34+); wherein the switching converter is a solenoid (i.e., such as integrated gate bipolar junction transistors, solid state relays, transistors, solenoids, and/or various types of electromechanical inverter switches, see for example Col. 4 line 34). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the solenoid in Wang, as taught by Mirafzal, as it provides the advantage of optimizing the circuit design towards efficient simplicity with the lowest possible cost. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al (US Publication No. 20180054184) in view of Higuchi et al (US Publication No. 20110050135) and further in view of Ganev et al (US Publication No. 20090290392). Regarding claim 13, Wang in view of Higuchi and the teachings of Wang as modified by Higuchi have been discussed above. Neither Wang nor Higuchi explicitly disclose wherein the filter coupled between the switching converter and the power source as an input inductance. Ganev discloses an active electromagnetic interference (EMI) filtering may reduce the requirements for high current differential mode inductors (fig. 1, shown below, para. [0033]); wherein the filter (F) coupled between the switching converter (10) and the power source (18) is an input inductance (L). PNG media_image3.png 471 637 media_image3.png Greyscale It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the LISN device in Wang, as taught by Ganev, as it provides the advantage of optimizing the circuit design towards minimizing the parasitic capacitance and improving the signal quality. Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al (US Publication No. 20180054184) in view of Ganev et al (US Publication No. 20090290392). Regarding claim 18, Wang discloses the electrical system (100, fig. 2 shown above, para. [0019]- [0024]). Wang does not explicitly disclose wherein the filter coupled between the switching converter and the power source is an input inductance. Ganev discloses an active electromagnetic interference (EMI) filtering may reduce the requirements for high current differential mode inductors (fig. 1, shown above, para. [0033]); wherein the filter (F) coupled between the switching converter (10) and the power source (18) is an input inductance (L). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the LISN device in Wang, as taught by Ganev, as it provides the advantage of optimizing the circuit design towards minimizing the parasitic capacitance and improving the signal quality. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MUAAMAR Q AL-TAWEEL whose telephone number is (571)270-0339. The examiner can normally be reached 0730-1700. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu V Tran can be reached at (571) 270- 1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MUAAMAR QAHTAN AL-TAWEEL/Examiner, Art Unit 2838 /THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Aug 22, 2023
Application Filed
Sep 11, 2025
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
99%
With Interview (+15.2%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 44 resolved cases by this examiner. Grant probability derived from career allow rate.

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