DETAILED ACTION
This is the initial Office action based on the application filed on August 22, 2023.
Claims 1-20 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 2-3, 8-9, 13, and 17-18 are objected to because of the following informalities:
Claim 2, line 2, recites “the corresponding one of the default usage codes.” It should read – a corresponding one of the default usage codes --.
Claim 3, lines 5-6, and Claim 17, line 9, recite “the corresponding one of the firmware images.” It should read – a corresponding one of the firmware images --.
Claims 8-9, line 20 & line 27 respectively, and Claims 17-18, line 8 & line 16 respectively, recite “each of the information areas.” It should read -- the information area --.
Claim 9, line 25 & line 28, and Claim 18, lines 13-14 & line 17, recite “each of the main program areas.” It should read -- the main program area --.
Claim 13, lines 23-24, recite “the one of the firmware images.” It should read – one of firmware images --.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 3-4 and 13-14 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Claim 3, line 5, and Claim 13, line 23, recite the limitation “the image version.” There is insufficient antecedent basis for this limitation in the claim. In the interest of compact prosecution, the Examiner subsequently interprets the limitation as – an image version – in Claims 3 and 13.
Claim 4 depends on Claim 3. Therefore, Claim 4 suffers the same deficiency as Claim 3.
Claim 14 depends on Claim 13. Therefore, Claim 14 suffers the same deficiency as Claim 13.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 12-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
Claim Interpretation: Under the broadest reasonable interpretation (BRI), the limitations of Claim 12 are presumed to have their plain meaning consistent with the specification as it would be interpreted by one of ordinary skill in the art. See MPEP § 2111.
Step 1: Claim 12 is directed to a method, which is a process (a series of steps or acts), and falls within one of the statutory categories of invention.
Step 2A, Prong One: Claim 12 recites the limitations:
determining whether the firmware image matches one of default usage codes in a support list according to the user code;
determining a corresponding one of target devices suitable for the firmware image according to the one of the default usage codes matched with the user code if the firmware image matches the one of the default usage codes in the support list, wherein the corresponding one of the target devices is one of a first logic circuit of a first module and a second logic circuit of a second module.
These recited steps, under the broadest reasonable interpretation (BRI), cover performance of the steps in the human mind alone or with the aid of pen and paper.
Nothing in the claim precludes the steps from practically being performed in the human mind alone using observation, evaluation, judgment, and opinion or with the aid of pen and paper. For example, the limitation (a) in the context of the claim encompasses a human observing default usage codes, user code, and a firmware image using observation, evaluation, judgment, and opinion to mentally determine if a firmware image matches one of the default usage codes according to a user code. And the limitation (b) in the context of the claim encompasses a human observing target devices, a firmware image, and a matched default usage code using observation, evaluation, judgment, and opinion to mentally determine a corresponding one of target devices suitable for the firmware image. See MPEP § 2106.04(a)(2)(III).
If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the human mind alone or with the aid of pen and paper but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
Step 2A, Prong Two: This judicial exception is not integrated into a practical application. In particular, the claim recites the additional element:
reading a user code stored in a firmware image.
The additional element (1) is mere data gathering recited at a high level of generality, and thus is insignificant extra-solution activity. See MPEP § 2106.05(g). Furthermore, all uses of the recited judicial exception require such data gathering, and, as such, the additional element does not impose any meaningful limits on the claim. The additional elements amount to necessary data gathering. See MPEP § 2106.05.
Also, the claim recites the additional element:
controlling one of a first selection circuit and a second selection circuit correspondingly according to the one of the default usage codes matched with the user code.
The additional element (2) fails to meaningfully limit the claim because it does not require any particular application of the judicial exception and is, at best, the equivalent of merely adding the words “apply it” (or an equivalent) to the judicial exception. See MPEP § 2106.05(f). The additional element recites only the idea of controlling one of a first selection circuit and a second selection circuit without details on how this is accomplished. The claim omits any details as to how the controlling solves a technical problem, and instead recites only the idea of a solution or outcome. Therefore, the additional element attempts to cover any solution to the identified problem of controlling one of a first selection circuit and a second selection circuit with no restriction on how the controlling is accomplished and no description of the mechanism for accomplishing the controlling, and does not integrate a judicial exception into a practical application because this type of recitation is equivalent to the words “apply it.”
Accordingly, even when viewed in combination, the additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea.
Step 2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception because the additional elements when considered both individually and as a combination do not amount to significantly more than the abstract idea. As discussed above with respect to integration of the abstract idea into a practical application, the claim recites the additional element:
reading a user code stored in a firmware image.
The additional element (1) simply appends well-understood, routine, and conventional activities previously known to the industry, specified at a high level of generality, to the judicial exception is not indicative of an inventive concept. MPEP § 2106.05(d)(II) expressly states that the courts have recognized the computer function of receiving or transmitting data over a network, e.g., using the Internet to gather data as a well‐understood, routine, and conventional computer function when it is claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activities. Thus, a person of ordinary skill in the art would readily comprehend that it is well-understood, routine, and conventional in the computing art to read a user code (data) in a firmware image. Therefore, the limitations remains an insignificant extra-solution activity even upon reconsideration and do not amount to significantly more.
Also, the claim recites the additional element:
controlling one of a first selection circuit and a second selection circuit correspondingly according to the one of the default usage codes matched with the user code.
The additional element (2) does not require any particular application of the judicial exception and is, at best, the equivalent of merely adding the words “apply it” (or an equivalent) to the judicial exception. The analysis under Step 2A, Prong Two is carried through to Step 2B. Therefore, the additional element attempts to cover any solution to the identified problem of controlling one of a first selection circuit and a second selection circuit with no restriction on how the controlling is accomplished and no description of the mechanism for accomplishing the controlling, and does not provide significantly more because this type of recitation is equivalent to the words “apply it.”
Thus, taken alone, the additional elements do not amount to significantly more than the above-identified judicial exception (the abstract idea). Looking at the additional elements as a combination adds nothing that is not already present when looking at the additional elements taken individually. Even when considered in combination, the additional elements represent mere instructions to apply a judicial exception using generic computer components, insignificant extra-solution activities, and only the idea of a solution or outcome, and therefore do not provide an inventive concept. The claim is not patent eligible.
Claims 13-20 are rejected under 35 U.S.C. 101 as directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more for at least the reasons stated above.
Claim 13 recites the limitation:
wherein each of the default usage codes is configured to indicate a project code for the image version of the one of the firmware images.
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Claim 14 recites the limitation:
wherein the project code is configured to indicate a module hardware version, a firmware version, or a module hardware version and a firmware version corresponding to the corresponding one of the target devices burned by the firmware image.
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Claim 15 recites the limitation:
wherein the first logic circuit and the second logic circuit have the same product-identification feature.
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Claim 16 recites the limitation:
the first logic circuit and the second logic circuit have the same manufacturer ID, the same product ID, the same product name, the same product model, or any combination thereof.
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Claim 17 recites the limitation:
wherein each of the firmware images includes an information area and a main program area, each of the information areas has information of the corresponding one of the firmware images and information of the corresponding one of the target devices, and the user code is stored in the information area of the corresponding one of the firmware images to indicate the information of the corresponding one of the target devices.
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Claim 18 recites the limitations:
wherein each of the main program areas has hexadecimal data generated by a logic code of the corresponding one of the firmware images;
wherein, data in each of the information areas is capable of being read directly, while data in each of the main program areas is capable of being read and executed by the corresponding one of the target devices after being parsed.
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Claim 19 recites the limitation:
generating a first control signal or a second control signal correspondingly according to the corresponding one of the target devices corresponding to the one of the default usage codes matched with the user code; wherein the first control signal corresponds to the first logic circuit, and the second control signal corresponds to the second logic circuit.
<<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>> + <<>>
Claim 20 recites the limitation:
controlling the first logic circuit or the second logic circuit to be electrically connected to a control circuit correspondingly according to the first control signal or the second control signal generated by the control circuit.
These claims are dependent on Claim 12, but do not add any feature or subject matter that would solve the judicial exception deficiencies of Claim 12.
Claims 13-18 (additional element (a) recited in Claims 13-17, additional elements (a) and (b) recited in Claim 18) recite limitations that further limit the mental steps recited in Claim 12 which can be practically performed in the human mind alone using observation, evaluation, judgment, and opinion or with the aid of pen and paper and thus, fail to make the claim any less abstract (see MPEP § 2106.04(a)(2)(III)). Specifically, Claims 13-14 and 17-18 further limit the “determining whether the firmware image matches one of default usage codes […]” step of Claim 12 and Claims 15-16 further limit the “determining a corresponding one of target devices […]” step of Claim 12.
Claims 19-20 recite further additional elements that do not integrate the judicial exception into a practical application of the judicial exception. Specifically, the additional element (a) recited in Claim 19 and the additional element (a) recited in Claim 20 fail to meaningfully limit the claim because they do not require any particular application of the judicial exception and are, at best, the equivalent of merely adding the words “apply it” (or an equivalent) to the judicial exception. See MPEP § 2106.05(f).
Therefore, Claims 13-20 when considered both individually and as a combination fail to integrate the abstract idea into a practical application.
The additional elements recited in Claims 13-20 are also not sufficient to amount to significantly more than the judicial exception. Specifically, Claims 13-18 (additional element (a) recited in Claims 13-17, additional elements (a) and (b) recited in Claim 18) do not amount to significantly more than the abstract idea because they recite limitations that further limit the mental steps recited in Claim 12 that fail to make the claim any less abstract.
The additional element (a) recited in Claim 19 and the additional element (a) recited in Claim 20 do not amount to significantly more than the abstract idea because they do not require any particular application of the judicial exception and is, at best, the equivalent of merely adding the words “apply it” (or an equivalent) to the judicial exception. See MPEP § 2106.05(f).
Therefore, Claims 13-20 do not add any steps or additional elements, when considered both individually and as a combination, that amount to significantly more than the above-identified judicial exception that would convert Claim 12 into patent-eligible subject matter.
Claims 12-20 are therefore not drawn to patent-eligible subject matter as they are directed to an abstract idea without significantly more.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 7, 10-12, and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over US 2012/0198434 (hereinafter “Dirstine”) in view of US 10,860,305 (Provided by Applicant’s IDS, hereinafter “Harland”).
As per Claim 1, Dirstine discloses:
A server system (abstract, “A networked firmware management system is operable to manage firmware in one or more target devices […].”) comprising:
a first module (Figure 1) comprising:
a first logic circuit (Figure 1; paragraph [0049], “The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate targets and is updated on the targets. Targets can include, but are not limited to, the gateway devices 102 or the network devices 103 shown in FIG. 1 (emphasis added).”); and
a second module (Figure 1) comprising:
a second logic circuit (Figure 1; paragraph [0049], “The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate targets and is updated on the targets. Targets can include, but are not limited to, the gateway devices 102 or the network devices 103 shown in FIG. 1 (emphasis added).”);
a control circuit, wherein the control circuit is configured to update a firmware of the first logic circuit and a firmware of the second logic circuit (Figures 1, 4, & 5; paragraph [0049], “The firmware identifying information extracted from the received firmware file is compared to the file name specification stored in the file name specification table on the server 401, and any matches are identified. The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate targets and is updated on the targets. Targets can include, but are not limited to, the gateway devices 102 or the network devices 103 shown in FIG. 1 (emphasis added).”; paragraph [0041], “Each individual device that is to be upgraded can propagate an acknowledgement that the entire virtual bundled firmware update has been received that that it is awaiting an execute or all-ready command to begin the installation of the update. The execute command can be coordinated and provided by the server [control circuit] 101 or a gateway 102 (emphasis added).”); and
a storage circuit electrically connected to the control circuit and configured to store a support list, wherein the support list has default usage codes, each of the default usage codes corresponds to at least one of firmware images, each of the firmware images stores a user code, each of the default usage codes indicates a corresponding one of target devices, and each of the target devices is one of the first logic circuit and the second logic circuit (Figure 5; paragraph [0047], “In operation, the server 401 establishes communication with a gateway device 402, and the gateway device 402 sends device identification information to the server 401. This includes firmware metadata, including a file name specification for one or more firmware targets on the gateway 402. The file name specification [default usage code] is stored in a file name specification table [support list] in the server 401, where it can be used for associating received firmware files with various gateway firmware targets (emphasis added).”; paragraph [0051], “The server stores the file name specification in a file name specification table at 502, and associates the stored specification with the specific device and in some further embodiments a specific firmware target on the device (emphasis added).”; paragraph [0048], “When the server 401 obtains new firmware, such as by user-initiated or automatic downloading of firmware from a remote server 403 such as the utility or appliance company servers in the example of FIG. 1, firmware identifying information [user code] is extracted from the firmware. This includes in this example examination of the firmware's file name, but in other examples will include other characteristics such as a character string within the firmware, file type or extension, image bundle identifier, or other such characteristics (emphasis added).”; paragraph [0052], “The server receives a firmware update at 503, such as by a user retrieving a firmware file from a third-party website, or automated querying and download of new firmware images from a third-party server (emphasis added).”) [Examiner’s Remarks: Note that Dirstine discloses the server storing a table (support list). One of ordinary skill in the art would readily comprehend that in order for a server to store a table, the server has to be electrically connected to a storage circuit.];
wherein the control circuit is further configured to read the user code stored in each of the firmware images and is further configured to determine whether each of the firmware images matches any one of the default usage codes in the support list according to the user code (paragraph [0049], “The firmware identifying information [user code] extracted from the received firmware file is compared to the file name specification [default usage code] stored in the file name specification table on the server 401, and any matches are identified. The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate targets and is updated on the targets (emphasis added).”; paragraph [0052], “The server receives a firmware update at 503, such as by a user retrieving a firmware file from a third-party website, or automated querying and download of new firmware images from a third-party server (emphasis added).”).
Dirstine discloses “the first logic circuit,” “the second logic circuit,” and “a control circuit,” but does not explicitly disclose:
a first selection circuit electrically connected to the first logic circuit and configured to select a transmission target of the first logic circuit according to a first control signal;
a second logic circuit electrically connected to the first logic circuit;
a second selection circuit electrically connected to the second logic circuit and configured to select a transmission target of the second logic circuit according to a second control signal;
a control circuit electrically connected to the first selection circuit and the second selection circuit, wherein the control circuit is configured to generate the first control signal and the second control signal.
However, Harland discloses:
a first selection circuit electrically connected to the first logic circuit and configured to select a transmission target of the first logic circuit according to a first control signal (Figure 6: 606, 610; col. 5 lines 3-10, “Different accessibilities to different regions of the non-volatile memory at different times by different components may be controlled by the peripheral device and the programmable logic device. In some embodiments, the server includes one or more multiplexers [selection circuit] to selectively couple the non-volatile memory with different hardware devices based on control signals received from the programmable logic device (emphasis added).”; col. 19 lines 13-19, “The switches 610, 612 and 614 may be controlled by the programmable logic device 616 or the peripheral device 618, using control signals such as, but not limited to, a GPIO signal. In some embodiments, the switches 610, 612 and 614 may be configured to enable or disable communications between the processor(s) 606, the BMC 608, and the corresponding non-volatile memories 622 and 624.”; col. 24 lines 20-30, “For example, in order to update the processor(s) 606, the peripheral device 618 may establish a parallel communication channel with the non-volatile memory 622 using the programmable logic device 616, and the switches 610 and 614. The peripheral device 618 may selectively control the switches 610, 612 and 614 in order to communicate with the non-volatile memories corresponding to the hardware devices. The peripheral device 618 may store the firmware data on the non-volatile memory corresponding to the hardware device to update the firmware (emphasis added).”) [Examiner’s Remarks: Note that Dirstine discloses multiplexers selectively coupling non-volatile memory with different hardware devices based on control signals and that firmware data may be stored on non-volatile memory corresponding to a hardware device. One of ordinary skill in the art would readily comprehend that selectively coupling the non-volatile memory with different hardware device is selecting a transmission target for the firmware data.];
a second logic circuit electrically connected to the first logic circuit (Figure 6: 606, 608, 616);
a second selection circuit electrically connected to the second logic circuit and configured to select a transmission target of the second logic circuit according to a second control signal (Figure 6: 608, 612; col. 5 lines 3-10, “Different accessibilities to different regions of the non-volatile memory at different times by different components may be controlled by the peripheral device and the programmable logic device. In some embodiments, the server includes one or more multiplexers [selection circuit] to selectively couple the non-volatile memory with different hardware devices based on control signals received from the programmable logic device (emphasis added).”; col. 19 lines 13-19, “The switches 610, 612 and 614 may be controlled by the programmable logic device 616 or the peripheral device 618, using control signals such as, but not limited to, a GPIO signal. In some embodiments, the switches 610, 612 and 614 may be configured to enable or disable communications between the processor(s) 606, the BMC 608, and the corresponding non-volatile memories 622 and 624.”; col. 24 lines 20-30, “For example, in order to update the processor(s) 606, the peripheral device 618 may establish a parallel communication channel with the non-volatile memory 622 using the programmable logic device 616, and the switches 610 and 614. The peripheral device 618 may selectively control the switches 610, 612 and 614 in order to communicate with the non-volatile memories corresponding to the hardware devices. The peripheral device 618 may store the firmware data on the non-volatile memory corresponding to the hardware device to update the firmware (emphasis added).”) [Examiner’s Remarks: Note that Dirstine discloses multiplexers selectively coupling non-volatile memory with different hardware devices based on control signals and that firmware data may be stored on non-volatile memory corresponding to a hardware device. One of ordinary skill in the art would readily comprehend that selectively coupling the non-volatile memory with different hardware device is selecting a transmission target for the firmware data.];
a control circuit electrically connected to the first selection circuit and the second selection circuit (Figure 6: 610, 612, 616), wherein the control circuit is configured to generate the first control signal and the second control signal (col. 24 lines 47-55, “In an embodiment, the processor(s) 606 may be communicably coupled to the non-volatile memory 622 through the switch 610. The switch 610 selectively couples the processor(s) 606 to the non-volatile memory 622 based on a control signal 630 received from the programmable logic device 616. In some embodiments, the control signal 630 may be generated by the programmable logic device 616 based on instructions received from the peripheral device 618 (emphasis added).”; col. 5 lines 6-10, “In some embodiments, the server includes one or more multiplexers [first and second selection circuits] to selectively couple the non-volatile memory with different hardware devices based on control signals [first and second control signals] received from the programmable logic device (emphasis added).”).
Dirstine is within the same field of endeavor as the claimed invention regarding updating firmware of devices. Harland is within the same field of endeavor as the claimed invention regarding generating control signals and updating firmware.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Harland into the teaching of Dirstine to include “a first selection circuit electrically connected to the first logic circuit and configured to select a transmission target of the first logic circuit according to a first control signal; a second logic circuit electrically connected to the first logic circuit; a second selection circuit electrically connected to the second logic circuit and configured to select a transmission target of the second logic circuit according to a second control signal; a control circuit electrically connected to the first selection circuit and the second selection circuit, wherein the control circuit is configured to generate the first control signal and the second control signal.” The modification would be obvious because one of ordinary skill in the art would be motivated to utilize a system that generates control signals in order to effectively automate decision-making by directing the circuits on what to do such as selectively coupling circuits and controlling accessibility to data to improve security (Harland, col. 5 lines 3-10, col. 18 lines 43-48, & col. 19 lines 13-19).
As per Claim 2, the rejection of Claim 1 is incorporated; and Dirstine discloses “[…] according to the corresponding one of the default usage codes matched with the user code (paragraph [0049], “The firmware identifying information [user code] extracted from the received firmware file is compared to the file name specification [default usage code] stored in the file name specification table on the server 401, and any matches are identified. The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate targets and is updated on the targets. Targets can include, but are not limited to, the gateway devices 102 or the network devices 103 shown in FIG. 1 (emphasis added).”),” but does not explicitly disclose:
wherein the control circuit is further configured to control one of the first selection circuit and the second selection circuit correspondingly according to the corresponding one of the default usage codes matched with the user code.
However, Harland discloses:
wherein the control circuit is further configured to control one of the first selection circuit and the second selection circuit correspondingly according to the corresponding [control signals] (col. 19 lines 13-19, “The switches 610, 612 and 614 may be controlled by the programmable logic device 616 or the peripheral device 618, using control signals such as, but not limited to, a GPIO signal. In some embodiments, the switches 610, 612 and 614 may be configured to enable or disable communications between the processor(s) 606, the BMC 608, and the corresponding non-volatile memories 622 and 624 (emphasis added).”; col. 5 lines 6-10, “In some embodiments, the server includes one or more multiplexers to selectively couple the non-volatile memory with different hardware devices based on control signals received from the programmable logic device (emphasis added).”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Harland into the teaching of Dirstine to include “wherein the control circuit is further configured to control one of the first selection circuit and the second selection circuit correspondingly according to the corresponding one of the default usage codes matched with the user code.” The modification would be obvious because one of ordinary skill in the art would be motivated to utilize a system that generates control signals in order to effectively automate decision-making by directing the circuits on what to do such as selectively coupling circuits, effectively enabling/disabling communication, and controlling accessibility to data to improve security (Harland, col. 5 lines 3-10, col. 18 lines 43-48, & col. 19 lines 13-19).
As per Claim 7, the rejection of Claim 1 is incorporated; and Dirstine further discloses:
wherein the control circuit is electrically connected to a remote device, and the control circuit is further configured to receive each of the firmware images transmitted by the remote device (paragraph [0048], “When the server 401 obtains new firmware, such as by user-initiated or automatic downloading of firmware from a remote server 403 such as the utility or appliance company servers in the example of FIG. 1 […].”; paragraph [0052], “The server receives a firmware update at 503, such as by a user retrieving a firmware file from a third-party website, or automated querying and download of new firmware images from a third-party server.”).
As per Claim 10, the rejection of Claim 1 is incorporated; and Dirstine discloses “[…] according to the corresponding one of the target devices corresponding to the corresponding one of the default usage codes matched with the user code (paragraph [0049], “The firmware identifying information [user code] extracted from the received firmware file is compared to the file name specification [default usage code] stored in the file name specification table on the server 401, and any matches are identified. The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate targets and is updated on the targets. Targets can include, but are not limited to, the gateway devices 102 or the network devices 103 shown in FIG. 1 (emphasis added).”; paragraph [0051], “The server stores the file name specification in a file name specification table at 502, and associates the stored specification with the specific device and in some further embodiments a specific firmware target on the device (emphasis added).”),” but does not explicitly disclose:
wherein the control circuit is further configured to generate the first control signal or the second control signal correspondingly according to the corresponding one of the target devices corresponding to the corresponding one of the default usage codes matched with the user code;
wherein the first control signal corresponds to the first logic circuit, and the second control signal corresponds to the second logic circuit.
However, Harland discloses:
wherein the control circuit is further configured to generate the first control signal or the second control signal correspondingly according to the corresponding one of the target devices (Figure 6; col. 24 lines 47-55, “In an embodiment, the processor(s) 606 may be communicably coupled to the non-volatile memory 622 through the switch 610. The switch 610 selectively couples the processor(s) 606 to the non-volatile memory 622 based on a control signal 630 received from the programmable logic device 616. In some embodiments, the control signal 630 may be generated by the programmable logic device 616 based on instructions received from the peripheral device 618 (emphasis added).”; col. 5 lines 6-10, “In some embodiments, the server includes one or more multiplexers to selectively couple the non-volatile memory with different hardware devices based on control signals received from the programmable logic device (emphasis added).”);
wherein the first control signal corresponds to the first logic circuit, and the second control signal corresponds to the second logic circuit (Figure 6; col. 5 lines 6-10, “In some embodiments, the server includes one or more multiplexers to selectively couple the non-volatile memory with different hardware devices based on control signals received from the programmable logic device (emphasis added).”; col. 24 lines 47-55, “In an embodiment, the processor(s) 606 may be communicably coupled to the non-volatile memory 622 through the switch 610. The switch 610 selectively couples the processor(s) 606 to the non-volatile memory 622 based on a control signal 630 received from the programmable logic device 616. In some embodiments, the control signal 630 may be generated by the programmable logic device 616 based on instructions received from the peripheral device 618 (emphasis added).”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Harland into the teaching of Dirstine to include “wherein the control circuit is further configured to generate the first control signal or the second control signal correspondingly according to the corresponding one of the target devices corresponding to the corresponding one of the default usage codes matched with the user code; wherein the first control signal corresponds to the first logic circuit, and the second control signal corresponds to the second logic circuit.” The modification would be obvious because one of ordinary skill in the art would be motivated to utilize a system that generates control signals in order to effectively automate decision-making by directing the circuits on what to do such as selectively coupling circuits, effectively enabling/disabling communication, and controlling accessibility to data to improve security (Harland, col. 5 lines 3-10, col. 18 lines 43-48, & col. 19 lines 13-19).
As per Claim 11, the rejection of Claim 10 is incorporated; and Dirstine discloses “the first logic circuit or the second logic circuit to be electrically connected to the control circuit (Figure 1; paragraph [0049], “The firmware identifying information extracted from the received firmware file is compared to the file name specification stored in the file name specification table on the server 401, and any matches are identified. The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate targets and is updated on the targets (emphasis added).”),” but does not explicitly disclose:
wherein the control circuit controls the first logic circuit or the second logic circuit to be electrically connected to the control circuit correspondingly according to the first control signal or the second control signal.
However, Harland discloses:
wherein the control circuit controls the first logic circuit or the second logic circuit to be electrically connected to [a circuit] correspondingly according to the first control signal or the second control signal (col. 5 lines 6-10, “In some embodiments, the server includes one or more multiplexers to selectively couple the non-volatile memory with different hardware devices based on control signals received from the programmable logic device (emphasis added).”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Harland into the teaching of Dirstine to include “wherein the control circuit controls the first logic circuit or the second logic circuit to be electrically connected to the control circuit correspondingly according to the first control signal or the second control signal.” The modification would be obvious because one of ordinary skill in the art would be motivated to utilize a system that generates control signals in order to effectively automate decision-making by directing the circuits on what to do such as selectively coupling circuits, effectively enabling/disabling communication, and controlling accessibility to data to improve security (Harland, col. 5 lines 3-10, col. 18 lines 43-48, & col. 19 lines 13-19).
As per Claim 12, Dirstine discloses:
A firmware updating method comprising:
reading a user code stored in a firmware image (paragraph [0048], “When the server 401 obtains new firmware, such as by user-initiated or automatic downloading of firmware from a remote server 403 such as the utility or appliance company servers in the example of FIG. 1, firmware identifying information [user code] is extracted from the firmware. This includes in this example examination of the firmware's file name, but in other examples will include other characteristics such as a character string within the firmware, file type or extension, image bundle identifier, or other such characteristics (emphasis added).”; paragraph [0049], “The firmware identifying information [user code] extracted from the received firmware file is compared to the file name specification stored in the file name specification table on the server 401, and any matches are identified (emphasis added).”; paragraph [0052], “The server receives a firmware update at 503, such as by a user retrieving a firmware file from a third-party website, or automated querying and download of new firmware images from a third-party server (emphasis added).”);
determining whether the firmware image matches one of default usage codes in a support list according to the user code (Figure 5; paragraph [0049], “The firmware identifying information [user code] extracted from the received firmware file is compared to the file name specification [default usage code] stored in the file name specification table on the server 401, and any matches are identified. The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate targets and is updated on the targets (emphasis added).”; paragraph [0052], “The server receives a firmware update at 503, such as by a user retrieving a firmware file from a third-party website, or automated querying and download of new firmware images from a third-party server (emphasis added).”);
determining a corresponding one of target devices suitable for the firmware image according to the one of the default usage codes matched with the user code if the firmware image matches the one of the default usage codes in the support list, wherein the corresponding one of the target devices is one of a first logic circuit of a first module and a second logic circuit of a second module (Figures 1 & 5; paragraph [0049], “The firmware identifying information [user code] extracted from the received firmware file is compared to the file name specification [default usage code] stored in the file name specification table on the server 401, and any matches are identified. The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate [suitable] targets and is updated on the targets. Targets can include, but are not limited to, the gateway devices 102 or the network devices 103 shown in FIG. 1 (emphasis added).”; paragraph [0047], “In operation, the server 401 establishes communication with a gateway device 402, and the gateway device 402 sends device identification information to the server 401. This includes firmware metadata, including a file name specification for one or more firmware targets on the gateway 402. The file name specification [default usage code] is stored in a file name specification table [support list] in the server 401, where it can be used for associating received firmware files with various gateway firmware targets (emphasis added).”; paragraph [0051], “The server stores the file name specification in a file name specification table at 502, and associates the stored specification with the specific device and in some further embodiments a specific firmware target on the device (emphasis added).”; paragraph [0048], “When the server 401 obtains new firmware, such as by user-initiated or automatic downloading of firmware from a remote server 403 such as the utility or appliance company servers in the example of FIG. 1, firmware identifying information [user code] is extracted from the firmware. This includes in this example examination of the firmware's file name, but in other examples will include other characteristics such as a character string within the firmware, file type or extension, image bundle identifier, or other such characteristics (emphasis added).”; paragraph [0052], “The server receives a firmware update at 503, such as by a user retrieving a firmware file from a third-party website, or automated querying and download of new firmware images from a third-party server (emphasis added).”).
Dirstine discloses “[…] according to the one of the default usage codes matched with the user code,” but does not explicitly disclose:
controlling one of a first selection circuit and a second selection circuit correspondingly according to the one of the default usage codes matched with the user code.
However, Harland discloses:
controlling one of a first selection circuit and a second selection circuit correspondingly according to the [control signals] (col. 19 lines 13-19, “The switches 610, 612 and 614 may be controlled by the programmable logic device 616 or the peripheral device 618, using control signals such as, but not limited to, a GPIO signal. In some embodiments, the switches 610, 612 and 614 may be configured to enable or disable communications between the processor(s) 606, the BMC 608, and the corresponding non-volatile memories 622 and 624 (emphasis added).”; col. 5 lines 6-10, “In some embodiments, the server includes one or more multiplexers to selectively couple the non-volatile memory with different hardware devices based on control signals received from the programmable logic device (emphasis added).”).
Dirstine is within the same field of endeavor as the claimed invention regarding updating firmware of devices. Harland is within the same field of endeavor as the claimed invention regarding generating control signals and updating firmware.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Harland into the teaching of Dirstine to include “controlling one of a first selection circuit and a second selection circuit correspondingly according to the one of the default usage codes matched with the user code.” The modification would be obvious because one of ordinary skill in the art would be motivated to utilize a system that generates control signals in order to effectively automate decision-making by directing the circuits on what to do such as selectively coupling circuits, effectively enabling/disabling communication, and controlling accessibility to data to improve security (Harland, col. 5 lines 3-10, col. 18 lines 43-48, & col. 19 lines 13-19).
As per Claim 19, the rejection of Claim 12 is incorporated; and Dirstine discloses “[…] according to the corresponding one of the target devices corresponding to the one of the default usage codes matched with the user code (paragraph [0049], “The firmware identifying information [user code] extracted from the received firmware file is compared to the file name specification [default usage code] stored in the file name specification table on the server 401, and any matches are identified. The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate targets and is updated on the targets. Targets can include, but are not limited to, the gateway devices 102 or the network devices 103 shown in FIG. 1 (emphasis added).”; paragraph [0051], “The server stores the file name specification in a file name specification table at 502, and associates the stored specification with the specific device and in some further embodiments a specific firmware target on the device (emphasis added).”),” but does not explicitly disclose:
generating a first control signal or a second control signal correspondingly according to the corresponding one of the target devices corresponding to the one of the default usage codes matched with the user code;
wherein the first control signal corresponds to the first logic circuit, and the second control signal corresponds to the second logic circuit.
However, Harland discloses:
generating a first control signal or a second control signal correspondingly according to the corresponding one of the target devices (Figure 6; col. 24 lines 47-55, “In an embodiment, the processor(s) 606 may be communicably coupled to the non-volatile memory 622 through the switch 610. The switch 610 selectively couples the processor(s) 606 to the non-volatile memory 622 based on a control signal 630 received from the programmable logic device 616. In some embodiments, the control signal 630 may be generated by the programmable logic device 616 based on instructions received from the peripheral device 618 (emphasis added).”; col. 5 lines 6-10, “In some embodiments, the server includes one or more multiplexers to selectively couple the non-volatile memory with different hardware devices based on control signals received from the programmable logic device (emphasis added).”);
wherein the first control signal corresponds to the first logic circuit, and the second control signal corresponds to the second logic circuit (Figure 6; col. 5 lines 6-10, “In some embodiments, the server includes one or more multiplexers to selectively couple the non-volatile memory with different hardware devices based on control signals received from the programmable logic device (emphasis added).”; col. 24 lines 47-55, “In an embodiment, the processor(s) 606 may be communicably coupled to the non-volatile memory 622 through the switch 610. The switch 610 selectively couples the processor(s) 606 to the non-volatile memory 622 based on a control signal 630 received from the programmable logic device 616. In some embodiments, the control signal 630 may be generated by the programmable logic device 616 based on instructions received from the peripheral device 618 (emphasis added).”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Harland into the teaching of Dirstine to include “generating a first control signal or a second control signal correspondingly according to the corresponding one of the target devices corresponding to the one of the default usage codes matched with the user code; wherein the first control signal corresponds to the first logic circuit, and the second control signal corresponds to the second logic circuit.” The modification would be obvious because one of ordinary skill in the art would be motivated to utilize a system that generates control signals in order to effectively automate decision-making by directing the circuits on what to do such as selectively coupling circuits, effectively enabling/disabling communication, and controlling accessibility to data to improve security (Harland, col. 5 lines 3-10, col. 18 lines 43-48, & col. 19 lines 13-19).
As per Claim 20, the rejection of Claim 19 is incorporated; and Dirstine discloses “the first logic circuit or the second logic circuit to be electrically connected to a control circuit (Figure 1; paragraph [0049], “The firmware identifying information extracted from the received firmware file is compared to the file name specification stored in the file name specification table on the server 401, and any matches are identified. The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate targets and is updated on the targets (emphasis added).”),” but does not explicitly disclose:
controlling the first logic circuit or the second logic circuit to be electrically connected to a control circuit correspondingly according to the first control signal or the second control signal generated by the control circuit.
However, Harland discloses:
controlling the first logic circuit or the second logic circuit to be electrically connected to a [circuit] correspondingly according to the first control signal or the second control signal generated by the control circuit (col. 5 lines 6-10, “In some embodiments, the server includes one or more multiplexers to selectively couple the non-volatile memory with different hardware devices based on control signals received from the programmable logic device (emphasis added).”; col. 24 lines 47-55, “In an embodiment, the processor(s) 606 may be communicably coupled to the non-volatile memory 622 through the switch 610. The switch 610 selectively couples the processor(s) 606 to the non-volatile memory 622 based on a control signal 630 received from the programmable logic device 616. In some embodiments, the control signal 630 may be generated by the programmable logic device 616 based on instructions received from the peripheral device 618 (emphasis added).”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Harland into the teaching of Dirstine to include “controlling the first logic circuit or the second logic circuit to be electrically connected to a control circuit correspondingly according to the first control signal or the second control signal generated by the control circuit.” The modification would be obvious because one of ordinary skill in the art would be motivated to utilize a system that generates control signals in order to effectively automate decision-making by directing the circuits on what to do such as selectively coupling circuits, effectively enabling/disabling communication, and controlling accessibility to data to improve security (Harland, col. 5 lines 3-10, col. 18 lines 43-48, & col. 19 lines 13-19).
Claims 3-4 and 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Dirstine in view of Harland as applied to Claims 1 and 12 above, and further in view of US 2023/0079673 (hereinafter “Bhat”).
As per Claim 3, the rejection of Claim 1 is incorporated; and the combination of Dirstine and Harland does not explicitly disclose:
wherein each of the default usage codes is configured to indicate a project code for the image version of the corresponding one of the firmware images.
However, Bhat discloses:
wherein each of the default usage codes is configured to indicate a project code for the image version of the corresponding one of the firmware images (paragraph [0050], “Preferably, each firmware image 112 is generated as a self-contained executable file that may include a vector table, headers, code and data sections, a version number, and a CRC of the firmware image 112. Once a firmware image 112 is built, it is programmed, or “burned,” into the memory 102 (emphasis added).”).
Bhat is within the same field of endeavor as the claimed invention regarding the utilization of firmware versions.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Bhat into the combined teachings of Dirstine and Harland to include “wherein each of the default usage codes is configured to indicate a project code for the image version of the corresponding one of the firmware images.” The modification would be obvious because one of ordinary skill in the art would be motivated include a firmware version number in order to effectively track updates and distinguish between different firmware images (Bhat, paragraph [0050]).
As per Claim 4, the rejection of Claim 3 is incorporated; and the combination of Dirstine and Harland does not explicitly disclose:
wherein the project code is configured to indicate a module hardware version, a firmware version, or a module hardware version and a firmware version corresponding to the corresponding one of the target devices burned by the corresponding one of the firmware images.
However, Bhat discloses:
wherein the project code is configured to indicate a module hardware version, a firmware version, or a module hardware version and a firmware version corresponding to the corresponding one of the target devices burned by the corresponding one of the firmware images (paragraph [0050], “Preferably, each firmware image 112 is generated as a self-contained executable file that may include a vector table, headers, code and data sections, a version number, and a CRC of the firmware image 112. Once a firmware image 112 is built, it is programmed, or “burned,” into the memory 102 (emphasis added).”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Bhat into the combined teachings of Dirstine and Harland to include “wherein the project code is configured to indicate a module hardware version, a firmware version, or a module hardware version and a firmware version corresponding to the corresponding one of the target devices burned by the corresponding one of the firmware images.” The modification would be obvious because one of ordinary skill in the art would be motivated include a firmware version number in order to effectively track updates and distinguish between different firmware images (Bhat, paragraph [0050]).
As per Claim 13, the rejection of Claim 12 is incorporated; and the combination of Dirstine and Harland does not explicitly disclose:
wherein each of the default usage codes is configured to indicate a project code for the image version of the one of the firmware images.
However, Bhat discloses:
wherein each of the default usage codes is configured to indicate a project code for the image version of the one of the firmware images (paragraph [0050], “Preferably, each firmware image 112 is generated as a self-contained executable file that may include a vector table, headers, code and data sections, a version number, and a CRC of the firmware image 112. Once a firmware image 112 is built, it is programmed, or “burned,” into the memory 102 (emphasis added).”).
Bhat is within the same field of endeavor as the claimed invention regarding the utilization of firmware image versions.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Bhat into the combined teachings of Dirstine and Harland to include “wherein each of the default usage codes is configured to indicate a project code for the image version of the one of the firmware images.” The modification would be obvious because one of ordinary skill in the art would be motivated include a firmware version number in order to effectively track updates and distinguish between different firmware images (Bhat, paragraph [0050]).
As per Claim 14, the rejection of Claim 13 is incorporated; and the combination of Dirstine and Harland does not explicitly disclose:
wherein the project code is configured to indicate a module hardware version, a firmware version, or a module hardware version and a firmware version corresponding to the corresponding one of the target devices burned by the firmware image.
However, Bhat discloses:
wherein the project code is configured to indicate a module hardware version, a firmware version, or a module hardware version and a firmware version corresponding to the corresponding one of the target devices burned by the firmware image (paragraph [0050], “Preferably, each firmware image 112 is generated as a self-contained executable file that may include a vector table, headers, code and data sections, a version number, and a CRC of the firmware image 112. Once a firmware image 112 is built, it is programmed, or “burned,” into the memory 102 (emphasis added).”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Bhat into the combined teachings of Dirstine and Harland to include “wherein the project code is configured to indicate a module hardware version, a firmware version, or a module hardware version and a firmware version corresponding to the corresponding one of the target devices burned by the firmware image.” The modification would be obvious because one of ordinary skill in the art would be motivated include a firmware version number in order to effectively track updates and distinguish between different firmware images (Bhat, paragraph [0050]).
Claims 5-6 and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Dirstine in view of Harland as applied to Claims 1 and 12 above, and further in view of US 2020/0050447 (hereinafter “Yoshimi”).
As per Claim 5, the rejection of Claim 1 is incorporated; and the combination of Dirstine and Harland does not explicitly disclose:
wherein the first logic circuit and the second logic circuit have the same product-identification feature.
However, Yoshimi discloses:
wherein the first logic circuit and the second logic circuit have the same product-identification feature (Figure 8; abstract, “[…] specify, for each setting place, firmware version information of a same model among devices included in the device information associated with one kind of the identification information based on the identification information and the device information stored in the memory, and execute update processing of firmware of the device of the same model based on the specified firmware version information (emphasis added).”; paragraph [0066], “When receiving update information of firmware from the device management apparatus 2, the information receiving section 42 specifies the device 6 having old version of firmware among the devices 6 of the same model present in the other datacenters 5 using the user information DB 32 and the device information DB 33 (emphasis added).”).
Yoshimi is within the same field of endeavor as the claimed invention regarding updating firmware.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Yoshimi into the combined teachings of Dirstine and Harland to include “wherein the first logic circuit and the second logic circuit have the same product-identification feature.” The modification would be obvious because one of ordinary skill in the art would be motivated to keep track of devices with the same model in order to more effectively update the firmware of devices by utilizing their model information even if the devices are in a plurality of datacenters (Yoshimi, abstract & paragraphs [0008 & 0065]).
As per Claim 6, the rejection of Claim 5 is incorporated; and the combination of Dirstine and Harland does not explicitly disclose:
wherein the first logic circuit and the second logic circuit have the same manufacturer ID, the same product ID, the same product name, the same product model, or any combination thereof.
However, Yoshimi discloses:
wherein the first logic circuit and the second logic circuit have the same manufacturer ID, the same product ID, the same product name, the same product model, or any combination thereof (Figure 8; abstract, “[…] specify, for each setting place, firmware version information of a same model among devices included in the device information associated with one kind of the identification information based on the identification information and the device information stored in the memory, and execute update processing of firmware of the device of the same model based on the specified firmware version information (emphasis added).”; paragraph [0066], “When receiving update information of firmware from the device management apparatus 2, the information receiving section 42 specifies the device 6 having old version of firmware among the devices 6 of the same model present in the other datacenters 5 using the user information DB 32 and the device information DB 33 (emphasis added).”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Yoshimi into the combined teachings of Dirstine and Harland to include “wherein the first logic circuit and the second logic circuit have the same manufacturer ID, the same product ID, the same product name, the same product model, or any combination thereof.” The modification would be obvious because one of ordinary skill in the art would be motivated to keep track of devices with the same model in order to more effectively update the firmware of devices by utilizing their model information even if the devices are in a plurality of datacenters (Yoshimi, abstract & paragraphs [0008 & 0065]).
As per Claim 15, the rejection of Claim 12 is incorporated; and the combination of Dirstine and Harland does not explicitly disclose:
wherein the first logic circuit and the second logic circuit have the same product-identification feature.
However, Yoshimi discloses:
wherein the first logic circuit and the second logic circuit have the same product-identification feature (Figure 8; abstract, “[…] specify, for each setting place, firmware version information of a same model among devices included in the device information associated with one kind of the identification information based on the identification information and the device information stored in the memory, and execute update processing of firmware of the device of the same model based on the specified firmware version information (emphasis added).”).
Yoshimi is within the same field of endeavor as the claimed invention regarding updating firmware.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Yoshimi into the combined teachings of Dirstine and Harland to include “wherein the first logic circuit and the second logic circuit have the same product-identification feature.” The modification would be obvious because one of ordinary skill in the art would be motivated to keep track of devices with the same model in order to more effectively update the firmware of devices by utilizing their model information even if the devices are in a plurality of datacenters (Yoshimi, abstract & paragraphs [0008 & 0065]).
As per Claim 16, the rejection of Claim 15 is incorporated; and the combination of Dirstine and Harland does not explicitly disclose:
the first logic circuit and the second logic circuit have the same manufacturer ID, the same product ID, the same product name, the same product model, or any combination thereof.
However, Yoshimi discloses:
the first logic circuit and the second logic circuit have the same manufacturer ID, the same product ID, the same product name, the same product model, or any combination thereof (Figure 8; abstract, “[…] specify, for each setting place, firmware version information of a same model among devices included in the device information associated with one kind of the identification information based on the identification information and the device information stored in the memory, and execute update processing of firmware of the device of the same model based on the specified firmware version information (emphasis added).”; paragraph [0066], “When receiving update information of firmware from the device management apparatus 2, the information receiving section 42 specifies the device 6 having old version of firmware among the devices 6 of the same model present in the other datacenters 5 using the user information DB 32 and the device information DB 33 (emphasis added).”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Yoshimi into the combined teachings of Dirstine and Harland to include “the first logic circuit and the second logic circuit have the same manufacturer ID, the same product ID, the same product name, the same product model, or any combination thereof.” The modification would be obvious because one of ordinary skill in the art would be motivated to keep track of devices with the same model in order to more effectively update the firmware of devices by utilizing their model information even if the devices are in a plurality of datacenters (Yoshimi, abstract & paragraphs [0008 & 0065]).
Claims 8 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Dirstine in view of Harland as applied to Claims 1 and 12 above, and further in view of US 2022/0179960 (hereinafter “Spangler”).
As per Claim 8, the rejection of Claim 1 is incorporated; and Dirstine discloses “wherein each of the firmware images includes an information area […], each of the information areas has information of the corresponding one of the firmware images and information of the corresponding one of the target devices, and the user code is stored in the information area of the corresponding one of the firmware images to indicate the information of the corresponding one of the target devices (paragraph [0047], “In operation, the server 401 establishes communication with a gateway device 402, and the gateway device 402 sends device identification information to the server 401. This includes firmware metadata, including a file name specification for one or more firmware targets on the gateway 402. The file name specification is stored in a file name specification table in the server 401, where it can be used for associating received firmware files with various gateway firmware targets (emphasis added).”; paragraph [0051], “The server stores the file name specification in a file name specification table at 502, and associates the stored specification with the specific device and in some further embodiments a specific firmware target on the device (emphasis added).”; paragraph [0048], “When the server 401 obtains new firmware, such as by user-initiated or automatic downloading of firmware from a remote server 403 such as the utility or appliance company servers in the example of FIG. 1, firmware identifying information is extracted from the firmware (emphasis added).”; paragraph [0049], “The firmware identifying information [information of the corresponding firmware image and information of the corresponding one of the target devices] extracted from the received firmware file is compared to the file name specification stored in the file name specification table on the server 401, and any matches are identified (emphasis added).”),” but the combination of Dirstine and Harland does not explicitly disclose:
wherein each of the firmware images includes an information area and a main program area, each of the information areas has information of the corresponding one of the firmware images and information of the corresponding one of the target devices, and the user code is stored in the information area of the corresponding one of the firmware images to indicate the information of the corresponding one of the target devices.
However, Spangler discloses:
wherein each of the firmware images includes an information area and a main program area (paragraph [0043], “The read-only portion of the system firmware stored at the memory 106 may include a body section and a header section (emphasis added).”).
Spangler is within the same field of endeavor as the claimed invention regarding reading data stored in firmware images.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Spangler into the combined teachings of Dirstine and Harland to include “wherein each of the firmware images includes an information area and a main program area, each of the information areas has information of the corresponding one of the firmware images and information of the corresponding one of the target devices, and the user code is stored in the information area of the corresponding one of the firmware images to indicate the information of the corresponding one of the target devices.” The modification would be obvious because one of ordinary skill in the art would be motivated to utilize a system that reads the header and body of firmware and parses the body to verify the firmware before executing it in order to improve usability, customization, and user control over the firmware executing in the system and help prevent executing potentially corrupted or malicious firmware (Spangler, abstract & paragraphs [0002, 0070, & 0073]).
As per Claim 17, the rejection of Claim 12 is incorporated; and Dirstine discloses “wherein each of the firmware images includes an information area […], each of the information areas has information of the corresponding one of the firmware images and information of the corresponding one of the target devices, and the user code is stored in the information area of the corresponding one of the firmware images to indicate the information of the corresponding one of the target devices (paragraph [0047], “In operation, the server 401 establishes communication with a gateway device 402, and the gateway device 402 sends device identification information to the server 401. This includes firmware metadata, including a file name specification for one or more firmware targets on the gateway 402. The file name specification is stored in a file name specification table in the server 401, where it can be used for associating received firmware files with various gateway firmware targets (emphasis added).”; paragraph [0051], “The server stores the file name specification in a file name specification table at 502, and associates the stored specification with the specific device and in some further embodiments a specific firmware target on the device (emphasis added).”; paragraph [0048], “When the server 401 obtains new firmware, such as by user-initiated or automatic downloading of firmware from a remote server 403 such as the utility or appliance company servers in the example of FIG. 1, firmware identifying information is extracted from the firmware (emphasis added).”; paragraph [0049], “The firmware identifying information [information of the corresponding firmware image and information of the corresponding one of the target devices] extracted from the received firmware file is compared to the file name specification stored in the file name specification table on the server 401, and any matches are identified (emphasis added).”),” but the combination of Dirstine and Harland does not explicitly disclose:
wherein each of the firmware images includes an information area and a main program area, each of the information areas has information of the corresponding one of the firmware images and information of the corresponding one of the target devices, and the user code is stored in the information area of the corresponding one of the firmware images to indicate the information of the corresponding one of the target devices.
However, Spangler discloses:
wherein each of the firmware images includes an information area and a main program area (paragraph [0043], “The read-only portion of the system firmware stored at the memory 106 may include a body section and a header section (emphasis added).”).
Spangler is within the same field of endeavor as the claimed invention regarding reading data stored in firmware images.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Spangler into the combined teachings of Dirstine and Harland to include “wherein each of the firmware images includes an information area and a main program area, each of the information areas has information of the corresponding one of the firmware images and information of the corresponding one of the target devices, and the user code is stored in the information area of the corresponding one of the firmware images to indicate the information of the corresponding one of the target devices.” The modification would be obvious because one of ordinary skill in the art would be motivated to utilize a system that reads the header and body of firmware and parses the body to verify the firmware before executing it in order to improve usability, customization, and user control over the firmware executing in the system and help prevent executing potentially corrupted or malicious firmware (Spangler, abstract & paragraphs [0002, 0070, & 0073]).
Claims 9 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Dirstine in view of Harland and Spangler as applied to Claims 8 and 17 above, and further in view of US 8,078,861 (hereinafter “Jarrett”).
As per Claim 9, the rejection of Claim 8 is incorporated; and Dirstine discloses “corresponding one of the firmware images (paragraph [0049], “The firmware identifying information extracted from the received firmware file is compared to the file name specification stored in the file name specification table on the server 401, and any matches are identified. The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate targets and is updated on the targets.”; paragraph [0052], “The server receives a firmware update at 503, such as by a user retrieving a firmware file from a third-party website, or automated querying and download of new firmware images from a third-party server (emphasis added).”)” and “corresponding one of the target devices (paragraph [0049], “The firmware identifying information extracted from the received firmware file is compared to the file name specification stored in the file name specification table on the server 401, and any matches are identified. The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate targets and is updated on the targets.”),” but the combination of Dirstine and Harland does not explicitly disclose:
wherein each of the main program areas has hexadecimal data generated by a logic code of the corresponding one of the firmware images;
wherein, data in each of the information areas is capable of being read directly, while data in each of the main program areas is capable of being read and executed by the corresponding one of the target devices after being parsed.
However, Spangler discloses:
wherein, data in each of the information areas is capable of being read directly, while data in each of the main program areas is capable of being read and executed by the corresponding one of the target devices after being parsed (paragraph [0043 & 0045], “The read-only portion of the system firmware stored at the memory 106 may include a body section and a header section. The header section can include information such as: A version number to associate the firmware with a specific device-model and to differentiate the system firmware from other versions intended to execute on other device models (emphasis added).”; paragraph [0070], “[…] the security processor 108 can verify the firmware including generating a hash of the firmware and comparing the generated hash to an expected hash the security processor 108 extracts [parses] from a body section of the firmware stored in the memory 106 (emphasis added).”; paragraph [0072], “As a condition to executing the system firmware and recovery firmware, the security processor 108 compares generated hash values of the blocks of system firmware and recovery firmware that are currently stored in the memory 106, to the predetermined, expected hash values embedded in the system firmware and recovery firmware (emphasis added).”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Spangler into the combined teachings of Dirstine and Harland to include “wherein, data in each of the information areas is capable of being read directly, while data in each of the main program areas is capable of being read and executed by the corresponding one of the target devices after being parsed.” The modification would be obvious because one of ordinary skill in the art would be motivated to utilize a system that reads the header and body of firmware and parses the body to verify the firmware before executing it in order to improve usability, customization, and user control over the firmware executing in the system and help prevent executing potentially corrupted or malicious firmware (Spangler, abstract & paragraphs [0002, 0070, & 0073]).
The combination of Dirstine, Harland, and Spangler does not explicitly disclose:
wherein each of the main program areas has hexadecimal data generated by a logic code of the corresponding one of the firmware images.
However, Jarrett discloses:
wherein each of the main program areas has hexadecimal data generated by a logic code of the corresponding one of the [firmware] (col. 2 lines 4-11, “The server 11 is configured with compiled source code 12, such as an Intel hex file 12, for example, that comprises updated firmware for a processor 21 employed in the field device 20. The Intel hex file 12 comprises source code 12 corresponding to firmware that is configured to operate the field device 20, such as the engine control system 28 or standby power generator 28, or the remote monitoring or sensing system.”).
Jarrett is within the same field of endeavor as the claimed invention regarding the utilization of firmware updates and hexadecimal data.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Jarrett into the combined teachings of Dirstine, Harland, and Spangler to include “wherein each of the main program areas has hexadecimal data generated by a logic code of the corresponding one of the firmware images.” The modification would be obvious because one of ordinary skill in the art would be motivated to utilize a system that uses an Intel hex file for updated firmware code and checksums to verify the correctness of packets comprising the hex file to effectively update firmware by determining whether the correct transferred file is stored or if a new hex file needs to be re-transmitted (Jarrett, abstract & col. 2 lines 66-67 to col. 3 lines 1-2 & lines 6-13).
As per Claim 18, the rejection of Claim 17 is incorporated; and Dirstine discloses “corresponding one of the firmware images (paragraph [0049], “The firmware identifying information extracted from the received firmware file is compared to the file name specification stored in the file name specification table on the server 401, and any matches are identified. The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate targets and is updated on the targets.”; paragraph [0052], “The server receives a firmware update at 503, such as by a user retrieving a firmware file from a third-party website, or automated querying and download of new firmware images from a third-party server (emphasis added).”)” and “corresponding one of the target devices (paragraph [0049], “The firmware identifying information extracted from the received firmware file is compared to the file name specification stored in the file name specification table on the server 401, and any matches are identified. The firmware image or bundle is then sent to each of the matching firmware targets on each of the gateway devices 402, and the firmware is sent to the appropriate targets and is updated on the targets.”),” but the combination of Dirstine and Harland does not explicitly disclose:
wherein each of the main program areas has hexadecimal data generated by a logic code of the corresponding one of the firmware images;
wherein, data in each of the information areas is capable of being read directly, while data in each of the main program areas is capable of being read and executed by the corresponding one of the target devices after being parsed.
However, Spangler discloses:
wherein, data in each of the information areas is capable of being read directly, while data in each of the main program areas is capable of being read and executed by the corresponding one of the target devices after being parsed (paragraph [0043 & 0045], “The read-only portion of the system firmware stored at the memory 106 may include a body section and a header section. The header section can include information such as: A version number to associate the firmware with a specific device-model and to differentiate the system firmware from other versions intended to execute on other device models (emphasis added).”; paragraph [0070], “[…] the security processor 108 can verify the firmware including generating a hash of the firmware and comparing the generated hash to an expected hash the security processor 108 extracts [parses] from a body section of the firmware stored in the memory 106 (emphasis added).”; paragraph [0072], “As a condition to executing the system firmware and recovery firmware, the security processor 108 compares generated hash values of the blocks of system firmware and recovery firmware that are currently stored in the memory 106, to the predetermined, expected hash values embedded in the system firmware and recovery firmware (emphasis added).”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Spangler into the combined teachings of Dirstine and Harland to include “wherein, data in each of the information areas is capable of being read directly, while data in each of the main program areas is capable of being read and executed by the corresponding one of the target devices after being parsed.” The modification would be obvious because one of ordinary skill in the art would be motivated to utilize a system that reads the header and body of firmware and parses the body to verify the firmware before executing it in order to improve usability, customization, and user control over the firmware executing in the system and help prevent executing potentially corrupted or malicious firmware (Spangler, abstract & paragraphs [0002, 0070, & 0073]).
The combination of Dirstine, Harland, and Spangler does not explicitly disclose:
wherein each of the main program areas has hexadecimal data generated by a logic code of the corresponding one of the firmware images.
However, Jarrett discloses:
wherein each of the main program areas has hexadecimal data generated by a logic code of the corresponding one of the [firmware] (col. 2 lines 4-11, “The server 11 is configured with compiled source code 12, such as an Intel hex file 12, for example, that comprises updated firmware for a processor 21 employed in the field device 20. The Intel hex file 12 comprises source code 12 corresponding to firmware that is configured to operate the field device 20, such as the engine control system 28 or standby power generator 28, or the remote monitoring or sensing system.”).
Jarrett is within the same field of endeavor as the claimed invention regarding the utilization of firmware updates and hexadecimal data.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Jarrett into the combined teachings of Dirstine, Harland, and Spangler to include “wherein each of the main program areas has hexadecimal data generated by a logic code of the corresponding one of the firmware images.” The modification would be obvious because one of ordinary skill in the art would be motivated to utilize a system that uses an Intel hex file for updated firmware code and checksums to verify the correctness of packets comprising the hex file to effectively update firmware by determining whether the correct transferred file is stored or if a new hex file needs to be re-transmitted (Jarrett, abstract & col. 2 lines 66-67 to col. 3 lines 1-2 & lines 6-13).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Feven H. Huruy whose telephone number is (571) 272-3826. The examiner can normally be reached Mon-Fri. 7:30am-3:30pm.
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/F.H.H./Examiner, Art Unit 2191 /WEI Y MUI/Supervisory Patent Examiner, Art Unit 2191
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