Detailed Action
Summary
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
1. This office action is in response to the application filed on August 22, 2023.
2. Claims 1-20 are pending and has been examined.
Drawings objection
3. Drawings are objected to because of the following informalities:
Fig. 1 illustrate and Paragraph [0020 and 0026] recite that “Inputs 186 and 187 of the control signal generation circuit 180 are coupled to respective
capacitor terminals 158 and 159 and receive the capacitor voltage VCR 191”. However, drawings 2 and 4 showing input signals 184 and 186. Appropriate action is required.
Claim Objection
4. Claims 8-9 are objected to because of the following informalities:
Claim 8 recites “the first and second thresholds”. There is insufficient antecedent basis
for this claim limitation.
Claim 9 recites “the first switching signal” and “the second switching signal” in lines 2-3. There are insufficient antecedent basis for these claim limitations.
Claims 10-12 depend from 9, thus are also objected because of their dependency.
Claim Rejections - 35 USC § 112
5.The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 13 and 14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 13-14 are rejected to because of the following informalities:
Claim 13 recites “first and second converter capacitor terminals coupled to respective first and second capacitor terminals” are used in the claims are vague and unclear and leaves the reader in doubt as to the meaning because the claims does not define what is considered to be “respective first and second capacitor terminals”.
As illustrate in Fig. 1, there is only one resonant capacitor Cr (107) and have a first and second resonant capacitor terminals are directly coupled to the control signal generation circuit 180. However, the claim languages seems like referring that the first and second capacitor (Cr) terminals are coupled to another/second capacitor terminals respectively. Therefore, it is not clear “respective first and second capacitor terminals” are referring to.
For the purpose of this examination, examiner understood that the resonant tank charge sampling circuit is configured for acquiring and transmitting an output voltage signal based on the voltage across the CR terminals to adder.
Claim 14 recites “the first control input” in line 12 is used in the claims are vague and unclear and leaves the reader in doubt as to the meaning because the claims does not define what is considered to be “the first control terminal”. Since claim 13 recites the first transistor having “a first control input” in line 2 and claim 14 recite control signal generation circuit having “a first control input” in lines 12-13. Therefore, it is not clear “the first control terminal” claim language is referring to the first transistor “ the first control input” or the control signal generation circuit “the first control input” . For the purpose to this examination, examiner understood that a control signal generation circuit having the first control input configured to receive signals from the first and second capacitor terminals.
Claims 15-17 depend from 13, thus are also rejected because of their dependency.
Claim Rejections - 35 USC § 103
6. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1,13 and 18-21 are rejected under 35 U.S.C. 103 as being unpatentable over Du “20240388200” in a view of Panov “20223”.
In re to claim 1, Du discloses an apparatus comprising (Figs. 1-10 shows resonant converter dynamic control system and a method ): a resonant converter controller (Fig. 1 shows excluding inverter, rectifier circuit and resonant LLC are equivalent to controller ) having a converter voltage sensing terminal (Vout terminal), a reference voltage terminal (terminal at Vref), a converter current sensing terminal (Iout at the Iout terminal), first and second converter capacitor terminals (positive and negative terminals of capacitor Cr ), and
first and second control outputs (it is understood and well known in the art that the resonant tank charge sampling circuit is configured for acquiring and transmitting an output voltage signal based on the voltage across the CR terminals), the resonant converter controller configured to:
receive a current sensing signal at the converter current sensing terminal (current signal at the output terminal); generate a first signal based on the current sensing signal (output signal from the output current feedforward unit is based on Iout );
generate a second signal (output signal from output voltage controller) representing a difference between a first voltage at the converter voltage sensing terminal (Vout at Vout terminal) and a reference voltage (Vref) at the reference voltage terminal (output signal from output voltage controller is based on the Vout and Vref); and generate first and second switching signals at (PWM unit is configured to generate Vgs signal to the half or full bridges switches of the inverter) respectively,
the first and second control outputs responsive to the first signal (Vgs signal is based on output current feedforward unit), the second signal (output from output voltage controller), and a capacitor voltage between the first and second converter capacitor terminals (resonant tank charge sampling circuit is coupled to the capacitor Cr ) to regulate the first voltage based on the reference voltage (see prag. 0014,0028,0033,0035,0056,0072).
Du discloses sampling circuit is used for acquiring and transmitting an output voltage signal but fails to discloses a capacitor voltage between the first and second capacitor terminal (Examiner believe that the sampling circuit is used for acquiring and transmitting an output voltage signal based on the voltage across the CR. However, examiner brought a second reference just to show voltage sensor configured across the resonant capacitor terminals in order to make the rejection more complete.)
Panov discloses (Fig. 20 shows an isolated DC-DC LLC converter) a capacitor first and second converter output terminals (Fig.20 shows resonant capacitor Cr first and second terminals coupled to VT sensor and output a first and second output signals )
It would have been obvious to one of ordinary skilled person in the art before the effective date of filing the claimed invention to have modified the LLC converter to include sampling resonant capacitor voltage across the capacitors terminals the as thought by Panov because these output put sensor signals can achieve high precision and resolution, allowing for accurate voltage measurements in critical applications. , thus enhanced/ improved reliability of the LLC converter.
In re to claim 13, Du discloses 1 power converter (Fig. 1 shows LLC resonant converter ), comprising:
a resonant converter controller (Fig. 1 shows excluding the inverter, rectifier circuit and resonant LLC are equivalent to controller ) having a converter voltage sensing terminal (Vout terminal), a reference voltage terminal (terminal at Vref), a converter current sensing terminal (Iout at the Iout terminal), first and second converter capacitor terminals coupled to the respective first and second capacitor terminals (positive and negative terminals of capacitor Cr ), and
first and second control outputs coupled to the respective first and second terminals (it is understood and well known in the art that the resonant tank charge sampling circuit is configured for acquiring and transmitting an output voltage signal based on the voltage across the CR terminals), the resonant converter controller configured to:
receive a current sensing signal at the converter current sensing terminal (current signal at the output terminal); generate a first signal based on the current sensing signal (output signal from the output current feedforward unit is based on Iout );
generate a second signal (output signal from output voltage controller) representing a difference between a first voltage at the converter voltage sensing terminal Vout) and a reference voltage (Vref) at the reference voltage terminal (output signal from output voltage controller is based on the Vout and Vref); and generate first and second switching signals at (PWM unit is configured to generate Vgs signal to the half or full bridges), respectively,
the first and second control outputs responsive to the first signal (Vgs signal is based on output current feedforward unit), the second signal (output from output voltage controller), and a capacitor voltage between the first and second converter capacitor terminals (resonant tank charge sampling circuit is configured to monitor voltage across the Cr) to regulate the first voltage based on the reference voltage (see prag. 0014,0028,0033,0035,0056,0072).
Du discloses that (the inverter circuit is a full-bridge circuit or a half-bridge circuit, and the rectifier circuit is a full-bridge circuit or a full-wave circuit, and the rectifier circuit contains a transformer for electrical isolation and/or voltage conversion, see parg.0068)
Whereas Wang discloses a first transistor (S1 and S3) coupled between a first converter power input (Vin) and a switching terminal (terminals between S1&S2 and S3&S4), the first transistor having a first control input (gate terminals of S1 and S3) ; a second transistor (S2 and S4) coupled between the switching terminal and a second converter power input,
the second transistor having a second control terminal (gate terminals of S2 and S4) ; a transformer (transformer) having a primary winding and having a secondary winding (primary and secondary winding) ; an inductor coupled between the switching terminal and the primary winding (Lr); a capacitor coupled between the primary winding and the second converter input (Cr), the capacitor having first and second capacitor terminals (Cr positive and negative terminals); a rectifier circuit coupled to the secondary winding (D5-D8 coupled to secondary side) , the rectifier circuit having a power converter output (Vout at the secondary side);
Furthermore Du discloses a sampling circuit is used for acquiring and transmitting an output voltage signal but fails to discloses a capacitor voltage between the first and second capacitor terminal (Examiner believe that the sampling circuit is used for acquiring and transmitting an output voltage signal based on the voltage across the CR. However, examiner brought a second reference just to show voltage sensor configured across the resonant capacitor terminals in order to make the rejection more complete.)
Panov discloses (Fig. 20 shows an isolated DC-DC LLC converter) a first and second control outputs coupled to respective first and second control terminals (Fig.20 shows resonant capacitor Cr first and second terminals coupled to VT sensor and output a first and second output signals )
It would have been obvious to one of ordinary skilled person in the art before the effective date of filing the claimed invention to have modified the LLC converter to include a first and second control outputs coupled to respective first and second control terminals the as thought by Panov because these output put sensor signals can achieve high precision and resolution, allowing for accurate voltage measurements in critical applications. , thus enhanced/ improved reliability of the LLC converter.
In re to claim 18, Du discloses (Figs. 1-10 shows resonant converter dynamic control system and a method )comprising:
receiving a first voltage from an output of a resonant converter (output voltage controller configured to receive Vout)
receiving a second voltage across a capacitor of the resonant converter (the resonant tank charge sampling circuit is configured to acquiring and transmitting an output voltage signal based on the voltage across the CR terminals), the resonant converter controller configured to:
receiving a reference voltage (output voltage controller is configured to receive Vref);
receiving a current measurement signal from the output of the resonant converter (output current feedforward unit configured to receive Iout);
and
generating a switching signal of the resonant converter responsive to the first voltage (PWM unit is configured to generate Vgs signal to the half or full bridges), the second voltage, and the current measurement signal to regulate the first voltage based on the reference voltage.
Du discloses sampling circuit is used for acquiring and transmitting an output voltage signal but fails to discloses a capacitor voltage between the first and second capacitor terminal (Examiner believe that the sampling circuit is used for acquiring and transmitting an output voltage signal based on the voltage across the CR. However, examiner brought a second reference just to show voltage sensor configured across the resonant capacitor terminals in order to make the rejection more complete.)
Panov discloses (Fig. 20 shows an isolated DC-DC LLC converter) a second voltage across capacitor (Fig.20 shows VT sensor is configured to sense voltage across Cr1 and output a first and second output signals)
It would have been obvious to one of ordinary skilled person in the art before the effective date of filing the claimed invention to have modified the LLC converter to include VT sensor is configured to sense voltage across Cr1as thought by Panov because these output put sensor signals can achieve high precision and resolution, allowing for accurate voltage measurements in critical applications. , thus enhanced/ improved reliability of the LLC converter.
In re to claim 19, Du as modified discloses (Figs. 1-10) generating a first signal based on the current measurement signal (output signal from output current feedforward unit); generating a second signal representing (output signal from output voltage controller )a difference between the first voltage (vout) and the reference voltage (VreF); and generating the switching signal based on the first and second signals (PWM unit is configured to generate Vgs signal to the half or full bridges).
In re to claim 20, Du discloses a non-transitory computer readable medium storing instructions that, when executed by processor circuitry, cause the processor circuitry to (Figs. 1-10 shows resonant converter dynamic control system and a method. Furthermore, see Fig. 10 and parag.0089 and 0091) : receive a first voltage from an output of a resonant converter (output voltage controller configured to receive Vout) ;
receive a second voltage across a capacitor of the resonant converter (the resonant tank charge sampling circuit is configured to acquiring and transmitting an output voltage signal based on the voltage across the CR terminals);
receive a reference voltage (output voltage controller is configured to receive Vref);
receive a current measurement signal from the output of the resonant converter (output current feedforward unit configured to receive Iout); and
generate a switching signal of the resonant converter responsive to the first voltage (PWM unit is configured to generate Vgs signal to the half or full bridges based on the Vout) , the second voltage), and the current measurement signal to regulate the first voltage based on the reference voltage (see prag. 0014,0028,0033,0035,0056,0072).
Du discloses sampling circuit is used for acquiring and transmitting an output voltage signal but fails to discloses a capacitor voltage between the first and second capacitor terminal (Examiner believe that the sampling circuit is used for acquiring and transmitting an output voltage signal based on the voltage across the CR. However, examiner brought a second reference just to show voltage sensor configured across the resonant capacitor terminals in order to make the rejection more complete.)
Panov discloses (Fig. 20 shows an isolated DC-DC LLC converter) voltage across a capacitor (Fig.20 shows VT sensor is configured to sense voltage across Cr1 and output a first and second output signals )
It would have been obvious to one of ordinary skilled person in the art before the effective date of filing the claimed invention to have modified the LLC converter to include a VT sensor is configured to sense voltage across Cr1 and output a first and second output signals as thought by Panov because these output put sensor signals can achieve high precision and resolution, allowing for accurate voltage measurements in critical applications. , thus enhanced/ improved reliability of the LLC converter.
In re to claim 21, Du as modified discloses wherein the instructions, when executed, cause the processor circuitry to (see prag.0089 and 0091 and Fig.10): generate a first signal based on the current measurement signal (output from output current feedforward unit); generate a second signal (output signal from output voltage controller) representing a difference between the first voltage (Vout) and the reference voltage (Vref) ; and generate the switching signal based on the first and second signals (PWM unit is configured to generate Vgs signal to the half or full bridges based the first and second signal output ) .
Allowable Subject Matter
7. Claims 2-12 and 14-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 2 , the prior art of record fails to disclose or suggest the apparatus including the limitation of “a compensator having a first compensator input, a second compensator input, and a compensator output, the first compensator input coupled to the converter voltage sensing terminal, the second compensator input coupled to the reference voltage terminal, the compensator configured to generate the second signal at the compensator output; a summation circuit having a first summation input, a second summation input, and a summation output, the first summation input coupled to the feedforward output, and the second summation input coupled to the compensator output; and a control signal generation circuit having a first control input, a second control input, and the first and second control outputs, the first control input coupled to the first and second converter capacitor terminals, and the second control input coupled to the summation output..”
Claim 14 , the prior art of record fails to disclose or suggest the power converter including the limitation of “a compensator having a first input, a second input, and a compensator output, the first input coupled to the converter voltage sensing terminal, the second input coupled to the reference voltage terminal, the compensator configured to generate the second signal at the compensator output; a summation circuit having a first summation input, a second summation input, and a summation output, the first summation input coupled to the feedforward output, and the second summation input coupled to the compensator output; and a control signal generation circuit having a first control input, a second control input, and the first and second control outputs, the first control input coupled to the first and second converter capacitor terminals, and the second control input coupled to the summation output.”
Claims 3-12 depends from claim 2, thus are also objected because of their dependency.
Claims 15-17 depends from claim 14, thus are also objected because of their dependency.
Note: claim 14 contains allowable subject matter. However, applicant has to comply 112(b) rejection in order to overcome the rejection.
Conclusion
8. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SISAY G TIKU whose telephone number is (571)272-6898. The examiner can normally be reached 8:30AM-6:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tran, Thienvu Vu can be reached on (571) 270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SISAY G TIKU/
Primary Examiner, Art Unit 2838
Prosecution Insights