DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 07/23/2026 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Ichikawa (JP 2014120619) hereinafter “Ichikawa” in view of Iwai et al. (US 2021/0327777) hereinafter “Iwai” and Yoshihara et al. (US 2003/0075783) hereinafter “Yoshihara” and in further view of Yoshihara (US 2022/0102264) hereinafter “Yoshihara2”.
Regarding claim 1, Figs. 1 and 2 of Ichikawa teaches a power semiconductor device comprising: a conductor plate (Item 1); an insulator (Item 2) mounted on the conductor plate (Item 1); a lead frame (Combination of Items 3 and 6) mounted on the insulator (Item 2); a first mold package (Item 7) including a semiconductor element (Item 4) provided on the lead frame inside thereof, and resin-sealed (Item 7) such that a main surface (Bottom surface) of the conductor plate (Item 1) opposite to a side on which the insulator is provided is exposed (the conductor is exposed relative to the first mold package covering the remainder of the conductor); and a second mold package (Item 9) in which the first mold package (Item 7) is resin-sealed such that the main surface is exposed (the conductor is exposed relative to the second mold package covering the remainder of the conductor), wherein the lead frame (Combination of Items 3 and 6) has a plurality of terminals (Items 3) protruding from one side surface of the first mold package (Item 7), the plurality of terminals (Item 3) are bent inside the second mold package (Item 9) in a direction opposite to the main surface of the conductor plate (Item 1), projecting from a front surface of the second mold package (Item 9) opposite to the conductor plate (Item 1).
Ichikawa does explicitly teach where there are a plurality of semiconductor elements nor the plurality of terminals are alternately arranged to form a staggered pattern in a place closer to one side of the front surface in plan view.
Figs. 1, 2 and 5 of Iwai teach a power semiconductor device comprising multiple semiconductor elements (Items 21 or 22), where a plurality of terminals (Items 11 or 12) are alternately arranged to form a staggered pattern in a place closer to one side of the front surface in a plan view.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have a plurality of semiconductor elements and have the plurality of terminals be alternately arranged to form a staggered pattern in a place closer to one side of the front surface in plan view because this allows for the distance between adjacent lead terminals and their respective through holes to be increased (Iwai Paragraph 0109).
Ichikawa does not teach the plurality of terminals includes a plurality of first terminals and a plurality of second terminals, the plurality of first terminals are arranged closer to the one side than the plurality of second terminals are in plan view.
Fig. 5 of Iwai further teaches where the plurality of terminals (Items 11 or 12) includes a plurality of first terminals (Shorter of Items 11) and a plurality of second terminals (Longer of Items 11), the plurality of first terminals are arranged closer to the one side than the plurality of second terminals are in plan view.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the plurality of terminals includes a plurality of first terminals and a plurality of second terminals, the plurality of first terminals are arranged closer to the one side than the plurality of second terminals are in plan view because this allows for the distance between adjacent lead terminals and their respective through holes to be increased (Iwai Paragraph 0109).
Ichikawa does not teach in the first mold package, the side surface from which the plurality of terminals protrude has concave/convex shape in which a portion from which each of the plurality of first terminal protrudes is a convex portion, and a portion from which each of the plurality of second terminals protrudes is a concave portion.
Fig. 7 of Yoshihara teaches where in a mold package (Item 45) a side surface (Left side) from which a plurality of terminals (Items 2d and 2e) protrude has concave/convex shape in which a portion from which each of the plurality of first terminal protrudes is a convex portion, and a portion from which each of the plurality of second terminals protrudes is a concave portion.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have, in the first mold package, the side surface from which the plurality of terminals protrude has concave/convex shape in which a portion from which each of the plurality of first terminal protrudes is a convex portion, and a portion from which each of the plurality of second terminals protrudes is a concave portion because this shape of mold package accommodates the different sized terminals protruding from the package while allowing for higher heat radiation properties being achieved (Yoshihara Paragraph 0091).
Ichikawa does not teach where the plurality of semiconductor elements includes a plurality of first semiconductor elements electrically connected to and aligned in plan view with the plurality of first terminals, respectively, and a plurality of second semiconductor elements electrically connected to and aligned in plan view with the plurality of second terminals, respectively.
Fig. 6 of Iwai further teaches where the plurality of semiconductor elements (Item 21) include a plurality of first semiconductor elements electrically connected to and aligned (Where Items 21 are perpendicularly aligned with Item 11 or, stated another way, the extension direction of the first semiconductor device in the short dimension is aligned in parallel with an extension direction of a long dimension of the first terminals) in plan view with the plurality of first terminals (Item 11), respectively, and a plurality of second semiconductor elements (Items 22) electrically connected to and aligned (Where Items 22 are perpendicularly aligned with Item 12 or, stated another way, the extension direction of the second semiconductor device in the short dimension is aligned in parallel with an extension direction of a long dimension of the second teminal) with the plurality of second terminals, respectively.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the plurality of semiconductor elements includes a plurality of first semiconductor elements electrically connected to and aligned in plan view with the plurality of first terminals, respectively, and a plurality of second semiconductor elements electrically connected to and aligned in plan view with the plurality of second terminals, respectively because this allows for the semiconductor elements to be placed in a desired location in the mold package (Iwai Paragraph 0052). Further, MPEP 2144.04(VI)(c) states that design choice in which the alternate position of elements would not affect the operation of the device is obvious (See In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950) (Claims to a hydraulic power press which read on the prior art except with regard to the position of the starting switch were held unpatentable because shifting the position of the starting switch would not have modified the operation of the device.); See also In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975) (the particular placement of a contact in a conductivity measuring device was held to be an obvious matter of design choice)).
Ichikawa does not teach the plurality of first semiconductor elements are arranged closer to the side surface of the first mold package than the plurality of second semiconductor elements are, and the plurality of semiconductor elements are alternately arranged to form a staggered pattern on the lead frame in plan view.
Fig. 13 of Yoshihara2 teaches where semiconductor elements (Items 21 and 22) are alternately arranged to form a staggered pattern on a lead frame in a plan view.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the plurality of first semiconductor elements are arranged closer to the side surface of the first mold package than the plurality of second semiconductor elements are, and the plurality of semiconductor elements are alternately arranged to form a staggered pattern on the lead frame in plan view because this all for the semiconductor elements to be placed in a desired location in the mold package (Yoshihara Paragraph 0097). Further, MPEP 2144.04(VI)(c) states that design choice in which the alternate position of elements would not affect the operation of the device is obvious (See In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950) (Claims to a hydraulic power press which read on the prior art except with regard to the position of the starting switch were held unpatentable because shifting the position of the starting switch would not have modified the operation of the device.); See also In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975) (the particular placement of a contact in a conductivity measuring device was held to be an obvious matter of design choice)).
Examiner’s Note: The Examiner notes that the claim language does not specify the way in which the plurality of first semiconductor elements are aligned in the plan view with the plurality of first terminals nor does the claim language specify the way in which the plurality of second semiconductor elements are aligned in the plan view with the plurality of second terminals.
Regarding claim 4, the combination of Ichikawa, Iwai, Yoshihara and Yoshihara2 teaches all of the elements of the claimed invention as stated above.
Ichikawa does not teach where each of the plurality of second terminals is provided so as to be accommodated in the concave portion in plan view.
Fig. 7 of Yoshihara teaches where, in a mold package (Item 45), each of a plurality of second terminals (Item 2e) is provided so as to be accommodated in the concave portion in a plan view.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have, each of the plurality of second terminals provided so as to be accommodated in the concave portion in plan view because this shape of mold package accommodates the different sized terminals protruding from the package while allowing for higher heat radiation properties being achieved (Yoshihara Paragraph 0091).
Regarding claim 9, Figs. 1 and 2 of Ichikawa teaches a power semiconductor device comprising: a conductor plate (Item 1); an insulator (Item 2) mounted on the conductor plate (Item 1); a lead frame (Combination of Items 3 and 6) mounted on the insulator (Item 2); a first mold package (Item 7) including a semiconductor element (Item 4) provided on the lead frame inside thereof, and resin-sealed (Item 7) such that a main surface (Bottom surface) of the conductor plate (Item 1) opposite to a side on which the insulator is provided is exposed (the conductor is exposed relative to the first mold package covering the remainder of the conductor); and a second mold package (Item 9) in which the first mold package (Item 7) is resin-sealed such that the main surface is exposed (the conductor is exposed relative to the second mold package covering the remainder of the conductor), wherein the lead frame (Combination of Items 3 and 6) has a plurality of terminals (Items 3) protruding from one side surface of the first mold package (Item 7), the plurality of terminals (Item 3) are bent inside the second mold package (Item 9) in a direction opposite to the main surface of the conductor plate (Item 1), projecting from a front surface of the second mold package (Item 9) opposite to the conductor plate (Item 1).
Ichikawa does explicitly teach where there are a plurality of semiconductor elements nor the plurality of terminals are alternately arranged to form a staggered pattern in a place closer to one side of the front surface in plan view.
Figs. 1, 2 and 5 of Iwai teach a power semiconductor device comprising multiple semiconductor elements (Items 21 or 22), where a plurality of terminals (Items 11 or 12) are alternately arranged to form a staggered pattern in a place closer to one side of the front surface in a plan view.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have a plurality of semiconductor elements and have the plurality of terminals be alternately arranged to form a staggered pattern in a place closer to one side of the front surface in plan view because this allows for the distance between adjacent lead terminals and their respective through holes to be increased (Iwai Paragraph 0109).
Ichikawa does not teach the plurality of terminals includes a plurality of first terminals and a plurality of second terminals, the plurality of first terminals are arranged closer to the one side than the plurality of second terminals are in plan view.
Fig. 5 of Iwai further teaches where the plurality of terminals (Items 11 or 12) includes a plurality of first terminals (Shorter of Items 11) and a plurality of second terminals (Longer of Items 11), the plurality of first terminals are arranged closer to the one side than the plurality of second terminals are in plan view.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the plurality of terminals includes a plurality of first terminals and a plurality of second terminals, the plurality of first terminals are arranged closer to the one side than the plurality of second terminals are in plan view because this allows for the distance between adjacent lead terminals and their respective through holes to be increased (Iwai Paragraph 0109).
Ichikawa does not teach in the first mold package, the side surface from which the plurality of terminals protrude has concave/convex shape in which a portion from which each of the plurality of first terminal protrudes is a convex portion, and a portion from which each of the plurality of second terminals protrudes is a concave portion.
Fig. 7 of Yoshihara teaches where in a mold package (Item 45) a side surface (Left side) from which a plurality of terminals (Items 2d and 2e) protrude has concave/convex shape in which a portion from which each of the plurality of first terminal protrudes is a convex portion, and a portion from which each of the plurality of second terminals protrudes is a concave portion.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have, in the first mold package, the side surface from which the plurality of terminals protrude has concave/convex shape in which a portion from which each of the plurality of first terminal protrudes is a convex portion, and a portion from which each of the plurality of second terminals protrudes is a concave portion because this shape of mold package accommodates the different sized terminals protruding from the package while allowing for higher heat radiation properties being achieved (Yoshihara Paragraph 0091).
Ichikawa does not teach where the plurality of semiconductor elements includes a plurality of first semiconductor elements electrically connected to and aligned in a first direction with the plurality of first terminals, respectively, and a plurality of second semiconductor elements electrically connected to and aligned in the first direction with the plurality of second terminals, respectively, the first direction is a direction in which the plurality of terminals protrude from the one side.
Fig. 6 of Iwai further teaches where the plurality of semiconductor elements (Item 21) include a plurality of first semiconductor elements electrically connected to and aligned (Where the extension direction of Item 21 in the short dimension is aligned in parallel in a first direction with an extension direction of a long dimension of Item 11) in a first direction (Left and right across the page) with the plurality of first terminals (Item 11), respectively, and a plurality of second semiconductor elements (Items 22) electrically connected to and aligned (Where the extension direction of Item 22 in the short dimension is aligned in parallel in the first direction with an extension direction of a long dimension of Item 12) in the first direction with the plurality of second terminals, respectively, the first direction is a direction in which the plurality of terminals protrude from the one side.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the plurality of semiconductor elements include a plurality of first semiconductor elements electrically connected to and aligned in a first direction with the plurality of first terminals, respectively, and a plurality of second semiconductor elements electrically connected to and aligned in the first direction with the plurality of second terminals, respectively, the first direction is a direction in which the plurality of terminals protrude from the one side because this allows for the semiconductor elements to be placed in a desired location in the mold package (Iwai Paragraph 0052). Further, MPEP 2144.04(VI)(c) states that design choice in which the alternate position of elements would not affect the operation of the device is obvious (See In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950) (Claims to a hydraulic power press which read on the prior art except with regard to the position of the starting switch were held unpatentable because shifting the position of the starting switch would not have modified the operation of the device.); See also In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975) (the particular placement of a contact in a conductivity measuring device was held to be an obvious matter of design choice)).
Ichikawa does not teach the plurality of first semiconductor elements are arranged closer to the side surface of the first mold package than the plurality of second semiconductor elements are, and the plurality of semiconductor elements are alternately arranged to form a staggered pattern on the lead frame in plan view.
Fig. 13 of Yoshihara2 teaches where semiconductor elements (Items 21 and 22) are alternately arranged to form a staggered pattern on a lead frame in a plan view.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the plurality of first semiconductor elements are arranged closer to the side surface of the first mold package than the plurality of second semiconductor elements are, and the plurality of semiconductor elements are alternately arranged to form a staggered pattern on the lead frame in plan view because this all for the semiconductor elements to be placed in a desired location in the mold package (Yoshihara Paragraph 0097). Further, MPEP 2144.04(VI)(c) states that design choice in which the alternate position of elements would not affect the operation of the device is obvious (See In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950) (Claims to a hydraulic power press which read on the prior art except with regard to the position of the starting switch were held unpatentable because shifting the position of the starting switch would not have modified the operation of the device.); See also In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975) (the particular placement of a contact in a conductivity measuring device was held to be an obvious matter of design choice)).
Examiner’s Note: The Examiner notes that the claim language does not specify the way in which the plurality of first semiconductor elements are aligned in the first direction with the plurality of first terminals nor does the claim language specify the way in which the plurality of second semiconductor elements are aligned in the first direction with the plurality of second terminals.
Claims 6 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Ichikawa (JP 2014120619) hereinafter “Ichikawa” in view of Iwai et al. (US 2021/0327777) hereinafter “Iwai”, Yoshihara et al. (US 2003/0075783) hereinafter “Yoshihara” and Yoshihara (US 2022/0102264) hereinafter “Yoshihara2” and in further view of Iwade et al. (US 7,728,413) hereinafter “Iwade”.
Regarding claim 6, the combination of Ichikawa, Iwai, Yoshihara and Yoshihara2 teaches all of the elements of the claimed invention as stated above.
Ichikawa does not teach the second mold package has a projection between an array of the plurality of first terminals and an array of the plurality of second terminals on the front surface, extending in a direction parallel to both arrays.
Figs. 6I and 7 of Iwade teaches where rugged portions of a mold package (Item 7) comprise projections and recesses.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the second mold package have a projection between an array of the plurality of first terminals and an array of the plurality of second terminals on the front surface, extending in a direction parallel to both arrays because the projections serve to lengthen the creepage distance of mold resin packages at those positions between terminals (Iwade Column 4, Lines 50-55).
Regarding claim 7, the combination of Ichikawa, Iwai, Yoshihara and Yoshihara2 teaches all of the elements of the claimed invention as stated above.
Ichikawa does not teach the second mold package has a recess between an array of the plurality of first terminals and an array of the plurality of second terminals on the front surface, extending in a direction parallel to both arrays.
Figs. 6I and 7 of Iwade teaches where rugged portions of a mold package (Item 7) comprise projections and recesses.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the second mold package have a recess between an array of the plurality of first terminals and an array of the plurality of second terminals on the front surface, extending in a direction parallel to both arrays because the projections serve to lengthen the creepage distance of mold resin packages at those positions between terminals (Iwade Column 4, Lines 50-55).
Alternately, Claims 1 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Ichikawa (JP 2014120619) hereinafter “Ichikawa” in view of Iwai et al. (US 2021/0327777) hereinafter “Iwai” and Yoshihara et al. (US 2003/0075783) hereinafter “Yoshihara” and in further view of Yoshihara (US 2022/0102264) hereinafter “Yoshihara2”.
Regarding claim 1, Figs. 1 and 2 of Ichikawa teaches a power semiconductor device comprising: a conductor plate (Item 1); an insulator (Item 2) mounted on the conductor plate (Item 1); a lead frame (Combination of Items 3 and 6) mounted on the insulator (Item 2); a first mold package (Item 7) including a semiconductor element (Item 4) provided on the lead frame inside thereof, and resin-sealed (Item 7) such that a main surface (Bottom surface) of the conductor plate (Item 1) opposite to a side on which the insulator is provided is exposed (the conductor is exposed relative to the first mold package covering the remainder of the conductor); and a second mold package (Item 9) in which the first mold package (Item 7) is resin-sealed such that the main surface is exposed (the conductor is exposed relative to the second mold package covering the remainder of the conductor), wherein the lead frame (Combination of Items 3 and 6) has a plurality of terminals (Items 3) protruding from one side surface of the first mold package (Item 7), the plurality of terminals (Item 3) are bent inside the second mold package (Item 9) in a direction opposite to the main surface of the conductor plate (Item 1), projecting from a front surface of the second mold package (Item 9) opposite to the conductor plate (Item 1).
Ichikawa does explicitly teach where there are a plurality of semiconductor elements nor the plurality of terminals are alternately arranged to form a staggered pattern in a place closer to one side of the front surface in plan view.
Figs. 1, 2 and 5 of Iwai teach a power semiconductor device comprising multiple semiconductor elements (Items 21 or 22), where a plurality of terminals (Items 11) are alternately arranged to form a staggered pattern in a place closer to one side (Right side in Fig. 5) of the front surface in a plan view while having another plurality of terminals (Items 12 in bottom left of the package in Fig. 5) which are aligned such that the form substantially a straight line the plan view.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have a plurality of semiconductor elements and have the plurality of terminals be alternately arranged to form a staggered pattern in a place closer to one side of the front surface in plan view because this allows for the distance between adjacent lead terminals and their respective through holes to be increased (Iwai Paragraph 0109) and this may be required by the design layout and location of the semiconductor devices and corresponding wiring based on insulation and heating requirements (Iwai Paragraph 0002).
Ichikawa does not teach the plurality of terminals includes a plurality of first terminals and a plurality of second terminals, the plurality of first terminals are arranged closer to the one side than the plurality of second terminals are in plan view.
Fig. 5 of Iwai further teaches where the plurality of terminals (Items 11 or 12) includes a plurality of first terminals (Shorter of Items 11) and a plurality of second terminals (Longer of Items 11), the plurality of first terminals are arranged closer to the one side than the plurality of second terminals are in plan view.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the plurality of terminals includes a plurality of first terminals and a plurality of second terminals, the plurality of first terminals are arranged closer to the one side than the plurality of second terminals are in plan view because this allows for the distance between adjacent lead terminals and their respective through holes to be increased (Iwai Paragraph 0109).
Ichikawa does not teach in the first mold package, the side surface from which the plurality of terminals protrude has concave/convex shape in which a portion from which each of the plurality of first terminal protrudes is a convex portion, and a portion from which each of the plurality of second terminals protrudes is a concave portion.
Fig. 7 of Yoshihara teaches where in a mold package (Item 45) a side surface (Left side) from which a plurality of terminals (Items 2d and 2e) protrude has concave/convex shape in which a portion from which each of the plurality of first terminal protrudes is a convex portion, and a portion from which each of the plurality of second terminals protrudes is a concave portion.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have, in the first mold package, the side surface from which the plurality of terminals protrude has concave/convex shape in which a portion from which each of the plurality of first terminal protrudes is a convex portion, and a portion from which each of the plurality of second terminals protrudes is a concave portion because this shape of mold package accommodates the different sized terminals protruding from the package while allowing for higher heat radiation properties being achieved (Yoshihara Paragraph 0091).
Ichikawa does not teach where the plurality of semiconductor elements includes a plurality of first semiconductor elements electrically connected to and aligned in plan view with the plurality of first terminals, respectively, and a plurality of second semiconductor elements electrically connected to and aligned in plan view with the plurality of second terminals, respectively.
Fig. 6 of Iwai further teaches where the plurality of semiconductor elements (Item 21) include a plurality of first semiconductor elements electrically connected to and aligned (Where Items 21 are perpendicularly aligned with Item 11 or, stated another way, the extension direction of the first semiconductor device in the short dimension is aligned in parallel with an extension direction of a long dimension of the first terminals) in plan view with the plurality of first terminals (Item 11), respectively, and a plurality of second semiconductor elements (Items 22) electrically connected to and aligned (Where Items 22 are perpendicularly aligned with Item 12 or, stated another way, the extension direction of the second semiconductor device in the short dimension is aligned in parallel with an extension direction of a long dimension of the second teminal) with the plurality of second terminals, respectively.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the plurality of semiconductor elements includes a plurality of first semiconductor elements electrically connected to and aligned in plan view with the plurality of first terminals, respectively, and a plurality of second semiconductor elements electrically connected to and aligned in plan view with the plurality of second terminals, respectively because this allows for the semiconductor elements to be placed in a desired location in the mold package (Iwai Paragraph 0052). Further, MPEP 2144.04(VI)(c) states that design choice in which the alternate position of elements would not affect the operation of the device is obvious (See In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950) (Claims to a hydraulic power press which read on the prior art except with regard to the position of the starting switch were held unpatentable because shifting the position of the starting switch would not have modified the operation of the device.); See also In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975) (the particular placement of a contact in a conductivity measuring device was held to be an obvious matter of design choice)).
Ichikawa does not teach the plurality of first semiconductor elements are arranged closer to the side surface of the first mold package than the plurality of second semiconductor elements are, and the plurality of semiconductor elements are alternately arranged to form a staggered pattern on the lead frame in plan view.
Fig. 13 of Yoshihara2 teaches where semiconductor elements (Items 21 and 22) are alternately arranged to form a staggered pattern on a lead frame in a plan view.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the plurality of first semiconductor elements are arranged closer to the side surface of the first mold package than the plurality of second semiconductor elements are, and the plurality of semiconductor elements are alternately arranged to form a staggered pattern on the lead frame in plan view because this all for the semiconductor elements to be placed in a desired location in the mold package (Yoshihara Paragraph 0097). Further, MPEP 2144.04(VI)(c) states that design choice in which the alternate position of elements would not affect the operation of the device is obvious (See In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950) (Claims to a hydraulic power press which read on the prior art except with regard to the position of the starting switch were held unpatentable because shifting the position of the starting switch would not have modified the operation of the device.); See also In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975) (the particular placement of a contact in a conductivity measuring device was held to be an obvious matter of design choice)).
Examiner’s Note: The Examiner notes that the claim language does not specify the way in which the plurality of first semiconductor elements are aligned in the plan view with the plurality of first terminals nor does the claim language specify the way in which the plurality of second semiconductor elements are aligned in the plan view with the plurality of second terminals.
Regarding claim 8, Figs. 1 and 2 of Ichikawa further teaches where the lead frame has another plurality of terminals (Items 6) protruding from another side surface of the first mold package (Item 7) opposite to the one side surface of the first mold package, the another plurality of terminals (Item 6) are bent inside the second mold package (Item 9) in the direction opposite to the main surface of the conductor plate (Item 1), projecting from the front surface of the second mold package opposite to the conductor plate, and the another plurality of terminals are arranged in a row such that each of the another plurality of terminals form a substantially straight line in plan view.
Response to Arguments
Applicant's arguments filed 07/23/2026 have been fully considered but they are not persuasive.
Specifically, the Applicant argues that Iwai fails to suggest “a plurality of first semiconductor elements electrically connected to and aligned in plan view with the plurality of first terminals” and “a plurality of second semiconductor elements electrically connected to and aligned in plan view with the plurality of second terminals”. The Examiner disagrees. To support their position the Applicant states that Fig. 6 of Iwai shows semiconductor elements 21 offset from corresponding ones of the lead terminals 11. While the Examiner agrees that the semiconductor elements 21 are offset from the terminals 11 in Fig. 6 in Iwai the Examiner disagrees that this precludes Iwai from reading on the claim language as the claim language does not state the way in which the semiconductor elements and terminals are aligned. As stated in the rejection of claim 1 above, the semiconductor element and the terminal are aligned in that the short dimension side of the semiconductor element is aligned, by being parallel, with the long dimension side of the terminal. The claim language does not require any lateral or vertical alignment in the plan view. Instead, the claim language merely requires that the semiconductor element and the corresponding terminal are aligned in some way in the plan view. As such, the Examiner maintains the reliance on the combination of Ichikawa, Iwai, Yoshihara and Yoshihara2 to read on the scope of amended claim 1. The Examiner’s response recited above is also applicable to the Applicant’s arguments with regard to new claim 9.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC K ASHBAHIAN whose telephone number is (571)270-5187. The examiner can normally be reached 8-5:30 PM.
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/ERIC K ASHBAHIAN/
Primary Examiner, Art Unit 2891
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