DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-20 are currently pending with claim 14 standing as withdrawn (see Election 06/18/2026).
Election/Restrictions
Applicant’s election without traverse of Species VI (of Group I), Species IIX (of Group II), and Species IIX (of Group III) in the reply filed on 06/18/2026 is acknowledged.
Priority
Claims 1-15 find support in the originally filed parent application, 18/155042 (now abandoned), however claims 16-20 will only receive the present effective filing date of this application as the subject matter was not present in the parent application. The parent Application only details up to a figure 4 (and its associated disclosure), whereas the present application includes elected Figure 7H.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or non-obviousness.
Claims 1-2, 4, and 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Morun et al. US Publication 2015/0141784 (hereinafter Morun) in view of Dornisch et al. US Publication 2005/0087790 (hereinafter Dornisch) and in further view of Signorini et al. US Publication 2021/0057367 (hereinafter Signorini).
Regarding claim 1, Morun discloses a physiological sensing device suitable for sensing a physiological signal of an organism (Abstract, [0009]), comprising: a sensing chip (circuitry 110, [0012]; Figure 1, which technically is front end circuity but similar to that of the sensing chip’s circuitry as per Applicant’s [0020]); a coupling sensing electrode electrically connected to the sensing chip (first sensor electrode 121, communicatively coupled to circuitry 110 by electrically conductive pathway 151, [0028]-[0029]; Figure 1); and a dielectric layer 123 "formed of a material that has a relative permittivity εr of at least 10" ([0030]) that coats first sensor electrode 121 and, in use, is in physical contact with the user's skin ([0034]: "dielectric layers 123, 133 and ground electrode 140 are all in physical contact with the user's skin"). Morun however is silent on the second dielectric layer as claimed.
Dornisch discloses a dielectric stack for a capacitor comprising a first high-k dielectric layer having additional dielectric layer(s) as per (Figure 2 at elements 216, 220, though a third is mentioned at 218, it is not required with Morun’s 123 already present). Dornisch additionally teaches that the dielectrics have different constants with the second dielectric being higher ([0021][0023] further, given the broadness of the positioning of the dielectrics, really any of the dielectrics of Dornisch could have been applied as the second dielectric 216, 218, 220). The order of the resultant combination should be read as electrode 121 of Morun to the dielectrics 216, 220 (later including the third dielectric, then dielectric 123 of Morun to then skin. Therefore, it would have been obvious to the skilled artisan before the effective filing date to utilize the additional dielectric(s) of Dornisch with the device of Morun in order to optimize electrostatic control and enhance sensitivity.
As mentioned above, Morun teaches front end circuitry, but not specifically that there is an on-board sensing chip. These of course are incredibly common and is explicitly taught by Signorini. Signorini teaches the use of front-end circuitry in addition to processor/chip ([0052] which details that the circuitry includes a chip/processor and can be included with the likes the above front-end circuitry on the board itself). It would have been obvious to the skilled artisan before the effective filing date to utilize the chip as taught by Signorini with the device of Matthews to allow for on-board processing not simply preprocessing.
Regarding claim 2, Morun discloses a fabric layer [0034], wherein the second dielectric layer is located between the first dielectric layer and the fabric layer, and the fabric layer is located between the organism and the second dielectric layer ([0034] details that the organism has the layer of fabric between it and the overall sensor, the first and second dielectric layers are already taught above).
Regarding claim 4, Morun teaches as modified by Dornisch discloses a three-layer high-k/low-k/high-k arrangement (claim 1 of Dornisch) with the three dielectrics having the different dielectric (K) constants (dielectrics 216 and 220, and though a third is taught at 218, that dielectric is unnecessary as Morun teaches a dielectric as well at 123 closest to skin). Dornisch is combinable with Morun for the same rationale/motivation as mentioned above in rejected claim 1.
Regarding claim 12, Morun as modified by Dornisch is silent on a redistribution layer comprising the electrode, together with a passive component disposed in and electrically connected to that redistribution layer. Signorini teaches a wafer package that includes a redistribution layer comprising the electrode, together with a passive component disposed in and electrically connected to that redistribution layer (claim 1-2). It would have been obvious to the skilled artisan before the effective filing date to form the sensor electrode 121 of Morun as part of a redistribution layer that also carries a passive device directly electrically connected to it as taught by Signorini in order to reduce the footprint and interconnect length associated with a discrete passive component of the type used with circuitry.
Regarding claim 13, Morun discloses that dielectric layer 123 has "a relative permittivity of about 10 or more, including a relative permittivity of about 10, about 20, about 50, about 100, about 1000" ([0031]), which falls within the claimed range of 7 to 10000 for the second dielectric layer. Morun does not assign a numeric dielectric constant to the layer nearer the electrode. It is, however, well known that common inorganic dielectrics of the type used in thin-film stacks, such as silicon dioxide (εr ≈ 3.9) and silicon nitride (εr ≈ 7), fall within the claimed 3-7 range, and Dornisch teaches that materials in this general low-k family (e.g., Al2O3, εr ≈ 9, used as Dornisch's own intermediate layer material, [0016][0021]) are suitable for the intermediate layer role in this type of high-k/low-k/high-k arrangement. Therefore, it would have been obvious to the skilled artisan before the effective filing date to select a material with a dielectric constant in the 3-to-7 range for the intermediate/first dielectric layer as taught by Dornisch for the first dielectric layer of Morun as predictable results would have ensued (selection from a small number of known, commonly used low-dielectric-constant materials suited to the intermediate-layer function Dornisch describes).
Claims 3 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Morun in view of Dornisch and Signorini, in further view of Beernink US Publication 2007/0013019 (hereinafter Beernink).
Regarding claim 3, Morun as modified by Dornisch and Signorini is silent on a stress compensation layer positioned as claimed. Beernink teaches thin-film devices on flexible substrates that includes a stress compensation layer disposed between the coupling sensing electrode and the coupling dielectric stacked layer ([0005]). It would have been obvious to the skilled artisan before the effective filing date to incorporate a front-side stress compensation layer as taught by Beernink between the electrode and the dielectric stack of Morun and Dornisch in order to counteract residual film stress in the multilayer stack and thereby prevent curling or delamination during manufacture and wear.
Regarding claim 15, see contents of rejected claim 1 and 3 above.
Claims 5 and 7-11 are rejected under 35 U.S.C. 103 as being unpatentable over Morun in view of Dornisch and Signorini, in further view of Li et al. US Publication 2020/0067000 (hereinafter Li).
Regarding claim 5, Morun as modified by Dornisch and Signorini teaches the three dielectric layers above but is silent on the separated dielectric patterns. Li teaches an electrode manufacturing methodology that details inorganic film layers of a flexible OLED device (made "from an inorganic material, for example, silicon nitride, silicon oxide" [0040]) are "relatively brittle and not resistant to bending stress, so it is easy to crack under external force" ([0004]), and teaches that the layers can include separated patterns for each of the materials ([0007][0012][0016]-[0017][0019][0023] see also Figure 4 and [0043]). Therefore, it would have been obvious to the skilled artisan before the effective filing date to pattern each of the first, second, and third dielectric layers of Morun and Dornisch into a plurality of separated dielectric patterns as taught by Li in order to accommodate bending and stretching of the flexible sensor without cracking the brittle inorganic dielectric layers. Though these are different type of electrodes, the materials are comparable and the problem to be solved is still applicable given the disclosure of Li.
Regarding claim 7, Morun as modified by Dornisch, Signorini, and Li teaches the structure (of claim 5), but Morun does not further detail that the first dielectric is filled. Li teaches exactly this gap-filling arrangement for its own patterned inorganic layer including: a first metal layer is "disposed on a whole surface of the inorganic layer and the substrate," and because the inorganic layer is patterned into islands, the metal layer "forms a plurality of first recesses corresponding to shapes of the plurality of island-shaped blocks" ([0007], claim 1); Li then discloses that "an organic planarization layer disposed on the first metal layer ... covers the first metal layer and fills the plurality of first recesses" (claim 5; [0045]: "the organic planarization layer 209 covers the first metal layer 207 and fills a plurality of first recesses G1"). Therefore, it would have been obvious to the skilled artisan before the effective filing date to fill the gaps between the separated patterns of the third dielectric layer with the material of the first dielectric layer as taught by Li with the layers of Morun and Dornisch in order to planarize the dielectric stack and protect the exposed edges of the patterned islands.
Regarding claim 8, see contents of rejected claim 5 above.
Regrading claim 9, the resultant combination includes the three dielectrics of Morun and Dornisch (see contents of rejected claims 1, 4 above which describes the positional relationship between the three dielectrics, stacked and in contact).
Regarding claim 10, see contents of rejected claim 7 above.
Regarding claim 11, see contents of rejected claim 5 above.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Morun in view of Dornisch, Signorini, and Li, as applied to claim 5, and in further view of Wang et al. US Publication 2019/0148670 (hereinafter Wang).
Regarding claim 6, Morun as modified by Dornisch, Signorini, and Li renders obvious the patterning of the second and third dielectric layers (above), but does not disclose that the (patterned) second dielectric layer is in contact with the (patterned) third dielectric layer. Though it should be noted that Dornisch teaches three stacked dielectrics (elements 216, 218, 220), however when combined with the island/patterning of Li, a bridge reference teaching patterned stacked dielectrics is being used (below) to avoid any unreasonable leaps.
Wang teaches patterned multilayer encapsulation for flexible devices and specifically details stacked dielectric layers (323-324 which are patterned dielectrics in contact with each other, see also claim 1). Though patterning is rendered obvious via Li, and though there is already stacked dielectrics taught above by Dornisch, Wang teaches that the stacked dielectrics can also be patterned. Therefore, it would have been obvious to the skilled artisan before the effective filing date to arrange the patterned second and third dielectric layers of the Morun/Dornisch/Li combination as taught by Wang as the layout is one of a finite number of known, predictable layer-stacking arrangements for a patterned multilayer dielectric stack, with a reasonable expectation of success.
Claims 16 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Matthews et al. US Publication 2004/0254435 (hereinafter Matthews) in view of Signorini.
Regrading claim 16, Matthews discloses a physiological sensing device (abstract), suitable for sensing physiological signal of an organism (Figure 1), the physiological sensing device comprising: a sensing chip (28), a coupling sensing electrode (24, no structure or configured for language associated with the sensing chip has been tied to this element, as such it’s simply read as a conductor capable of obtaining an electrical signal), electrically connected to the sensing chip (Figure 2 via wire 30); a coupling dielectric layer (26), covering the coupling sensing electrode and located between the coupling sensing electrode and the organism (Figure 2 dielectric 26 covering the electrode and conductive layer); and a conductive layer (20), disposed on the coupling dielectric layer (Figure 2), wherein the conductive layer and the coupling sensing electrode are respectively located on two sides of the coupling dielectric layer (Figure 2 which shows 20/24 on either side of 26).
Matthews teaches front end circuitry (28), but that inherently doesn’t mean a chip. Signorini teaches the use of front-end circuitry in addition to processor/chip ([0052] which details that the circuitry includes a chip/processor and can be included with the likes the above front-end circuitry on the board itself). It would have been obvious to the skilled artisan before the effective filing date to utilize the chip as taught by Signorini with the device of Matthews to allow for on-board processing not simply preprocessing.
Regarding claim 18, Matthews discloses that the conductive layer and the coupling sensing electrode (layers 20 and 24) are separated from each other by the coupling dielectric layer (26 as per Figure 2).
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Matthews in view of Signorini and in further view of Schwartz et al. US Publication 2015/0248183 (hereinafter Schwartz).
Regarding claim 17, Matthews discloses the device above but is silent on the conductive layer being electrically floating. Schwartz teaches a sensor that includes a conductive layer that is electrically floating. ([0053][0057] and Figure 6). It would have been obvious to the skilled artisan before the effective filing date to utilize the floating conductive layer as taught by Schwartz with the device of Matthews in order to afford a level of electrostatic shielding which has its own predictable results and advantages.
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Matthews in view of Signorini and in further view of Dornisch.
Regarding claim 19, Matthews as modified by Signorini discloses the device of claim 16, wherein the coupling dielectric layer (26) is disclosed as a single-material layer (Figure 2), and is silent on there being additionally stacked dielectrics as claimed. Dornisch teaches forming the coupling dielectric structure as a multilayer stack (dielectric layers 216, 218, 220 as per Figure 2) rather than a single dielectric layer. It would have been obvious to the skilled artisan before the effective filing date to substitute a multilayer dielectric stack as taught by Dornisch in lieu of the single-material dielectric of Matthews in order to independently tailor the coupling capacitance and the mechanical/barrier properties of the dielectric structure. Further, it would have been obvious to duplicate the above parts of Matthews as taught by Dornisch (see MPEP 2144.04-VI-B).
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Matthews in view of Signorini and in further view of Morun.
Regarding claim 20, Matthews as modified by Signorini teaches the same layers (20, 24, 26) adjusting skin (74) and shows given the wiring (30, 36) the circuit is not in series. Matthews however teaches direct contact of the device to skin 77. Morun teaches that the device ca further include a fabric layer between the device and skin ([0034]) which would then afford the first capacitor to be formed as claimed. It would have been obvious to the skilled artisan before the effective filing date to utilize the fabric layer of Morun with the device of Matthews and Signorini to create a capacitor with the organism in order to eliminate the need for preparation of the tissue as well as reduction/elimination of noise comparatively.
Conclusion
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/B.M.A/ Examiner, Art Unit 3794
/JOSEPH A STOKLOSA/ Supervisory Patent Examiner, Art Unit 3794
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