DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I, Species 1, FIG. 2, Claims 1-6 and 8-10 in the reply filed on 06/24/26 is acknowledged.
Claims 7 and 11-19 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to nonelected species and group, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 06/24/26.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 3, and 8-10 are rejected under 35 U.S.C. 102a1 as being anticipated by Yong et al. (US PG Pub 2020/0135626 A1).
Regarding claim 1, Yong discloses an optical module packaging structure (600, FIG. 8, [0048]), comprising:
a circuit board (504, FIG. 8, where 504 is a PCB, [0047]);
an electronic component (116, FIG. 8, where 116 is a driver die, [0038]), disposed on the circuit board;
a lead frame (102, FIG. 8, [0036]), disposed on the electronic component, wherein the lead frame has a first connection portion (see annotated FIG. 8 below) electrically connected to the circuit board (a first protrusion of the first connection portion is electrically connected to 504, see annotated FIG. 8 below); and
a light emitting module (114, FIG. 8, [0037]), disposed on the lead frame, wherein the light emitting module comprises a first connection pad (a first die pad of die pads 106, FIGS. 1-2, where the first die pad is located on the bottom of 114, [0040]) located at a bottom of the light emitting module, and the first connection pad is electrically connected to the circuit board through the first connection portion of the lead frame (see annotated FIG. 8 below).
PNG
media_image1.png
532
694
media_image1.png
Greyscale
Regarding claim 3, Yong discloses the electronic component is a driver electrically connected to the circuit board ([0038]), and the driver is electrically connected to the first connection pad through the circuit board and the first connection portion (see annotated FIG. 8 above).
Regarding claim 8, Yong discloses the lead frame further has a second connection portion (see annotated FIG. 8 above) separated from the first connection portion and electrically connected to the circuit board (via a second protrusion, see annotated FIG. 8 above), and the light emitting module further comprises a second connection pad (a second die pad of the die pads 106, FIGS 1-2, [0040]) located at the bottom of the light emitting module and separated from the first connection pad, and the second connection pad is electrically connected to the circuit board through the second connection portion of the lead frame (see annotated FIG. 8 above).
Regarding claim 9, Yong discloses the first connection portion has a first protrusion (see annotated FIG. 8 above), and the second connection portion has a second protrusion (see annotated FIG. 8 above), and the first protrusion and the second protrusion face to each other (see annotated FIG. 8 above).
Regarding claim 10, Yong discloses a width of the first protrusion is the same or substantially the same as a width of the second protrusion (the first and second protrusions are identical, see annotated FIG. 8 above).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Yong et al.
Regarding claim 2, Yong has disclosed the optical module packaging structure outlined in the rejection to claim 1 above and further discloses the light emitting module emits vertically (see annotated FIG. 8 above) except the light emitting module further comprises a vertical-cavity surface-emitting laser (VCSEL). However, it’s well known in the art to use VCSEL to reduce power consumption. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the light emitting module of Yong with a VCSEL module in order to minimize power consumption of the optical module packaging structure.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Yong et al. in view of Pozder et al. (US PG Pub 2024/0413603 A1)
Regarding claim 4, Yong has disclosed the optical module packaging structure outlined in the rejection to claim 1 above except one end of the first connection portion is electrically connected to the circuit board through a solder, and the driver is electrically connected to the first connection pad through the circuit board, the solder and the first connection portion. Pozder discloses first and second connection portions (46/48, FIG. 2, [0031]) of a lead frame (16, FIG. 2, [0031]) are respectively electrically connected to a photonic chip carrier (12, FIG. 2, [0022]) via solder joints (50/52, FIG. 2, [0032]). The Examiner notes that the modified device of placing a solder joint between the first protrusion and the PCB of Yong implicitly discloses “the driver is electrically connected to the first connection pad through the circuit board, the solder and the first connection portion.” It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the optical module packaging structure of Yong with placing a solder joint between the first connection portion and the circuit board as taught by Pozder in order to stably secure the first connection portion to the circuit board.
Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Yong et al. in view of Ishio et al. (US Patent 6,118,184).
Regarding claims 5-6, Yong has disclosed the optical module packaging structure outlined in the rejection to claim 1 above except an electrically conductive adhesive layer, disposed between the first connection pad and the first connection portion of the lead frame, or a thermally conductive adhesive layer, disposed between the lead frame and a top of the electronic component. Ishio discloses an electrically or a thermally conductive adhesive layer (3b, FIG. 2, where 3b can be thermos-setting silver paste which is both electrically and thermally conductive, col. 7 lines 10-15), disposed between the lead frame (5, FIG. 2, col. 6 lines 40-42) and a top of the electronic component (1b, FIG. 2, col. 6 lines 37-39). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the optical module packaging structure of Yong with an electrically or a thermally conductive adhesive layer, disposed between the first connection pad and the first connection portion of the lead frame as taught by Ishio in order to avoid damage on the electronic component by providing elastic support/bond of the electronic component (col. 7 lines 47-50 of Ishio).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Galvano et al. (US PG Pub 2018/0278011 A1) discloses a laser diode mounted on a PCB, wherein a driver IC is embedded within the PCB (see FIG. 12).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YUANDA ZHANG whose telephone number is (571)270-1439. The examiner can normally be reached M-F 10:30 AM - 6:30 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MINSUN HARVEY can be reached at (571)272-1835. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/YUANDA ZHANG/Primary Examiner, Art Unit 2828