Prosecution Insights
Last updated: April 19, 2026
Application No. 18/455,999

SMART COMBINATION SWITCH FOR RAPID SEAMLESS EXTENDED REALITY (XR) CAMERA START AND RECOVERY

Non-Final OA §103
Filed
Aug 25, 2023
Examiner
VOLTAIRE, JEAN F
Art Unit
2417
Tech Center
2400 — Computer Networks
Assignee
Qualcomm Incorporated
OA Round
3 (Non-Final)
84%
Grant Probability
Favorable
3-4
OA Rounds
3y 0m
To Grant
99%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allow Rate
352 granted / 420 resolved
+25.8% vs TC avg
Strong +15% interview lift
Without
With
+15.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
33 currently pending
Career history
453
Total Applications
across all art units

Statute-Specific Performance

§101
3.5%
-36.5% vs TC avg
§103
57.7%
+17.7% vs TC avg
§102
22.5%
-17.5% vs TC avg
§112
4.0%
-36.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 420 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on March 02, 2026 has been entered. Response to amendment 3. This is a Non-Final Office action in response to applicant’s remarks and arguments filed on March 02, 2026. 4. Status of the claims: • Claims 1, 14, 27, and 29 have been amended. • Claims 1-30 are currently pending and have been examined. Response to remarks/arguments 5. Applicant’s remarks and arguments filed on March 02, 2026 with respect to amended independent claims 1, 14, 27, and 29 have been fully considered but are moot in view of the new ground(s) of rejection. Upon further search and consideration, a new ground(s) of rejection is made in view of Broedner et al. (US 5,675,811 A). 6. In response to Applicant’s remarks and arguments filed on March 02, 2026 regarding amended independent claims 1, 14, 27, and 29, the Examiner acknowledges that the combination of YONEKUBO et al. and Shin et al. does not explicitly teach the newly recited features as argued by Applicant. However, the system of Broedner et al. (US 5,675,811 A) cures this deficiency. Please see the rejection below. Claim Rejections - 35 USC § 103 7. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 8. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 9. The factual inquiries for establiBroednerg a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 10. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. 11. Claims 1-2, 14-15, 20-27, and 29-30 are rejected under 35 U.S.C. 103 as being unpatentable over YONEKUBO et al. (US 2009/0110002 A1) in view of Broedner et al. (US 5,675,811 A). Regarding claim 1, YONEKUBO discloses an apparatus for implementing self-synchronization of information data (Fig. 13: a broadcast reception apparatus), the apparatus comprising: a packet switch (Fig. 1, para. [0010][0027]: TS packet reproduction apparatus); a receive physical (RX PHY) layer interface coupled to the packet switch (Fig. 13, para. 28: tuner 232 coupled to the TS packet reproduction apparatus 11), the RX PHY layer interface configured to send the information data to the packet switch (YONEKUBO, para. [0028][0049][0076]: The TS packet reproduction apparatus 11 is provided inside a broadcast reception apparatus, and reproduces a transport stream from a tuner, and outputs audio and video signals), and wherein the packet switch is configured to suspend transmission of the information data prior to arrival of a start of transaction (SOT) field (YONEKUBO, Fig. 9, S22, para. [0049]: The TS packet reverse search unit 7 compares a PES header end position a in a given TS packet with a start code end position b (not shown in FIG. 6). When the PES header end position a is located in the rear of the start code end position b, the TS packet reverse search unit 7 determines the PES header length to be abnormal, and abandons the PES information). YONEKUBO does not appear to explicitly disclose the packet switch is configured to commence transmission of the information data with only complete packets upon arrival of the start of transaction (SOT) field as a self-synchronizing transmission commencement trigger. In the same field of endeavor, Broedner teaches the packet switch (Broedner, col. 4, lines 1-7: bus dispatch unit) is configured to commence transmission of the information data with only complete packets upon arrival of the start of transaction (SOT) field as a self-synchronizing transmission commencement trigger (Broedner, col. 4, lines 60-67 and col. 5, lines 1-3: when the addressed peripheral device receives command get, the peripheral device responds by sending a start of transmission command SOT that configures the IDCS bus to transmit data from the peripheral device to the bus dispatch unit. Start of transmission command SOT is followed by data packet or packets which are followed by an end of transmission command EOT that tells each bus interface circuit on the IDCS bus and the bus dispatch unit that the transaction is completed. The bus dispatch unit transmits an end of transmission command EOT to confirm that the data was received. Moreover, framed transmission (SOT-EOT) ensures complete packet/frame delivery. Further, SOT defines timing boundary for both ends, i.e., self-synchronizing transmission trigger). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO with the teaching of Broedner by using the above features such that the packet switch is configured to commence transmission of the information data with only complete packets upon arrival of the start of transaction (SOT) field as a self-synchronizing transmission commencement trigger as taught by Broedner. The motivation for doing so would have been to provide an efficient method for distinguishing commands for intelligent daisy-chainable serial (IDCS) bus operations from data transmitted over the IDCS bus (col. 2, lines 29-31). Regarding claim 2, YONEKUBO and Broedner disclose the apparatus of claim 1, wherein the receive physical (RX PHY) layer interface is further configured to send the start of transaction (SOT) field to the packet switch (YONEKUBO, para. [0049]: The TS packet reverse search unit 7 compares a PES header end position a in a given TS packet with a start code end position b (not shown in FIG. 6). When the PES header end position a is located in the rear of the start code end position b, the TS packet reverse search unit 7 determines the PES header length to be abnormal, and abandons the PES information (step S21). The video payload separator 3 separates the payloads at and after the start code, and stores the separated payloads in the video payload storage 4 (step S22). Then, the video payload storage 4 supplies the separated payloads to the audio/video decoder 6 (step S23)). Regarding claim 14, YONEKUBO discloses a method for implementing self-synchronization of information data (method of figure 10), the method comprising: determining whether there is arrival of a start of transaction (SOT) field (YONEKUBO, para. [0023][0047]: determining whether PES information is used, by comparing a PES header end position with a start code position, in addition to finding a start code by searching a TS packet from the rear end); suspending transmission of a first set of packets in an information data prior to arrival of the start of transaction (SOT) field (YONEKUBO, Fig. 9, S22, para. [0049]: The TS packet reverse search unit 7 compares a PES header end position a in a given TS packet with a start code end position b (not shown in FIG. 6). When the PES header end position a is located in the rear of the start code end position b, the TS packet reverse search unit 7 determines the PES header length to be abnormal, and abandons the PES information). YONEKUBO does not appear to explicitly disclose commencing transmission of a second set of packets in the information data with only complete packets upon arrival of the start of transaction (SOT) field as a self-synchronizing transmission commencement trigger. In the same field of endeavor, Broedner teaches commencing transmission of a second set of packets in the information data with only complete packets upon arrival of the start of transaction (SOT) field as a self-synchronizing transmission commencement trigger (Broedner, col. 4, lines 60-67 and col. 5, lines 1-3: when the addressed peripheral device receives command get, the peripheral device responds by sending a start of transmission command SOT that configures the IDCS bus to transmit data from the peripheral device to the bus dispatch unit. Start of transmission command SOT is followed by data packet or packets which are followed by an end of transmission command EOT that tells each bus interface circuit on the IDCS bus and the bus dispatch unit that the transaction is completed. The bus dispatch unit transmits an end of transmission command EOT to confirm that the data was received. Moreover, framed transmission (SOT-EOT) ensures complete packet/frame delivery. Further, SOT defines timing boundary for both ends, i.e., self-synchronizing transmission trigger). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO with the teaching of Broedner by using the above features into the system of YONEKUBO such that commencing transmission of a second set of packets in the information data with only complete packets upon arrival of the start of transaction (SOT) field as a self-synchronizing transmission commencement trigger as taught by Broedner. The motivation for doing so would have been to provide an efficient method for distinguishing commands for intelligent daisy-chainable serial (IDCS) bus operations from data transmitted over the IDCS bus (col. 2, lines 29-31). Regarding claim 15, YONEKUBO and Broedner disclose the method of claim 14, further comprising receiving the start of transaction (SOT) field from a receive physical (RX PHY) layer interface (YONEKUBO, para. [0049]: The TS packet reverse search unit 7 compares a PES header end position a in a given TS packet with a start code end position b (not shown in FIG. 6). When the PES header end position a is located in the rear of the start code end position b, the TS packet reverse search unit 7 determines the PES header length to be abnormal, and abandons the PES information (step S21). The video payload separator 3 separates the payloads at and after the start code, and stores the separated payloads in the video payload storage 4 (step S22). Then, the video payload storage 4 supplies the separated payloads to the audio/video decoder 6 (step S23)). Regarding claim 20, YONEKUBO and Broedner disclose the method of claim 14, further comprising determining whether there is arrival of a start of frame (SOF) field (YONEKUBO, para. [0023][0047]: determining whether PES information is used, by comparing a PES header end position with a start code position, in addition to finding a start code by searching a TS packet from the rear end). Regarding claim 21, YONEKUBO and Broedner disclose the method of claim 20, further comprising suspending transmission of a first set of frames in the information data prior to arrival of the start of frame (SOF) field (YONEKUBO, Fig. 9, S22, para. [0049]: The TS packet reverse search unit 7 compares a PES header end position a in a given TS packet with a start code end position b (not shown in FIG. 6). When the PES header end position a is located in the rear of the start code end position b, the TS packet reverse search unit 7 determines the PES header length to be abnormal, and abandons the PES information). Regarding claim 22, YONEKUBO and Broedner disclose the method of claim 21, further comprising commencing transmission of the second set of frames in the information data upon the arrival of the SOF field (YONEKUBO, Fig. 9, para. [0047]: processing the TS packet including a PES header by the TS packet reproduction apparatus 11). Regarding claim 23, YONEKUBO and Broedner disclose the method of claim 22, further comprising enabling a frame switch to commence the transmission of the second set of frames (YONEKUBO, para. [0020][0034]: triggering a start of identifier detection, for example packet header identifier decoding, in response to enabling the new virtual channel). Regarding claim 24, YONEKUBO and Broedner disclose the method of claim 23, wherein the frame switch is enabled after a sensor activation or an error recovery reset (YONEKUBO, para. [0054]: when an error flag in a TS packet with a payload continued to a subsequent packet is set, and error flags in two TS packets subsequent to the TS packet including the error flag are set, in step S24, the TS packet reverse search unit 7 abandons the payload (the first payload) in a TS packet next to the TS packet including the error flag. The TS packet reverse search unit 7 separates the payloads at and after the second payload, and stores the separated payloads in the video payload storage 4 (step S25). Then, the video payload storage 4 supplies the separated payloads to the audio/video decoder 6 (step S26)). Regarding claim 25, YONEKUBO and Broedner disclose the method of claim 24, further comprising enabling a packet switch to commence the transmission of the second set of packets (YONEKUBO, para. [0020][0034], 36: triggering a start of identifier detection, for example packet header identifier decoding, in response to enabling the new virtual channel). Regarding claim 26, YONEKUBO and Broedner disclose the method of claim 25, wherein the packet switch is enabled after the sensor activation or the error recovery reset (YONEKUBO, para. [0054]: when an error flag in a TS packet with a payload continued to a subsequent packet is set, and error flags in two TS packets subsequent to the TS packet including the error flag are set, in step S24, the TS packet reverse search unit 7 abandons the payload (the first payload) in a TS packet next to the TS packet including the error flag. The TS packet reverse search unit 7 separates the payloads at and after the second payload, and stores the separated payloads in the video payload storage 4 (step S25). Then, the video payload storage 4 supplies the separated payloads to the audio/video decoder 6 (step S26)). Regarding claim 27, YONEKUBO discloses an apparatus for implementing self-synchronization of information data (Fig. 13: a broadcast reception apparatus), the apparatus comprising: means for determining whether there is arrival of a start of transaction (SOT) field (YONEKUBO, para. [0023][0047]: determining whether PES information is used, by comparing a PES header end position with a start code position, in addition to finding a start code by searching a TS packet from the rear end); means for suspending transmission of a first set of packets in an information data prior to arrival of the start of transaction (SOT) field (YONEKUBO, Fig. 9, S22, para. [0049]: The TS packet reverse search unit 7 compares a PES header end position a in a given TS packet with a start code end position b (not shown in FIG. 6). When the PES header end position a is located in the rear of the start code end position b, the TS packet reverse search unit 7 determines the PES header length to be abnormal, and abandons the PES information). YONEKUBO does not appear to explicitly disclose means for commencing transmission of a second set of packets in the information with only complete packets upon arrival of the start of transaction (SOT) field as a self-synchronizing transmission commencement trigger. In the same field of endeavor, Broedner discloses means for commencing transmission of a second set of packets in the information with only complete packets upon arrival of the start of transaction (SOT) field as a self-synchronizing transmission commencement trigger (Broedner, col. 4, lines 60-67 and col. 5, lines 1-3: when the addressed peripheral device receives command get, the peripheral device responds by sending a start of transmission command SOT that configures the IDCS bus to transmit data from the peripheral device to the bus dispatch unit. Start of transmission command SOT is followed by data packet or packets which are followed by an end of transmission command EOT that tells each bus interface circuit on the IDCS bus and the bus dispatch unit that the transaction is completed. The bus dispatch unit transmits an end of transmission command EOT to confirm that the data was received. Moreover, framed transmission (SOT-EOT) ensures complete packet/frame delivery. Further, SOT defines timing boundary for both ends, i.e., self-synchronizing transmission trigger). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO with the teaching of Broedner by using the above features into the system of YONEKUBO such that commence transmission of the information data with at least one complete self-synchronized upon arrival of the start of transaction (SOT) field as taught by Broedner. The motivation for doing so would have been to provide high-performance for applications at a low cost. Regarding claim 29, YONEKUBO discloses a non-transitory computer-readable medium storing computer executable code, operable on a device comprising at least one processor (Fig. 13: Processor 237) and at least one memory (Fig. 13: Memory 235) coupled to the at least one processor, wherein the at least one processor is configured to implement self-synchronization of information data (Fig. 13, para. [0065]), the computer executable code comprising: instructions for causing a computer to determine whether there is arrival of a start of transaction (SOT) field (YONEKUBO, para. [0023][0047]: determining whether PES information is used, by comparing a PES header end position with a start code position, in addition to finding a start code by searching a TS packet from the rear end); instructions for causing the computer to suspend transmission of a first set of packets in an information data prior to arrival of the start of transaction (SOT) field (YONEKUBO, Fig. 9, S22, para. [0049]: The TS packet reverse search unit 7 compares a PES header end position a in a given TS packet with a start code end position b (not shown in FIG. 6). When the PES header end position a is located in the rear of the start code end position b, the TS packet reverse search unit 7 determines the PES header length to be abnormal, and abandons the PES information). YONEKUBO does not appear to explicitly disclose commence transmission of a second set of packets in the information with only complete packets upon arrival of the start of transaction (SOT) field as a self-synchronizing transmission commencement trigger. In the same field of endeavor, HERRMANN discloses commence transmission of a second set of packets in the information with only complete packets upon arrival of the start of transaction (SOT) field as a self-synchronizing transmission commencement trigger (Broedner, col. 4, lines 60-67 and col. 5, lines 1-3: when the addressed peripheral device receives command get, the peripheral device responds by sending a start of transmission command SOT that configures the IDCS bus to transmit data from the peripheral device to the bus dispatch unit. Start of transmission command SOT is followed by data packet or packets which are followed by an end of transmission command EOT that tells each bus interface circuit on the IDCS bus and the bus dispatch unit that the transaction is completed. The bus dispatch unit transmits an end of transmission command EOT to confirm that the data was received. Moreover, framed transmission (SOT-EOT) ensures complete packet/frame delivery. Further, SOT defines timing boundary for both ends, i.e., self-synchronizing transmission trigger). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO with the teaching of Broedner by using the above features into the system of YONEKUBO such that commencing transmission of a second set of packets in the information data with at least one complete self-synchronized upon the arrival of the start of transaction as taught by Broedner. The motivation for doing so would have been to provide high-performance for applications at a low cost. Regarding claim 30, YONEKUBO discloses the non-transitory computer-readable medium of claim 29, further comprising instructions for causing the computer to perform the following: determine whether there is arrival of a start of frame (SOF) field (YONEKUBO, para. 23, 47: determining whether PES information is used, by comparing a PES header end position with a start code position, in addition to finding a start code by searching a TS packet from the rear end); suspend transmission of a first set of frames in the information data prior to arrival of the start of frame (SOF) field (YONEKUBO, Fig. 9, S22, para. [0049]: The TS packet reverse search unit 7 compares a PES header end position a in a given TS packet with a start code end position b (not shown in FIG. 6). When the PES header end position a is located in the rear of the start code end position b, the TS packet reverse search unit 7 determines the PES header length to be abnormal, and abandons the PES information); and YONEKUBO does not appear to explicitly disclose commence transmission of the second set of frames in the information data upon arrival of the start of the SOT field. In the same field of endeavor, HERRMANN discloses commence transmission of the second set of frames in the information data upon arrival of the start of the SOT field (Broedner, col. 4, lines 60-67 and col. 5, lines 1-3: when the addressed peripheral device receives command get, the peripheral device responds by sending a start of transmission command SOT that configures the IDCS bus to transmit data from the peripheral device to the bus dispatch unit. Start of transmission command SOT is followed by data packet or packets which are followed by an end of transmission command EOT that tells each bus interface circuit on the IDCS bus and the bus dispatch unit that the transaction is completed. The bus dispatch unit transmits an end of transmission command EOT to confirm that the data was received). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO with the teaching of Broedner by using the above features into the system of YONEKUBO such that commence transmission of the second set of frames in the information data upon arrival of the start of the SOT field as taught by Broedner. The motivation for doing so would have been to provide high-performance for applications at a low cost. 12. Claims 3-13, 28 are rejected under 35 U.S.C. 103 as being unpatentable over YONEKUBO et al. (US 20090110002 A1) in view of Broedner et al. (US 5,675,811 A) and further in view of HERRMANN et al. (US 20190057046 A1). Regarding claim 3, YONEKUBO and Broedner disclose all the subject matter of the apparatus of claim 2, but fails to disclose, however, in the same field of endeavor, Herrmann further teaches comprising a software module coupled to the packet switch, wherein the software module is configured to enable the packet switch (HERRMANN, para. 16, 17: the software-based control of the number of virtual channels that are to be processed and stored may be performed dynamically by enabling each individual virtual channel). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO and Broedner with the teaching of HERRMANN by using the above features into the system of YONEKUBO such that a software module coupled to the packet switch to enable the packet switch as taught by HERRMANN. The motivation for doing so would have been to provide a software-controlled capability to perform sub-sampling of the video frames on different virtual channels. Regarding claim 4, YONEKUBO, Broedner, and Herrmann disclose the apparatus of claim 3, wherein the packet switch is enabled after a sensor activation or an error recovery reset (YONEKUBO, para. [0054]: when an error flag in a TS packet with a payload continued to a subsequent packet is set, and error flags in two TS packets subsequent to the TS packet including the error flag are set, in step S24, the TS packet reverse search unit 7 abandons the payload (the first payload) in a TS packet next to the TS packet including the error flag. The TS packet reverse search unit 7 separates the payloads at and after the second payload, and stores the separated payloads in the video payload storage 4 (step S25). Then, the video payload storage 4 supplies the separated payloads to the audio/video decoder 6 (step S26)). Regarding claim 5, YONEKUBO and Broedner disclose all the subject matter of the apparatus of claim 2, but fails to disclose, however, HERRMANN teaches further comprising a camera serial interface (CSI) decoder (CSID) coupled to the packet switch, wherein the CSID is configured to receive the information data from the packet switch (HERRMANN, para. 18, 27: a mechanism to enable virtual channels in a MIPI CSI2 application notably during reception of video data). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO and Broedner with the teaching of HERRMANN by using the above features into the system of YONEKUBO such that a camera serial interface (CSI) decoder to receive the information data from the packet switch as taught by HERRMANN. The motivation for doing so would have been to provide a software-controlled capability to perform sub-sampling of the video frames on different virtual channels. Regarding claim 6, YONEKUBO, Broedner, and HERRMANN disclose all the subject matter of the apparatus of claim 5, however, HERRMANN teaches further comprising a frame switch coupled to the CSID, wherein the frame switch is configured to receive a start of frame (SOF) field from the CSID (HERRMANN, para. 31: receiving a frame start on the enabled channel). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO and Broedner with the teaching of HERRMANN by using the above features into the system of YONEKUBO such that receiving a start of frame (SOF) field from the CSID as taught by HERRMANN. The motivation for doing so would have been to provide a software-controlled capability to perform sub-sampling of the video frames on different virtual channels. Regarding claim 7, YONEKUBO, Broedner, and HERRMANN disclose all the subject matter of the apparatus of claim 6, however, HERRMANN further teaches wherein the CSID is further configured to decode the information data to generate a decoded information data to send to the frame switch (HERRMANN, para. 27-28: The virtual channel data decoder 320 uses the clock signals to correctly and simultaneously decode the video data received on each of the four paired virtual channels 304. The decoded video data, for those selected paired virtual channels from the four paired virtual channels, is then relayed 322 to memory 330 where the selected video data is stored). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO and Broedner with the teaching of HERRMANN by using the above features into the system of YONEKUBO such that decoding the information data to generate a decoded information data to send to the frame switch as taught by HERRMANN. The motivation for doing so would have been to provide a software-controlled capability to perform sub-sampling of the video frames on different virtual channels. Regarding claim 8, YONEKUBO, Broedner, and Herrmann disclose the apparatus of claim 7, wherein the frame switch is further configured to suspend transmission of a first set of frames in the decoded information data prior to arrival of a start of frame (SOF) field (YONEKUBO, Fig. 9, S22, para. [0049]: The TS packet reverse search unit 7 compares a PES header end position a in a given TS packet with a start code end position b (not shown in FIG. 6). When the PES header end position a is located in the rear of the start code end position b, the TS packet reverse search unit 7 determines the PES header length to be abnormal, and abandons the PES information). Regarding claim 9, YONEKUBO, Broedner, and Herrmann disclose the apparatus of claim 8, wherein the frame switch is further configured to commence transmission of a second set of frames in the decoded information data upon arrival of the SOF field (YONEKUBO, Fig. 9, para. [0047]: processing the TS packet including a PES header by the TS packet reproduction apparatus 11). Regarding claim 10, YONEKUBO, Broedner, and Herrmann disclose the apparatus of claim 9, further comprising an image signal processor (ISP) coupled to the frame switch, wherein the ISP is configured to receive the decoded information data from the frame switch (YONEKUBO, para. [0041][0049]: receiving the decoded PES information from the frame switch). Regarding claim 11, YONEKUBO, Broedner, and Herrmann disclose the apparatus of claim 10, wherein the ISP is further configured to process the decoded information data to generate a processed information data in a format compatible with an image display device (YONEKUBO, para. [0068]: a display 234 to display operating information and photo images. The output terminal of the TS packet reproduction unit 11 is connected to the display 234 and speaker 224.). Regarding claim 12, YONEKUBO, Broedner, and Herrmann disclose all the subject matter of the apparatus of claim 10, and further, HERRMANN teaches further comprising a software module coupled to the frame switch, wherein the software module is configured to enable the frame switch (HERRMANN, para. 16, 17: the software-based control of the number of virtual channels that are to be processed and stored may be performed dynamically by enabling each individual virtual channel). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO and Broedner with the teaching of HERRMANN by using the above features into the system of YONEKUBO such that a software module coupled to the packet switch to enable the packet switch as taught by HERRMANN. The motivation for doing so would have been to provide a software-controlled capability to perform sub-sampling of the video frames on different virtual channels. Regarding claim 13, YONEKUBO, Broedner, and Herrmann disclose the apparatus of claim 12, wherein the frame switch is enabled after a sensor activation or an error recovery reset (YONEKUBO, para. [0054]: when an error flag in a TS packet with a payload continued to a subsequent packet is set, and error flags in two TS packets subsequent to the TS packet including the error flag are set, in step S24, the TS packet reverse search unit 7 abandons the payload (the first payload) in a TS packet next to the TS packet including the error flag. The TS packet reverse search unit 7 separates the payloads at and after the second payload, and stores the separated payloads in the video payload storage 4 (step S25). Then, the video payload storage 4 supplies the separated payloads to the audio/video decoder 6 (step S26)). Regarding claim 28, YONEKUBO and Broedner disclose the apparatus of claim 27, further comprising: means for determining whether there is arrival of a start of frame (SOF) field (YONEKUBO, para. [0023][0047]: determining whether PES information is used, by comparing a PES header end position with a start code position, in addition to finding a start code by searching a TS packet from the rear end); means for suspending transmission of a first set of frames in the information data prior to arrival of the start of frame (SOF) field (YONEKUBO, Fig. 9, S22, para. 49: abandons the PES information). Although YONEKUBO and Broedner disclose processing the TS packet including a PES header by the TS packet reproduction apparatus (see YONEKUBO, Fig. 9, para. [0047]), but YONEKUBO does not appear to explicitly disclose commence transmission of the information data upon arrival of the start of transaction (SOT) field. In the same field of endeavor, HERRMANN teaches commence transmission of the information data upon arrival of the start of transaction (SOT) field (HERRMANN, para. [0036]: a start of transmission (SoT) for virtual channel ‘0’ occurs, with a Frame Start (FS) transmission at 406 followed by an end of transmission (EoT) at 408. At 434, another start of transmission (SoT) for virtual channel ‘1’ occurs, with a packet header (PH), Data transmission and Packet Footer (PF) at 435 followed by an end of transmission (EoT) at 438). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO and Broedner with the teaching of HERRMANN by using the above features into the system of YONEKUBO such that commencing transmission of a second set of packets in the information data upon the arrival of the start of transaction (SOT) field as taught by HERRMANN. The motivation for doing so would have been to provide a software-controlled capability to perform sub-sampling of the video frames on different virtual channels. 13. Claims 16-19 are rejected under 35 U.S.C. 103 as being unpatentable over YONEKUBO et al. (US 20090110002 A1) in view of Broedner et al. (US 5,675,811 A) and further in view of Hsiao (US 20070116066 A1). Regarding claim 16, YONEKUBO and Broedner disclose the method of claim 15, but fails to teach, in the same field of endeavor Hsiao teaches wherein the transmission of the second set of packets is over a single lane interface (Hsiao, para. [0014]: the packet should be transmitted sequentially according to the lane order, and the lane by which the start framing symbol can be transmitted is identified). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO and Broedner with the teaching of Hsiao by using the above features into the system of YONEKUBO such that the transmission of the second set of packets is over a single lane interface as taught by Hsiao. The motivation for doing so would have been to provide a method to determine whether a predetermined error condition is satisfied when a start framing symbol of a packet appears in the PCI express bus link. Regarding claim 17, YONEKUBO, Broedner, and Hsiao disclose the method of claim 16, however, Hsiao further teaches wherein the single lane interface includes one lane of information data at its output (Hsiao, para. [0014][0021]: the packet should be transmitted sequentially according to the lane order, and the lane by which the start framing symbol can be transmitted is identified). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO and Broedner with the teaching of Hsiao by using the above features into the system of YONEKUBO such that the single lane interface includes one lane of information data at its output as taught by Hsiao. The motivation for doing so would have been to provide a method to determine whether a predetermined error condition is satisfied when a start framing symbol of a packet appears in the PCI express bus link. Regarding claim 18, YONEKUBO and Broedner disclose the method of claim 15, but fails to teach, however, Hsiao teaches wherein the transmission of the second set of packets is over a multiple lane interface (Hsiao, para. 14, 24: the PCI express bus link specification allows for x1, x2, x4, x8, x12, x16, and x32 lanes. When number of lanes exceeds 1, the packet should be transmitted sequentially according to the lane order, and the lane by which the start framing symbol can be transmitted is identified). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO and Broedner with the teaching of Hsiao by using the above features into the system of YONEKUBO such that the transmission of the second set of packets is over a multiple lane interface as taught by Hsiao. The motivation for doing so would have been to provide a method to determine whether a predetermined error condition is satisfied when a start framing symbol of a packet appears in the PCI express bus link. Regarding claim 19, YONEKUBO, Broedner, and Hsiao disclose the method of claim 18, however, Hsiao further teaches wherein the multiple lane interface includes two or more lanes of information data at its output (Hsiao, para. 17: assume a PCI express bus link has 16 lanes (lane 0. about. lane 15), and a start framing symbol appears at lane 8 while no packet end symbol is transmitted by lane 7. Such condition could be resulted from unrecognizing the end framing symbol at the pervious lane due to an error signal of the PCI express bus link. In the present invention, the problem is solved by ignoring the start framing symbol of the present lane, and in the previous packet by the following end framing symbol.). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to combine the teaching of YONEKUBO and Broedner with the teaching of Hsiao by using the above features into the system of YONEKUBO such that the multiple lane interface includes two or more lanes of information data at its output as taught by Hsiao. The motivation for doing so would have been to provide a method to determine whether a predetermined error condition is satisfied when a start framing symbol of a packet appears in the PCI express bus link. Conclusion 14. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JEAN F VOLTAIRE whose telephone number is (571)272-3953. The examiner can normally be reached M-F 9:30-6:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, REBECCA E. SONG can be reached at (571)270-3667. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JEAN F VOLTAIRE/Examiner, Art Unit 2417 /REBECCA E SONG/Supervisory Patent Examiner, Art Unit 2417
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Prosecution Timeline

Aug 25, 2023
Application Filed
Aug 23, 2025
Non-Final Rejection — §103
Nov 10, 2025
Response Filed
Dec 30, 2025
Final Rejection — §103
Mar 02, 2026
Request for Continued Examination
Mar 11, 2026
Response after Non-Final Action
Mar 21, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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3-4
Expected OA Rounds
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99%
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3y 0m
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