DETAILED ACTION
Response to Amendment
Applicant’s amendment, filed 05/11/26, for application number 18/456,965 has been received and entered into record. Claims 2, 11, and 17 have been amended, Claim 1 was previously cancelled, Claims 10 and 21 have been newly cancelled, and Claims 22 and 23 are newly added. Therefore, Claims 2-9, 11-20, 22, and 23 are presented for examination.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 2, 5, 6, 11, 14, 15, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Surapuram view of Lam et al., US 2013/0326253 A1, and further in view of Gathala et al., US 2015/0046679 A1.
Regarding Claim 2, Surapuram discloses a memory comprising instructions to cause programmable circuitry [storage device 410, Fig. 4] to at least:
determine whether an event associated with a first application is a priority event;
in response to the event not being the priority event, adjust a first operation associated with the first application based on an operation management characteristic to improve a user experience associated with a second application, the second application different than the first application; and
in response to the event being the priority event, permit execution of a second operation associated with the second application [according to some example embodiments of the inventive concepts, when a high priority or emergency operation is performed, the host device may issue a pause command to pause one or more of the logical units to increase the turnaround time of the high priority or emergency operation. Further, the host device may resume the paused logical units once the high priority or the emergency operation is completed. Also, the paused logical units can automatically be resumed by the device controller on completion of ongoing high priority operation, (that is, a determination is made as to whether a command is a high priority command, and if so, all other functions are paused while the high priority operation runs; otherwise, non-priority operations are performed, which allows one or more logical units to remain unpaused), par 41].
However, Surapuram does not explicitly teach the event associated with at least one of launching the first application, launching a second application, responding to a user interface event, or responding to a touch input; and in response to the event not being the priority event, adjust a first operation associated with the first application to reduce power consumption associated with the first application based on an operation management characteristic of the first application, the reduction in power consumption associated with the first application.
In the analogous art of managing operating modes, Lam teaches the event associated with at least one of launching the first application, launching a second application, responding to a user interface event, or responding to a touch input [a gesture from a user toggles the mobile device 100 between sleep modes; gestures on the touch screen place the system into sleep mode, par 20].
It would have been obvious to one of ordinary skill in the art, having the teachings of Surapuram and Lam before him before the effective filing date of the claimed invention to incorporate the adjusting via operating system program interface as taught by Lam, into the memory as disclosed by Surapuram, to provide ease of use to the user without the need for mechanical toggling buttons [Lam, par 7].
However, the combination of Surapuram and Lam do not explicitly teach in response to the event not being the priority event, adjust a first operation associated with the first application to reduce power consumption associated with the first application based on an operation management characteristic of the first application, the reduction in power consumption associated with the first application.
Gathala teaches in response to the event not being the priority event, adjust a first operation associated with the first application to reduce power consumption associated with the first application based on an operation management characteristic of the first application, the reduction in power consumption associated with the first application [processors and programmable resources to run in a lower power, lower frequency and/or lower performance mode when non-critical applications or low load conditions are detected (i.e. when non-priority events are detected, processors and programmable resources, and by extension, the applications being execute, are in a low power/performance mode), par 53.
It would have been obvious to one of ordinary skill in the art, having the teachings of Surapuram, Lam, and Gathala before him before the effective filing date of the claimed invention to incorporate the reduction of power consumption associated with the first application as taught by Gathala, into the memory as disclosed by Surapuram and Lam, to maximize battery life [Gathala, par 53].
Regarding Claim 5, Surapuram, Lam, and Gathala disclose the memory as defined in Claim 2. Surapuram further discloses wherein the instructions cause the programmable circuitry to deny the first operation corresponding to the operation management characteristic in response to the event not being the priority event [when a high priority or emergency operation is performed, the host device may issue a pause command to pause one or more of the logical units to increase the, par 41].
Regarding Claim 6, Surapuram, Lam, and Gathala disclose the memory as defined in Claim 2. Lam further teaches wherein the instructions cause the programmable circuitry to adjust an operation via an operating system application program interface [a gesture from a user toggles the mobile device 100 between sleep modes; gestures on the touch screen place the system into sleep mode, par 20].
Regarding Claim 11, Surapuram discloses an apparatus [computing device 400, Fig. 4] comprising: interface circuitry [I/O devices 406]; instructions [stored on storage device 410]; and programmable circuitry [device 400 and device controller 104].
The remainder of Claim 11 repeats the same limitations as recited in Claim 2, and is rejected accordingly.
Regarding Claims 14 and 15, Surapuram, Lam, and Gathala disclose the apparatus as defined in Claim 11. Claims 14 and 15 repeat the same limitations as recited in Claim 5 and 6, and are rejected accordingly.
Regarding Claim 17, Surapuram discloses a method [using device 400, Fig. 4]. The remainder of Claim 17 repeats the same limitations as recited in Claim 2, and is rejected accordingly.
Claims 3, 4, 12, and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Surapuram, Lam, and Gathala, and further view of Tran, US 2013/0015978 A1.
Regarding Claim 3, Surapuram, Lam, and Gathala disclose the memory as defined in Claim 2. However, the combination of references does not explicitly teach wherein the instructions cause the programmable circuitry to adjust the first operation to avoid an overheating condition.
In the analogous art of computer management, Tran teaches wherein the instructions causing programmable circuitry to adjust an operation to avoid an overheating condition [user can set the system to be adjusted to various options, including a hibernate or shut-down option to prevent overheating, step S581, Fig. 5].
It would have been obvious to one of ordinary skill in the art, having the teachings of Surapuram, Lam, Gathala, and Tran before him before the effective filing date of the claimed invention, to incorporate the overheating protection as taught by Tran, into the memory as disclosed by Surapuram, Lam, and Gathala to provide overheating protection and avoid hardware failure of the computer [Tran, par 4].
Regarding Claim 4, Surapuram, Lam, and Gathala discloses the memory as defined in Claim 2. However, the combination of references does not explicitly teach wherein the instructions cause the programmable circuitry to adjust an operation to control a notification.
In the analogous art of computer management, Tran teaches wherein the instructions cause the programmable circuitry to adjust an operation to control a notification [user alerted of the power setting, step 512, 514, Fig. 5].
It would have been obvious to one of ordinary skill in the art, having the teachings of Surapuram, Lam, Gathala, and Tran before him before the effective filing date of the claimed invention, to incorporate the notification as taught by Tran, into the memory as disclosed by Surapuram, Lam, and Gathala to provide warning notifications to the user and avoid hardware failure of the computer [Tran, par 4].
Regarding Claims 12 and 13, Surapuram, Lam, and Gathala disclose the apparatus as defined in Claim 11. Claims 12 and 13 repeat the same limitations as recited in Claims 3 and 4, and are rejected accordingly.
Claims 7, 16, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Surapuram, Lam, and Gathala, and further view of Fletcher et al., US 2016/0239024 A1.
Regarding Claim 7, Surapuram, Lam, and Gathala disclose the memory as defined in Claim 2. However, the combination of references does not explicitly teach wherein the instructions cause the programmable circuitry to generate an execution length estimate for the priority event.
In the analogous art of prioritizing task management, Fletcher teaches wherein the instructions cause the programmable circuitry to generate an execution length estimate for the priority event [calculating the start time and the estimated duration of the critical event, par 89, ll. 12-14].
It would have been obvious to one of ordinary skill in the art, having the teachings of Surapuram, Lam, Gathala, and Fletcher before him before the effective filing date of the claimed invention, to incorporate the execution length estimate as taught by Fletcher into the memory as disclosed by Surapuram, Lam, and Gathala to allow for dynamic reorganization an execution of tasks [Fletcher, par 3].
Regarding Claims 16 and 18, Surapuram, Lam, and Gathala disclose the apparatus as defined in Claim 11, and the method as defined in Claim 17, respectively. Claims 16 and 18 repeat the same limitation as recited in Claim 7, and are rejected accordingly.
Claims 8, 9, 19, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Surapuram, Lam, and Gathala, and further in view of Rotem et al., US 2010/0064162 A1.
Regarding Claim 8, Surapuram, Lam, and Gathala disclose the memory as defined in Claim 2. However, the combination of references does not explicitly teach wherein the instructions cause the programmable circuitry to authorize the second operation to exceed a thermal threshold.
In the analogous art of power management, Rotem teaches wherein the instructions cause the programmable circuitry to authorize the second operation to exceed a thermal threshold [the operational parameters may include one or more transitory operational parameters that cause the processor to temporarily exceed the TDP limit for the apparatus, par 28, ll. 1-4].
It would have been obvious to one of ordinary skill in the art, having the teachings of Surapuram, Lam, Gathala, and Rotem before him before the effective filing date of the claimed invention, to incorporate temporarily exceeding a thermal threshold as taught by Rotem, into the memory as disclosed by Surapuram, Lam, and Gathala, to allow for more efficient system operation by taking into account specifical thermal responses of particular systems [Rotem, par 2].
Regarding Claim 9, Surapuram, Lam, Gathala, and Rotem disclose the memory as defined in Claim 8. Rotem further teaches wherein the instructions cause the programmable circuitry to authorize the second operation to exceed the thermal threshold for a threshold period of time [The management module 112 may take advantage of the additional thermal headroom provided by a cold system to allow the processor cores 102-1-m to operate in a higher performance state (e.g., P-state) for a limited period of time to improve processor performance (e.g., speed) while avoiding damage to the processor cores 102-1-m or other platform components 119 of a computer platform, par 29].
Regarding Claims 19 and 20, Surapuram, Lam, and Gathala disclose the method as defined in Claim 17. Claims 19 and 20 repeat the same limitations as recited in Claims 8 and 9, respectively, and are rejected accordingly.
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Surapuram, Lam, and Gathala, and further in view of Jerding et al., US 2002/0104097 A1.
Regarding Claim 22, Surapuram, Lam, and Gathala disclose the memory as defined in Claim 2. However, the combination of references does not explicitly teach wherein the instructions cause the programmable circuitry to determine whether the event is the priority event based on a stored registry of priority events designated by at least one of an application, an operating system, or an original equipment manufacturer.
Jerding teaches determining whether the event is the priority event based on a stored registry of priority events designated by at least one of an application, an operating system, or an original equipment manufacturer [the table of priorities is a dynamic listing of priorities maintained by the operating system 33 as applications and their corresponding data are downloaded to the DHCT 16, par 59].
It would have been obvious to one of ordinary skill in the art, having the teachings of Surapuram, Lam, Gathala, and Jerding before him before the effective filing date of the claimed invention, to incorporate the registry of priority events designated by an operation system as taught by Jerding, into the memory as disclosed by Surapuram, Lam, and Gathala, to allow for updating the list of essential resources as applications and data are downloaded and transferred [Jerding, par 59].
Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Surapuram, Lam, and Gathala, and further in view of Loffink et al., US 2007/0170783 A1.
Regarding Claim 23, Surapuram, Lam, and Gathala disclose the memory as defined in Claim 2. However, the combination of references does not explicitly teach wherein the instructions cause the programmable circuitry to permit the execution of the second operation based on a residual energy budget maintained separately from a system energy budget.
Loffink teaches wherein the instructions cause the programmable circuitry to permit the execution of the second operation based on a residual energy budget maintained separately from a system energy budget [For critical applications the power supply may be powered from separate alternating current (AC) power sources, e.g., from independent utility power grids, par 3].
It would have been obvious to one of ordinary skill in the art, having the teachings of Surapuram, Lam, Gathala, and Loffink before him before the effective filing date of the claimed invention, to incorporate the registry of priority events designated by an operation system as taught by Loffink, into the memory as disclosed by Surapuram, Lam, and Gathala, so that the loss of primary power from one power source will not totally disable operation of the information handling system [Loffink, par 3].
Response to Arguments
Applicant’s arguments filed 05/11/26 have been considered but are moot due to the new rejection based on the references cited above, as well as the newly cited portions of the references previously presented.
Conclusion
Applicant is reminded that in amending a response to a rejection of claims, the patentable novelty must be clearly shown in view of the state of the art disclosed by the references cited and the objections made. Applicant must also show how the amendments avoid such references and objections. See 37 CFR §1.111(c).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAUL J YEN whose telephone number is (571)270-5047. The examiner can normally be reached M-F 8-5 PT.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew J Jung can be reached at (571) 270-3779. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Paul Yen/Primary Examiner, Art Unit 2175
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