DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 6 and 12-13 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tanigawa (JP 2012-154641 cited by applicant).
Regarding claims 1, 6 and 12-13, Tanigawa teaches a voltage measurement system that measures a voltage of a battery cell, the voltage measurement system comprising:
a first reference signal transmission device (4) including a first master oscillator (8) that generates a first master clock signal and a first reference signal generation circuit (41) that generates a first reference signal based on the first master clock signal; and
a first voltage measurement device (3) including a first slave oscillator (35) that generates a first clock signal, a first correction circuit (34) that corrects an oscillation frequency of the first slave oscillator based on the first reference signal (para. 62), a first voltage measurement circuit (32), and a first measurement control circuit that controls the first voltage measurement circuit based on the first clock signal,
wherein the voltage measurement system includes:
a normal mode in which a command signal is transmitted and received between the first reference signal transmission device and the first voltage measurement device (para. 43); and
a correction mode in which the first reference signal is transmitted from the first reference signal transmission device to the first voltage measurement device, and the oscillation frequency of the first slave oscillator is synchronized with an oscillation frequency of the first master oscillator using the first reference signal (para. 56-59);
wherein the first measurement control circuit causes the first voltage measurement circuit to measure voltage in a cycle determined based on the first clock signal (para. 70) [claim 6]; and
a second voltage measurement device that receives the first reference signal via the first voltage measurement device, wherein the second voltage measurement device includes: a second slave oscillator that generates a second clock signal; a second correction circuit that corrects an oscillation frequency of the second slave oscillator based on the first reference signal; a second voltage measurement circuit; and a second measurement control circuit that controls the second voltage measurement circuit based on the second clock signal (the system includes a plurality of monitoring ICs 3) [claim 12];
wherein the first reference signal transmission device further includes:
a voltage measurement circuit,
a measurement control circuit that controls the voltage measurement circuit based on the first master clock signal (para. 37) [claim 13].
Allowable Subject Matter
Claims 2-5, 7-11 and 14-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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MINH Q. PHAN
Primary Examiner
Art Unit 2852
/MINH Q PHAN/Primary Examiner, Art Unit 2852
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