Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 5, which is depended on claim 1, wherein claim 1 is based on Fig. 7, discloses “a first diode (31) that is connected to the radio-frequency input terminal (110 or gate of transistor (11)) and to the bias path between the first resistor (54) and a gate of the first transistor (11).” However, claim 5, which is based on Fig. 7, recited “wherein a cathode of the first diode (31) is connected to the gate of the first transistor (11), wherein a first terminal of the first resistor is connected to a first node on a signal path, the signal path connecting the radio-frequency input terminal and the gate of the first transistor, wherein a second terminal of the first resistor is connected to a cathode of the second diode and to a gate of the second transistor, wherein the gate of the second transistor, the first resistor, the first node, and the gate of the first transistor are in the bias path, and wherein the power supply circuit comprises: a third transistor (44) having a gate, a drain, and a source, the gate being connected to a first current source circuit (41) and to a drain or a source of the second transistor (21), one of the drain and the source being connected to a voltage source, and the other one of the drain and the source being connected to an anode of the first diode and to an anode of the second diode, and a second current source circuit (42) connected between ground and each of a cathode of the second diode (33) and the second terminal of the first resistor”. Note the high light part of the claim, it appears applicant claimed first resistor is resistor (43) and NOT resistor (54) and diode (33) is a first diode and NOT diode (31), wherein claim 1 last limitation stated “a first diode that is connected to the radio-frequency input terminal and to the bias path between the first resistor and a gate of the first transistor”. If resistor (33) is a first resistor and diode (31) is a first diode as claimed and based on Fig. 7, first diode (33) is not connected between first resistor (43) and the gate of the first transistor (11) as claimed. Clarification is needed.
Regarding claim 6, which is depended on claim 1, wherein claim 1 is based on Fig. 7, discloses “a first diode (31) that is connected to the radio-frequency input terminal (110 or gate of transistor (11)) and to the bias path between the first resistor (54) and a gate of the first transistor (11).” However claim 6, which is based on Figs. 7 and 10 discloses “wherein a cathode of the first diode (31) is connected to the gate of the first transistor (11), wherein a first terminal of the first resistor (54) is connected to a first node on a signal path, the signal path connecting the radio-frequency input terminal and the gate of the first transistor, wherein a second terminal of the first resistor is connected to a cathode of the second diode and to a gate of the second transistor, wherein the gate of the second transistor, the first resistor, the first node, and the gate of the first transistor are in the bias path, wherein the amplification circuit further comprises a first bias detection circuit, an error amplification circuit, and a second bias detection circuit, wherein the error amplification circuit comprises a comparator, wherein the power supply circuit comprises a third transistor (44), a fourth transistor, a second node (n2), a third node, and a second current source circuit, wherein the third transistor has a gate, a drain, and a source, the gate being connected to the second node (n2), one of the drain and the source being connected to a voltage source, and the other one of the drain and the source being connected to an anode of the first diode (33) and to an anode of the second diode, wherein the fourth transistor is connected between the comparator and the second node, wherein the second node is connected between the fourth transistor and the third node, and between the fourth transistor and the second bias detection circuit, wherein the third node is connected to a cathode of the second diode and to the gate of the second transistor, wherein the second current source circuit is connected between the third node and ground, wherein the first bias detection circuit is connected between a drain or a source of the second transistor and the comparator, wherein the second bias detection circuit is connected between the second node and the third node, and wherein the gate of the second transistor is connected to a gate of the first transistor.” See claim 5 comments above regarding how first resistor, first and second diodes are connected, which is unclear. Clarification is needed.
Regarding claims 7-10, which are also rejected because they are dependent on rejected claims 5 and 6.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Bettencourt et al. (8,854,140), hereinafter called BETTENCOURT.
Regarding claim 1, BETTENCOURT (Fig. 5) discloses an RF amplifier circuit (10) comprising: a first transistor (Q2) that is connected to a radio-frequency input terminal (RFin) and that is a field-effect transistor; a power supply circuit (Vdd) configured to supply a bias voltage to the first transistor; a first resistor in a bias path, the bias path via resistor (20) and transistor (Q3) connecting the power supply circuit and the first transistor; a second transistor (Q1) that is connected to the bias path and to the power supply circuit, the second transistor (Q1) having a same configuration and a same or different size as the first transistor (Q2); and a first diode (D1/D2) that is connected to the radio-frequency input terminal (RFin) and to the bias path between the first resistor (20) and a gate of the first transistor (Q2).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over BETTENCOURT.
Regarding claim 14, BETTENCOURT discloses claimed invention except having signal processing circuit for processing a radio frequency signal as claimed and an output antenna. However, this has to do with where the amplifier circuit is utilized, such as in mobile/communication devices, wherein signal processing (Baseband/Signal Processor) is needed and the signal is then amplified by an amplifier circuit and transmitted to an antenna. Therefore, BETTENCOURT’s circuit can be used in mobile/communication device based on desired intended use of the invention.
Allowable Subject Matter
Claims 2-4, 11 and 12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 5-10 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Claim 13 is allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claims 2-4, prior art(s) does not disclose a second diode that is connected to the bias path between the first resistor and the power supply circuit, the second diode having a same configuration and a same or different size as the first diode.
Regarding claims 11 and 12, prior art(s) does not disclose a tenth transistor that is a field-effect transistor; a third diode; and a first transformer comprising a primary side coil and a secondary side coil, wherein a first end or a second end of the primary side coil is connected to the radio-frequency input terminal, wherein a first end of the secondary side coil is connected to the gate of the first transistor, wherein a second end of the secondary side coil is connected to a gate of the tenth transistor, wherein a first terminal of the first resistor is connected to a second node of the secondary side coil, and a second terminal of the first resistor is connected to the power supply circuit, wherein the power supply circuit, the first resistor, the secondary side coil, the gate of the first transistor, and the gate of the tenth transistor are in the bias path, wherein a cathode of the first diode is connected to the bias path between the gate of the first transistor and to the secondary side coil, wherein a cathode of the third diode is connected to the bias path between the gate of the tenth transistor and the secondary side coil, and wherein an anode of the first diode is connected to an anode of the third diode.
The following is an examiner’s statement of reasons for allowance:
Regarding claim 13, among other subject matters claimed, prior art(s) does not disclose a difference detection circuit that is connected between the power supply circuit and each of the first diode and the second diode, and that is configured to output a differential current between a first current flowing through the first diode and a second current flowing through the second diode to the power supply circuit.
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Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The additional reference(s) cited in PTO-892 show further analogous prior art circuitry.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Khanh V. Nguyen whose telephone number is (571) 272-1767. The examiner can normally be reached from 8:30 AM – 5:00 PM EST.
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/KHANH V NGUYEN/ Primary Examiner, Art Unit 2843