DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention I, claims 1-11 in the reply filed on 29 July 2026 is acknowledged.
Claims 12-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Invention II, there being no allowable generic or linking claim.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 9 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In claim 9, the limitation “a surface, away from the second substrate, of the piezoelectric material layer is an N surface” renders claim indefinite because both specification and claims fail to define what the recited “N surface” is. The meaning of a claim term must be consistent with its ordinary and customary meaning unless the specification gives it a special definition. See MPEP 2111.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 and 7-9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Li (CN 111431499).
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Annotated Figs. 5 and 6, Li.
Regarding claim 1, Li teaches, a manufacturing method for a piezoelectric plate, comprising:
providing a first substrate (first substrate 1, step 1, see annotated Fig. 5);
growing a piezoelectric material layer on the first substrate (piezoelectric layer 2, deposit a piezoelectric layer on the upper surface of the first substrate 1, para. [0009]);
growing a protective layer on the piezoelectric material layer (protective layer 3, then grow an
entire insulating protective layer on the piezoelectric layer, para. [0009]);
bonding the protective layer to a second substrate (step 3, second substrate 5 and 6, bond the second composite substrate to the first composite substrate, para. [0011]); and
peeling off the first substrate to form a piezoelectric plate comprising the second substrate, the protective layer and the piezoelectric material layer from bottom to top (step 4, second substrate is debonded…to achieve peeling and obtain a flexible filter device, see Fig. 6, para. 0012]), wherein
a lattice constant of the protective layer is greater than a lattice constant of the piezoelectric material layer (piezoelectric layer is an epitaxially grown single-crystal piezoelectric thin film or a high C-axis oriented polycrystalline piezoelectric thin film grown by sputtering…AlN; insulating protective layer is made of one of the following materials: SiO2, SiN, Si, para. [0015-0017], lattice constant values of AIN: a = 3.110 Å, c = 4.980Å, u = 0.3821; and lattice constant of Si 5.431020511, or SiO2: 𝑎=7.22 Å, 𝑏 = 7.09Å, 𝑐 = 7.30 Å, (wikipedia.org). Therefore, Li teaches the claimed lattice constant of the protective layer is greater than a lattice constant of the piezoelectric material layer).
Note: unless otherwise defined, forming multilayer piezoelectric plate having different lattice constants to reduce the thermal expansion between the layers is known in the art. If applicant disagrees, see Furuta US (20230320228), Kenji (JP 2004247563)).
Regarding claim 7, Li teaches the recited limitation with respect to claim 1. Lee further teaches, the manufacturing method for a piezoelectric plate according to claim 1, wherein a material of the first substrate is one of silicon, sapphire, silicon carbide, and diamond (in steps (1) and (2), the first substrate and the second substrate are both made of one or more of the following materials: silicon substrate, sapphire substrate, silicon carbide substrate, para. [0014]).
Regarding claim 8, Li teaches the recited limitation with respect to claim 1. Lee further teaches, the manufacturing method for a piezoelectric plate according to claim 1, wherein the piezoelectric material layer is a single-layer structure of one of AIN, AIGaN, and AlScN, or a multi-layer structure of any combination of AIN, AIGaN, and AlScN (piezoelectric layer is an epitaxially grown single-crystal piezoelectric thin film or a high C-axis oriented polycrystalline piezoelectric thin film grown by sputtering…AlN, para. [0015]).
Regarding claim 9, Li teaches the recited limitation with respect to claim 1. Lee further teaches, the manufacturing method for a piezoelectric plate according to claim 1, wherein a surface, away from the second substrate, of the piezoelectric material layer is an N surface (under the principles of inherency, Li teaches an identical device and therefore, the limitation piezoelectric material layer is an N surface will be considered to be anticipated by the prior art device, see MPEP 2112).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2-4 are rejected under 35 U.S.C. 103 as being unpatentable over Li as applied to claim 1 above, and further in view of Aigner (WO 2019228750).
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Annotated Figs. 1A to 1D, Aigner.
Regarding claims 2-4, Li does not teach, a sacrificial layer over the first substrate. However, Aigner teaches, a manufacturing method for a piezoelectric plate in Figs. 1 and 2, comprising providing a first substrate (Fig. 1A); growing a piezoelectric material layer (Fig. 1G); and peeling off the first substrate (Fig. 2C) to form a piezoelectric plate, in which,
2. The manufacturing method for a piezoelectric plate according to claim 1, wherein the growing a piezoelectric material layer on the first substrate comprises: providing a sacrificial layer on the first substrate (porous layer 111, Fig. 1D); and growing the piezoelectric material layer on the sacrificial layer (Fig. 1G).
3. The manufacturing method for a piezoelectric plate according to claim 2, wherein a material of the sacrificial layer comprises porous silicon (substrate may be a doped silicon wafer so that the porous layer can be formed by electrochemical anodization, pages 4-5).
4. The manufacturing method for a piezoelectric plate according to claim 2, wherein the peeling off the first substrate to form a piezoelectric plate comprising the second substrate, the protective layer and the piezoelectric material layer from bottom to top comprises: peeling off the first substrate by directly utilizing thermal stress to realize self-separation of the sacrificial layer (a portion 220 of wafer A is split from the layer stack along the separation layer 111. A portion 222 of porous separation layer 111 resides at the split-off portion 220 of wafer A...The split process is initiated with the application of a mechanical impact which may be a thermally induced mechanical stress and/or a mechanical shock, page 13).
Therefore, in view of the teachings of Aigner, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the manufacturing method for a piezoelectric plate of Li and replace the substrate 1 of Li with a substrate having a porous silicon layer as Aigner disclosed in Fig. 1D so that it enables thermal separation of the first substrate after bonding as Aigner disclosed in page 13.
Claim(s) 5-6 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Li as applied to claim 1 above, and further in view of Riaziat (US 20150033520).
Regarding claim 5, Li does not teach, an acoustic wave reflection layer on the second substrate. However, Riaziat teaches, a manufacturing method of a piezoelectric plate in Figs 5 and 6, comprising providing a first substrate (see annotated Fig. 5a); growing a protective layer on the piezoelectric material layer (Fig. 5b); bonding the protective layer to a second substrate (Fig. 6d); and peeling off the first substrate (Fig. 6e) to form a piezoelectric plate comprising the second substrate, the protective layer and the piezoelectric material layer from bottom to top, and preparing an acoustic wave reflection layer on the second substrate (Bragg reflector, Fig. 6c); and bonding the protective layer to the acoustic wave reflection layer (Fig. 6d).
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Annotated Figs. 5 and 6, Riaziat.
Therefore, in view of the teachings of Riaziat, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the manufacturing method for a piezoelectric plate of Li and replace the second substrate of Li with a second substrate 42 of Riaziat having a Bragg reflector so that it enables forming acoustic layers having varying acoustic impedances as Riaziat disclosed in para. [0042].
Regarding claim 6, Li in view of Riaziat teaches the recited limitation with respect to claim 5. Riaziat further teaches, the manufacturing method for a piezoelectric plate according to claim 5, wherein a material of the acoustic wave reflection layer is any one of a single-layer porous material, a multi-layer reflecting structure (the Bragg reflector may be formed by disposing multiple layers of alternating materials, para. 0042]), and a stacked structure of the single-layer porous material and the multi-layer reflecting structure.
Regarding claim 11, Li teaches the recited limitation with respect to claim 1. Lee further teaches, providing a piezoelectric plate according to claim 1; and forming an interdigital transducer on the piezoelectric material layer of the piezoelectric plate (the top electrode 7 is rectangle-shaped or interdigital electrode, para. [0019]). Li does not teach, manufacturing a surface acoustic wave (SAW) device. However, Riaziat further teaches, a manufacturing method for a surface acoustic wave (SAW) device (para. [0027]).
Claim(s) 10 is rejected under 35 U.S.C. 103 as being unpatentable over Li as applied to claim 1 above, and further in view of Kanda (US 20050255234).
Regarding claim 10, Li does not teach, material of the protective layer is any one of AIGaN, AIScN, AIInN, and AlInGaN. However, Kanda teaches a manufacturing method for a piezoelectric plate in Figs. 1A to 1D, comprising: providing a first substrate (substrate 2, Fig. 1B); growing a piezoelectric material layer (piezoelectric layer 4); growing a protective layer (buffer layer 3); bonding to a second substrate (substrate 1); and peeling off the first substrate to form a piezoelectric plate comprising the second substrate, the protective layer and the piezoelectric material layer from bottom to top (Figs. 1C and 1D), in which, the manufacturing method for a piezoelectric plate according to claim 1,wherein a material of the protective layer is any one of AIGaN, AIScN, AIInN, and AlInGaN (buffer layer may be made of aluminum gallium nitride (AlGaN) or the like, para. [0125]). Therefore, in view of the teachings of Kanda, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the manufacturing method for a piezoelectric plate of Li and replace the protective layer of Li with an aluminum gallium nitride (AlGaN) as Kanda disclosed in Fig. 1B so that it enables reducing the peeling of the resonator layer.
Conclusion
Prior art Lee (US 20180367119) teaches, manufacturing method for a piezoelectric plate, comprising: providing a first substrate; growing a piezoelectric material layer on the first substrate; growing a protective layer on the piezoelectric material layer; bonding the protective layer to a second substrate; and peeling off the first substrate to form a piezoelectric plate comprising the second substrate, the protective layer and the piezoelectric material layer from bottom to top.
Prior art Metzger (US 20210013862) teaches, manufacturing method for a piezoelectric plate, including providing a first substrate; growing a piezoelectric material layer on the first substrate; growing a protective layer on the piezoelectric material layer.
Prior art An (US 20220149802) teaches, manufacturing method for a piezoelectric plate, including providing a first substrate; growing a piezoelectric material layer on the first substrate; bonding the protective layer to a second substrate; and peeling off the first substrate to form a piezoelectric plate comprising the second substrate, the protective layer and the piezoelectric material layer from bottom to top.
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/JOSE K ABRAHAM/Examiner, Art Unit 3729
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