The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
The instant application having Application No. 18/459277 filed on 08/31/2023 is presented for examination by the examiner.
Examiner Notes
Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Drawings
The applicant’s drawings submitted are acceptable for examination purposes.
Information Disclosure Statement
As required by M.P.E.P. 609, the applicant’s submissions of the Information Disclosure Statement dated 01/29/2024 and 08/31/2023 are acknowledged by the examiner and the cited references have been considered in the examination of the claims now pending.
35 USC § 101
Regarding claims 9; the claim contains “means for generating, by a scheduling model, ... each schedule of the group of schedules associating each node of the computation graph with a processor of a group of processors of a hardware device” and “means for testing one or more schedules of the group of schedules on the hardware device or a model of the hardware device” does not meet 3-prong analysis and does not presumed to invoke 112(f). Furthermore, the step “means for selecting a schedule of the one or more schedules based on testing the one or more schedules, the selected schedule satisfying a selection condition” meets 3-prong analysis and presumed to invoke 112(f).
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-7, 9-15, 17-23 and 25-30 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter.
Claims 1, 9, 17 and 25, the claims are within at least one of the four categories of patent eligible subject matter as it is directing to a method claim under Step 1.
However, the limitations “generating … a group of schedules …” and “selecting a schedule …”, as drafted, recite functions that, under its broadest reasonable interpretation, covers functions that could reasonably be performed in the mind, including with the aid of pen and paper, but for the recitation of generic computer components. That is, the limitation “generating … a group of schedules …” and “selecting a schedule …” as drafted, are functions that, under its broadest reasonable interpretation, recite the abstract idea of a mental process. The limitations encompass a human mind carrying out the functions through observation, evaluation, judgment and /or opinion, or even with the aid of pen and paper. Thus, these limitations recite and fall within the “Mental Processes” grouping of abstract ideas under Prong 1 Step 2A.
Under Prong 2 Step 2A, this judicial exception is not integrated into a practical application. The claim recites the following additional elements “a processor of a group of processor”, “a hardware device” and “testing one or more schedules …” The “a processor of a group of processor”, “a hardware device” are recited at a high-level of generality such that it amounts no more than mere instructions to apply the exception using a generic computer component, or merely a generic computer or generic computer components to perform the judicial exception, (see MPEP 2106.05(f)).
The addition element “testing one or more schedules” fails to meaningfully limit the claim because it does not require any particular application of the recited “testing” and is at best the equivalent of merely adding the words “apply it” to the judicial exception. Accordingly, the additional elements do not integrate the recited judicial exception into a practical application, and the claim is therefore directed to the judicial exception. See MPEP 2106.05(f).
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements are elements “a processor of a group of processor”, “a hardware device” and “testing one or more schedules …” the mere use of generic computer to implement the abstract idea, as discussed above, which does not amount to significantly more, thus, not an inventive concept, and the courts have identified gathering data, storing data, and outputting the result is well-understood, routine and conventional activity (Berkheimer v. HP, Inc., 881 F.3d 1360, 1368, 125 USPQ2d 1649, 1654 (Fed. Cir. 2018)), thus, cannot amount to an inventive concept.. Accordingly, the claim does not appear to be patent eligible under 35 USC 101. See MPEP 2106.05(d).
Regarding claims 2, 10, 18 and 26 the limitation “wherein the scheduling model …” is an additional metal process under prong 1.
Regarding claims 3, 11, 19 and 27 the limitation “wherein each schedule of the group of schedules is associated with a makespan” is an additional metal process under prong 1.
Regarding claims 4, 12, 20 and 28 the limitation “wherein the makespan is a total time between a start of an initial operation and an end of a final operation associated with the schedule” is an additional metal process under prong 1.
Regarding claims 5, 13, 21, and 29, the limitation “wherein the selected schedule satisfies the selection condition based on the makespan of the selected schedule having a lowest value among each respective makespan associated with the one or more schedules” is an additional metal process under prong 1.
Regarding claim 6, 14, 22, and 30, Under prong 2, the “wherein the task is an inference task performed by the artificial neural network” limitations are additional elements that recite insignificant extra solution activity which do not amount to a practical application, nor amount to significantly more under step 2B as explained above.
Regarding claim 7, 15, and 23, Under prong 2, the “wherein the task is a hierarchical task” limitations are additional elements that recite insignificant extra solution activity which do not amount to a practical application, nor amount to significantly more under step 2B as explained above.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 7, 9, 15, 17, 23 and 25 are rejected under 35 U.S.C. 103 as being unpatentable over US 2018/0075098 to Yin et al. (hereafter “Yin”) in view of US 2020/0334544 to Liu et al. (hereafter “Liu”) and US 2019/0311245 to Zhang et al. (hereafter “Zhang”)
As per claim 1, Yin discloses A processor-implemented method, comprising:
generating, by a scheduling model (FIG. 1; paragraphs 0037-0038, 0042 and 0050: “a “bubble” is a job sub-graph of a job graph which represents a scheduling/execution group of one or more workloads, wherein each of the one or more workloads is represented by one or more supervertices.”), a group of schedules from a computation graph associated with a task (FIG. 1; paragraphs 0037-0038, 0042, 0047 and 0050: schedule 161-167 associated with workloads), each schedule of the group of schedules associating each node of the computation graph (FIG. 2; paragraphs 0037-0038, 0042, 0047 and 0050: a bubble containing a vertex is assigned/scheduled (by schedules 161-167) to a available resource) with a processor of a group of processors of a hardware device (FIG. 2; paragraphs 0050, 0076, and 0097: a plurality of resources including processors and memories);
Yin does not explicitly disclose each node on the computation graph being associated with an operation of an artificial neural network; testing one or more schedules of the group of schedules on the hardware device or a model of the hardware device; and selecting a schedule of the one or more schedules based on testing the one or more schedules, the selected schedule satisfying a selection condition.
Liu further discloses each node on the computation graph being associated with an operation of an artificial neural network (FIG. 2; paragraphs 0005, 0007 and 0030-0031: “As an example, FIG. 2 shows a computation graph 200 including five nodes A202, B204, C206, D208 and E210. In the computation graph, each node represents one function in the machine learning model, and connection lines between nodes represent dependencies between functions.”)
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Liu into Yin’s teaching because it would provide for the purpose of obtaining an intermediate representation of a machine learning model written in a source language, the intermediate representation being independent of the source language and a target language and comprising a computation graph described by a structured text, a node in the computation graph representing a function associated with the machine learning model (Liu, paragraph 0005).
Zhang further discloses testing one or more schedules of the group of schedules on the hardware device or a model of the hardware device (FIG. 2; paragraphs 0034-0036: “The schedule is then executed 214 to obtain the execution time, and loop over to find the best parallelism choice. Once this process is completed for all schedules 218 generated by the scheduler generator 204, the schedule 220 that is the fastest is selected.”); and
selecting a schedule of the one or more schedules based on testing the one or more schedules, the selected schedule satisfying a selection condition (FIG. 2; paragraphs 0034-0036: “The schedule is then executed 214 to obtain the execution time, and loop over to find the best parallelism choice. Once this process is completed for all schedules 218 generated by the scheduler generator 204, the schedule 220 that is the fastest is selected.”).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Zhang into Yin’s teaching and Liu’s teaching because it would provide for the purpose of the calibration process may be called once during model construction, and then the optimized schedule 220 is repeatedly used for serving user requests of the model (Zhang, paragraph 0036).
As per claim 7, Yin discloses wherein the task is a hierarchical task (paragraphs 0025-0026: job graph).
As per claim 9, it is apparatus claim, which recite(s) the same limitations as those of claim 1. Accordingly, claim 9 is rejected for the same reasons as set forth in the rejection of claim 1.
As per claim 15, it is an apparatus claim, which recite(s) the same limitations as those of claim 7. Accordingly, claim 15 is rejected for the same reasons as set forth in the rejection of claim 7.
As per claim 17, it is an apparatus claim, which recite(s) the same limitations as those of claim 1. Accordingly, claim 17 is rejected for the same reasons as set forth in the rejection of claim 1.
As per claim 23, it is an apparatus claim, which recite(s) the same limitations as those of claim 7. Accordingly, claim 23 is rejected for the same reasons as set forth in the rejection of claim 7.
As per claim 25, it is a medium claim, which recite(s) the same limitations as those of claim 1. Accordingly, claim 25 is rejected for the same reasons as set forth in the rejection of claim 1.
Claims 2, 10, 18 and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Yin in view of Liu and Zhang, as applied to claims 1, 9, 17 and 25, and further in view of US 2017/0064395 to Chaar et al. (hereafter “Chaar”)
As per claim 2, Yin does not explicitly disclose wherein the scheduling model is a generative flow network.
Chaar further discloses wherein the scheduling model is a generative flow network (FIG. 4; paragraph 0123).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Chaar into Yin’s teaching, Liu’s teaching, and Zhang’s teaching because it would provide for the purpose of building a network flow model that may be implemented by a schedule generator to generate an optimal schedule that will maximize estimated audience (Chaar, paragraph 0018).
As per claim 10, it is a apparatus claim, which recite(s) the same limitations as those of claim 2. Accordingly, claim 10 is rejected for the same reasons as set forth in the rejection of claim 2.
As per claim 18, it is an apparatus claim, which recite(s) the same limitations as those of claim 2. Accordingly, claim 18 is rejected for the same reasons as set forth in the rejection of claim 2.
As per claim 26, it is a medium claim, which recite(s) the same limitations as those of claim 2. Accordingly, claim 26 is rejected for the same reasons as set forth in the rejection of claim 2.
Claims 3-4, 11-12, 19-20, and 27-28 are rejected under 35 U.S.C. 103 as being unpatentable over Yin in view of Liu and Zhang, as applied to claims 1, 9, 17 and 25, and further in view of US 2003/0046278 to McConaghy.
As per claim 3, Yin does not explicitly disclose wherein each schedule of the group of schedules is associated with a makespan.
McConaghy further discloses wherein each schedule of the group of schedules is associated with a makespan (FIG. 3; paragraphs 0039 and 0063).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of McConaghy into Yin’s teaching, Liu’s teaching, and Zhang’s teaching because it would provide for the purpose of to minimize the cost of the scheduled project, or minimize the makespan (i.e. the time taken to complete a schedule) (McConghy, paragraph 0039).
As per claim 4, Yin does not explicitly disclose wherein the makespan is a total time between a start of an initial operation and an end of a final operation associated with the schedule.
McConaghy further discloses wherein the makespan is a total time between a start of an initial operation and an end of a final operation associated with the schedule (FIG. 3; paragraphs 0039 and 0063).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of McConaghy into Yin’s teaching, Liu’s teaching, and Zhang’s teaching because it would provide for the purpose of to minimize the cost of the scheduled project, or minimize the makespan (i.e. the time taken to complete a schedule) (McConghy, paragraph 0039).
As per claim 11, it is an apparatus claim, which recite(s) the same limitations as those of claim 3. Accordingly, claim 11 is rejected for the same reasons as set forth in the rejection of claim 3.
As per claim 12, it is an apparatus claim, which recite(s) the same limitations as those of claim 4. Accordingly, claim 12 is rejected for the same reasons as set forth in the rejection of claim 4.
As per claim 19, it is an apparatus claim, which recite(s) the same limitations as those of claim 3. Accordingly, claim 19 is rejected for the same reasons as set forth in the rejection of claim 3.
As per claim 20, it is an apparatus claim, which recite(s) the same limitations as those of claim 4. Accordingly, claim 20 is rejected for the same reasons as set forth in the rejection of claim 4.
As per claim 27, it is a medium claim, which recite(s) the same limitations as those of claim 3. Accordingly, claim 27 is rejected for the same reasons as set forth in the rejection of claim 3.
As per claim 28, it is a medium claim, which recite(s) the same limitations as those of claim 4. Accordingly, claim 28 is rejected for the same reasons as set forth in the rejection of claim 4.
Claims 5, 13, 21, and 29 are rejected under 35 U.S.C. 103 as being unpatentable over Yin in view of Liu, Zhang, and McConghy, as applied to claim 3, 11, 19 and 27, and further in view of US 2022/0188155 to Miniskar et al. (hereafter “Miniskar”).
As per claim 5, Yin does not explicitly disclose wherein the selected schedule satisfies the selection condition based on the makespan of the selected schedule having a lowest value among each respective makespan associated with the one or more schedules.
Miniskar further discloses wherein the selected schedule satisfies the selection condition based on the makespan of the selected schedule having a lowest value among each respective makespan associated with the one or more schedules (paragraph 0075)
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Miniskar into Yin’s teaching, Liu’s teaching, Zhang’s teaching, and McConghy’s teaching because it would provide for the purpose of the accelerator-specific scheduler (AS) sub-module is configured to partition a given task into one or more streams of first sub-tasks, which include at least some computation sub-tasks, and to schedule the computation sub-tasks among the corresponding one or more accelerator circuits. (Miniskar, paragraph 0007).
As per claim 13, it is an apparatus claim, which recite(s) the same limitations as those of claim 5. Accordingly, claim 13 is rejected for the same reasons as set forth in the rejection of claim 5.
As per claim 21, it is an apparatus claim, which recite(s) the same limitations as those of claim 5. Accordingly, claim 21 is rejected for the same reasons as set forth in the rejection of claim 5.
As per claim 29, it is a medium claim, which recite(s) the same limitations as those of claim 5. Accordingly, claim 29 is rejected for the same reasons as set forth in the rejection of claim 5.
Claims 6, 14, 22 and 30 are rejected under 35 U.S.C. 103 as being unpatentable over Yin in view of Liu and Zhang, as applied to claims 1, 9, 17 and 25, and further in view of US 2015/0269481 to Annapureddy et al. (hereafter “Annapureddy”).
As per claim 6, Yin does not explicitly disclose wherein the task is an inference task performed by the artificial neural network.
Annapureddy further discloses wherein the task is an inference task performed by the artificial neural network (paragraph 0066).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Annapureddy into Yin’s teaching, Liu’s teaching, and Zhang’s teaching because it would provide for the purpose of predicting an activation value for a neuron in the neural network based on at least one previous activation value for the neuron (Annapureddy, paragraph 0006).
As per claim 14, it is an apparatus claim, which recite(s) the same limitations as those of claim 6. Accordingly, claim 14 is rejected for the same reasons as set forth in the rejection of claim 6.
As per claim 22, it is an apparatus claim, which recite(s) the same limitations as those of claim 6. Accordingly, claim 22 is rejected for the same reasons as set forth in the rejection of claim 6.
As per claim 30, it is a medium claim, which recite(s) the same limitations as those of claim 6. Accordingly, claim 30 is rejected for the same reasons as set forth in the rejection of claim 6.
Claims 8, 16 and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Yin in view of Liu and Zhang, as applied to claims 1, 9, 17 and 25, and further in view of US 2022/0366320 to Liu et al. (hereafter “Liu ‘320”)
As per claim 8, Yin does not explicitly disclose wherein the scheduling model is trained, on a proxy of the hardware device, to minimize a makespan associated with a training schedule.
Liu ‘320 further disclose wherein the scheduling model is trained, on a proxy of the hardware device (paragraph 0103: “After the device is scheduled, the current scheduling network will be further trained again, which can make the next scheduling be wiser.”), to minimize a makespan associated with a training schedule (paragraph 0103).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Liu ‘320 into Yin’s teaching, Liu’s teaching, and Zhang’s teaching because it would provide for the purpose of After the device is scheduled, the current scheduling network will be further trained again, which can make the next scheduling be wiser (Liu, paragraph 0160).
As per claim 16, it is an apparatus claim, which recite(s) the same limitations as those of claim 8. Accordingly, claim 16 is rejected for the same reasons as set forth in the rejection of claim 8.
As per claim 24, it is an apparatus claim, which recite(s) the same limitations as those of claim 8. Accordingly, claim 24 is rejected for the same reasons as set forth in the rejection of claim 8.
Conclusion
The following prior art made of record and not relied upon is cited to establish the level of skill in the applicant’s art and those arts considered reasonably pertinent to applicant’s disclosure. See MPEP 707.05(c).
Prior arts:
US 2023/0068386 to Akdeniz
immediately above, N1 can be a design choice that can determine the tradeoff between the accuracy and convergence time; in a second step, the server may select K out of N.sub.1 clients based on client upload times, which can minimize the total upload time from clients.
US 2022/0343155 to Mitra
the task scheduling system utilizes a graph neural network to predict performance corresponding to task sets. For example, the graph neural network includes a bipartite graph architecture that has a set of user nodes and a set of task nodes.
US 2022/0226994 to Gombolay
While traditional graph neural networks (GNNs) can operate on homogeneous graphs to learn a universal feature update scheme for all nodes, Scheduler 100 casts the task scheduling problem in a heterogeneous graph structure and employs a heterogeneous graph attention network (ScheduleNet) that learns per-edge-type message passing and per-node-type feature reduction mechanisms on this graph.
US 2019/0392307 to Liao
In a case where the scheduling of the multiple tasks is mapped to the above directed graph model, in one implementation of the embodiments of the present invention, as shown in FIG. 4, the step of scheduling the multiple tasks to the multiple cloud resource nodes based on the preset scheduling method and the residual graph may comprise:
US 2018/0330264 to Lanting
Determining the annealing schedule for the qubit based on the degeneracy metric may include generating a plurality of annealing schedules and selecting the annealing schedule from the plurality based on one or more selection criteria. Generating the plurality of annealing schedules may include generating a first annealing schedule and generating a plurality of scaled annealing schedules based on a plurality of scaling factors.
US 2018/0060389 to Hwang
Each of trees 310 and 320 includes nodes associated with the logical operators of its corresponding query execution plan.
US 2013/0232495 to Rossbach
The scheduler 320 may determine that the accelerator task associated with the node 209 is ready to execute when the datablock 205 is ready. The scheduler 320 may determine that accelerator task associated with the node 211 is ready to execute after the accelerator tasks associated with the nodes 207 and 209 have completed.
US 2005/0154625 to Chua
Each node of this linked list represents a work center at which schedules may be performed. Each work center node contains a pointer 304 to a "machines" linked list, which occupies the second dimension of the 3D machine timeline data structure 300. Each node in this linked list represents a machine at the work center represented by the parent work center node.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Tuan Dao whose telephone number is (571) 270 3387. The examiner can normally be reached on Monday to Friday from 09am to 05pm. The examiner can also be reached on alternate Fridays.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Pierre Vital, can be reached at telephone number (571) 272 4215. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TUAN C DAO/ Primary Examiner, Art Unit 2198