Prosecution Insights
Last updated: April 19, 2026
Application No. 18/459,759

A CIRCUIT

Non-Final OA §102§103
Filed
Sep 01, 2023
Examiner
BHATIA, AMIT R
Art Unit
2842
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Nxp B V
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
99%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
16 granted / 21 resolved
+8.2% vs TC avg
Strong +29% interview lift
Without
With
+29.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
15 currently pending
Career history
36
Total Applications
across all art units

Statute-Specific Performance

§103
43.5%
+3.5% vs TC avg
§102
29.2%
-10.8% vs TC avg
§112
25.0%
-15.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 21 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on September 11, 2023 & March 19, 2025 were reviewed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Election/Restrictions Applicant’s election without traverse of Species II in the reply filed on September 25, 2025 is acknowledged. Claims 29-30 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on September 25, 2025. Upon further review, the examiner has determined that claims 17 and 19 do not read on the elected species. These claims reference a quarter-wave impedance transformer, which is not noted in the specification for Species II, Figure 7 but rather for Species I, Figure 1. Therefore, the examined claims will be claims 16, 18, 20-28, and 31-35. Specification The specification is objected to because: reference character “102” has been used to designate “first attenuator terminal”, “first terminal”, “first (input) terminal”, and “terminal”. reference character “103” has been used to designate “second attenuator terminal”, “second terminal”, “output terminal”, and “node”. reference character “104” has been used to designate “first inductor", "transmission line", and "quarter wavelength transmission line". reference character “700” has been used to designate "common terminal", "terminal", and "input terminal". reference character “703” has been used to designate both "branch point" and "branch node". reference character “704” has been used to designate "first digital attenuator part", "part", and "digital step attenuator". reference character “705” has been used to designate "second digital attenuator part", "part", and "digital step attenuator". Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 16 & 24 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Ceng (CN 107707218 A); hereinafter Ceng. Regarding Claim 16, Ceng teaches a circuit (Fig. 5) comprising: a digital attenuator part (Abstract) comprising: a first attenuator terminal (terminal IN); a second attenuator terminal (terminal OUT); a first inductor (L2) having a first terminal coupled to the first attenuator terminal and a second terminal coupled to the second attenuator terminal; a first switched arrangement (M12/R18/C5) comprising a first switch (M12) having a first switch-terminal and a second switch-terminal, wherein the first switch-terminal is coupled to the first terminal of the first inductor, and wherein a first resistor (R18) and a first capacitor (C5) are arranged in parallel and coupled between the second switch-terminal and a reference terminal, the reference terminal configured to be coupled to a reference voltage (ground); a second switched arrangement (M13/R19/C6) comprising a second switch (M13) having a first switch-terminal and a second switch-terminal, wherein the first switch-terminal is coupled to the second terminal of the first inductor, and wherein a second resistor (R19) and a second capacitor (C6) are arranged in parallel and coupled between the second switch-terminal and the reference terminal. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Ceng. Ceng discloses the claimed invention except for wherein a capacitance of one or both of the first capacitor and the second capacitor is greater than an off-state capacitance of one or the both the first switch and the second switch. It would have been obvious to one having ordinary skill in the art at the time the invention was made to adjust the capacitance values to optimize attenuation (paragraphs 0018, 0021, 0040), since it has been held that discovering an optimum value of a result effective variable involves only routine Skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Ceng, in view of Boutelant (US 3833866 A); hereinafter Ceng, in view of Boutelant. Regarding Claim 18, Ceng teaches everything claimed except does not explicitly teach the circuit (Fig. 5) of claim 16, wherein the first inductor (L2) comprises a quarter wavelength transmission line. However, Boutelant teaches the inductor comprises a quarter wavelength transmission line (Column 2, lines 60-66). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Ceng, with Boutelant, for the purpose of minimizing the space onto a circuit board rather than connecting an inductor. Claims 20-21 are rejected under 35 U.S.C. 103 as being unpatentable over Ceng, in view of Nakada (JP 2000188523 A); hereinafter Ceng, in view of Nakada. Regarding Claims 20 & 21, Ceng teaches everything claimed except does not explicitly teach wherein the first resistor has a same resistance as the second resistor, and the first capacitor has a same capacitance as the second capacitor. However, Nakada teaches a signal attenuation device wherein the first resistor has a same resistance as the second resistor, and the first capacitor has a same capacitance as the second capacitor (Fig. 1 & 7, paragraphs 0009-0016, 0019-0024, Tables 1 & 2). (choosing values for multiple resistors, or multiple capacitors, to be equal would be obvious expedient to one of ordinary skill in the art). Claims 22-23 are rejected under 35 U.S.C. 103 as being unpatentable over Ceng, in view of Yan et al. (US 20180062621 A1); hereinafter Ceng, in view of Yan. Regarding Claim 22, Ceng teaches everything claimed except does not explicitly teach the circuit of claim 16, wherein the digital attenuator part is configured to provide an attenuation mode in which both the first switch and the second switch are closed to thereby provide attenuation of a signal input to the first attenuator terminal and output at the second attenuator terminal. However, Yan teaches wherein the digital attenuator part is configured to provide an attenuation mode in which both the first switch and the second switch are closed to thereby provide attenuation of a signal input to the first attenuator terminal and output at the second attenuator terminal (paragraph 0072). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Ceng, with Yan, for the purpose of phase shift and gain compensation. Regarding Claim 23, Ceng teaches everything claimed except does not explicitly teach the circuit of claim 16, wherein the digital attenuator part is configured to provide a bypass mode in which both the first switch and the second switch are open. However, Yan teaches wherein the digital attenuator part is configured to provide a bypass mode in which both the first switch and the second switch are open (paragraph 0072). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Ceng, with Yan, for the purpose of phase shift and gain compensation. Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over Ceng, in view of Nicolson et al. (US 20110273248 A1); hereinafter Ceng, in view of Nicolson. Regarding Claim 25, Ceng teaches the circuit of claim 16, wherein the circuit comprises said digital attenuator parts in series by their first and second attenuator terminals. Ceng does not explicitly teach a plurality of said digital attenuator parts coupled together to provide a multi-bit digital step attenuator. However, Nicolson teaches a circuit (Fig. 3) , wherein the circuit comprises a plurality of circuits coupled together. It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Ceng, by placing Ceng's first and second switched arrangement's duplication of attenuator parts with Nicolson's parallel design, for the purpose of providing attenuation to both quarter-wave transmission lines to achieve good input and output return loss. Ceng, in view of Nicolson, teaches a plurality of said digital attenuator parts coupled together in series by their first and second attenuator terminals to provide a multi-bit digital step attenuator. Claims 26-28 & 31-35 are rejected under 35 U.S.C. 103 as being unpatentable over Ceng, in view of Nicolson, further in view of Yan. Regarding Claim 26, Ceng teaches a circuit (Fig. 5) comprising: a digital attenuator part (Abstract), wherein the digital attenuator part includes a first attenuator terminal (terminal IN), a second attenuator terminal (terminal OUT), a first inductor (L2) having a first terminal coupled to the first attenuator terminal and a second terminal coupled to the second attenuator terminal, a first switched arrangement (M12/R18/C5) comprising a first switch (M12) having a first switch-terminal and a second switch-terminal, wherein the first switch-terminal is coupled to the first terminal of the first inductor, and wherein a first resistor (R18) and a first capacitor (C5) are arranged in parallel and coupled between the second switch-terminal and a reference terminal, the reference terminal configured to be coupled to a reference voltage (ground), and a second switched arrangement (M13/R19/C6) comprising a second switch (M13) having a first switch-terminal and a second switch-terminal, wherein the first switch-terminal is coupled to the second terminal of the first inductor, and wherein a second resistor (R19) and a second capacitor (C6) are arranged in parallel and coupled between the second switch-terminal and the reference terminal. Ceng does not explicitly teach a plurality of digital attenuator parts; and a switch part that includes a common terminal, a first switch-part terminal and a second switch-part terminal, wherein the switch part is switchable at least between providing a path for a signal between the common terminal and the first switch-part terminal and providing a path for a signal between the common terminal and the second switch-part terminal, and wherein a first digital attenuator part of said plurality of digital attenuator parts is configured with its first attenuator terminal connected to the common terminal and its second attenuator terminal connected to the first switch-part terminal, and a second digital attenuator part of said plurality of digital attenuator parts is configured with its first attenuator terminal connected to the common terminal and its second attenuator terminal connected to the second switch-part terminal, and each digital attenuator part of the plurality of said digital attenuator parts are configured to provide an attenuation mode in which both the first switch and the second switch of the respective attenuator part are closed to thereby provide attenuation of a signal and a bypass mode in which both the first switch and the second switch of the respective attenuator part are open. However, Nicolson teaches a circuit (Fig. 3) comprising: a plurality of circuits, wherein each circuit includes a first quarter-wave transmission line and a second quarter-wave transmission line (applicant's paragraph 0004 notes the first inductor embodied as a quarter-wave transmission line). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Ceng, by placing Ceng's first and second switched arrangement's duplication of attenuator parts with Nicolson's parallel design, for the purpose of providing attenuation to both quarter-wave transmission lines to achieve good input and output return loss. Ceng discloses the claimed invention except for the plurality of digital attenuator parts. It would have been obvious to one having ordinary skill in the art at the time the invention was made to provide a second digital attenuator part, since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8. Ceng, in view of Nicolson, teaches a switch part (Nicolson, Fig. 3) that includes a common terminal (Nicolson, Fig. 3, Port 1), a first switch-part terminal (Nicolson, Fig. 3, Port 2) and a second switch-part terminal (Nicolson, Fig. 3, Port 3), wherein the switch part is switchable at least between providing a path for a signal between the common terminal and the first switch-part terminal (Nicolson, Fig. 3, Port 1 to 32 to 302 to Port 2) and providing a path for a signal between the common terminal and the second switch-part terminal (Nicolson, Fig. 3, Port 1 to 34 to 304 to Port 3), and wherein a first digital attenuator part (Nicolson, Fig. 3, 32 with Ceng, Fig. 5, M12/R18/C5/M13/R19/C6) of said plurality of digital attenuator parts is configured with its first attenuator terminal connected to the common terminal (Nicolson, Fig. 3, 32 to Port 1) and its second attenuator terminal connected to the first switch-part terminal (Nicolson, Fig. 3, 32 to Port 2), and a second digital attenuator part (Nicolson, Fig. 3, 34 with Ceng, Fig. 5, M12/R18/C5/M13/R19/C6) of said plurality of digital attenuator parts is configured with its first attenuator terminal connected to the common terminal (Nicolson, Fig. 3, 34 to Port 1) and its second attenuator terminal connected to the second switch-part terminal (Nicolson, Fig. 3, 34 to Port 3). Ceng, in view of Nicolson, does not explicitly teach each digital attenuator part of the plurality of said digital attenuator parts are configured to provide an attenuation mode in which both the first switch and the second switch of the respective attenuator part are closed to thereby provide attenuation of a signal and a bypass mode in which both the first switch and the second switch of the respective attenuator part are open. However, Yan teaches an attenuation and bypass mode (paragraph 0072). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Ceng, in view of Nicolson, with Yan, for the purpose of phase shift and gain compensation. Ceng, in view of Nicolson, further in view of Yan, teaches wherein each digital attenuator part of the plurality of said digital attenuator parts are configured to provide an attenuation mode in which both the first switch and the second switch of the respective attenuator part are closed to thereby provide attenuation of a signal and a bypass mode in which both the first switch and the second switch of the respective attenuator part are open. Regarding Claim 27, Ceng, in view of Nicolson, further in view of Yan, teaches the circuit of claim 26, wherein the switch part comprises a third switch (Nicolson, Fig. 3, SW1) coupled to the first switch-part terminal and configured to provide a switched connection to the ground terminal; and the switch part comprises a fourth switch (Nicolson, Fig. 3, SW2) coupled to the second switch-part terminal and configured to provide a switched connection to the ground terminal. Regarding Claim 28, Ceng, in view of Nicolson, further in view of Yan, teaches the circuit of claim 27, wherein the first and second digital attenuator parts and the switch part in combination are configured to provide four modes, wherein the four modes comprise: a first-attenuator-terminal-with-attenuation mode in which the third switch is off, the fourth switch is on and the second switch of the second digital attenuator part is on to provide the path for the signal between the common terminal and the first switch-part terminal, and wherein the first switch and the second switch of the first digital attenuator part is on to provide the attenuation; a first-attenuator-terminal-without-attenuation mode in which the third switch is off, the fourth switch is on and the second switch of the second digital attenuator part is on to provide the path for the signal between the common terminal and the first switch-part terminal, and wherein the first switch and the second switch of the first digital attenuator part is off to not provide the attenuation; a second-attenuator-terminal-with-attenuation mode in which the third switch is on, the fourth switch is off and the second switch of the first digital attenuator part is on to provide the path for the signal between the common terminal and the second switch-part terminal, and wherein the first switch and the second switch of the second digital attenuator part is on to provide the attenuation; a second-attenuator-terminal-without-attenuation mode in which the third switch is on, the fourth switch is off and the second switch of the first digital attenuator part is on to provide the path for the signal between the common terminal and the second switch-part terminal, and wherein the first switch and the second switch of the second digital attenuator part is off to not provide the attenuation. (Nicolson, paragraphs 0034-0035; Ceng, paragraphs 0018 & 0040; Yan, paragraph 0072). Regarding Claim 31, Ceng, in view of Nicolson, further in view of Yan, teaches the circuit of claim 26, wherein at least one of the first inductor of the first digital attenuator part and the first inductor of the second digital attenuator part comprise a quarter wavelength transmission line (Nicolson, Fig. 3, 32 & 34, paragraph 0034). Regarding Claim 32, Ceng, in view of Nicolson, further in view of Yan, teaches the circuit claim 26, wherein at least one of the first inductor of the first digital attenuator part and the first inductor of the second digital attenuator part comprise part of a pi-network arrangement (Yan, Fig. 3, paragraphs 0071-0073). Regarding Claim 33, Ceng, in view of Nicolson, further in view of Yan, teaches the circuit of claim 26, wherein said first switch-part terminal is coupled to a transmit path wherein the switch part is configured to switchably couple the common terminal to the first switch-part terminal to enable a signal provided at the common terminal to be transmitted (Nicolson, paragraphs 0034-0035). Regarding Claim 34, Ceng, in view of Nicolson, further in view of Yan, teaches the circuit of claim 26, wherein said second switch-part terminal is coupled to a receive path wherein the switch part is configured to switchably couple the common terminal to the second switch-part terminal to enable a signal to be received from the receive path and passed to the common terminal (Nicolson, paragraphs 0034-0035). Regarding Claim 35, Ceng, in view of Nicolson, further in view of Yan, teaches the circuit of claim 26, wherein the plurality of said digital attenuator parts and the switch part collectively provide a quarter wave TX/RX switch having selectively provided attenuation (Nicolson, Fig. 3, paragraphs 0033-0036). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Amit Bhatia whose telephone number is (571)272-4410. The examiner can normally be reached Monday-Friday 8:30am-4:30pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lincoln Donovan can be reached at (571) 272-1988. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Amit R Bhatia/Examiner, Art Unit 2842 /LINCOLN D DONOVAN/Supervisory Patent Examiner, Art Unit 2842
Read full office action

Prosecution Timeline

Sep 01, 2023
Application Filed
Oct 17, 2025
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12597924
DETERIORATION INHIBITING CIRCUIT
2y 5m to grant Granted Apr 07, 2026
Patent 12591281
RESET OUTPUT WITH OPEN DRAIN CONFIGURATION FOR FUNCTIONAL SAFETY (FUSA) APPLICATIONS
2y 5m to grant Granted Mar 31, 2026
Patent 12592696
CASCODE SEMICONDUCTOR DEVICE
2y 5m to grant Granted Mar 31, 2026
Patent 12587101
POWER MANAGEMENT SYSTEM WITH DISTRIBUTED ERROR FEEDBACK
2y 5m to grant Granted Mar 24, 2026
Patent 12567858
High-Speed Delay Line for Die-To-Die Interconnect
2y 5m to grant Granted Mar 03, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
99%
With Interview (+29.4%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 21 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month