DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/19/2024, 01062025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 112
3. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1, 10 and 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 is rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Claim 1 recites, "a detection power supply connected to the first end," "a digital component connected to the second end," and further recites "a detection power supply
connected to the first end and the digital component, wherein the detection power supply and
the digital component are connected in series between the first end and the second end." It is
unclear whether the claim is reciting a single detection power supply or multiple detection power supplies. Accordingly, the metes and bounds of the claim cannot be determined with reasonable certainty.
Additionally, claim 1 further recites that "the detection power supply is configured to: apply bias voltages ... transmit a detection current ... and output a first level signal when transmitting the detection current." However, the specification describes the digital unit/component, rather than the detection power supply, as outputting the first level signal. See, e.g., Abstract; paragraphs [0007], [0009], [0010], and [0060]. Therefore, it is unclear which component performs the recited signal output function.
Accordingly, claim 1 is indefinite because the claim language is internally inconsistent and fails to clearly define the structure and operation of the recited detection circuit.
Claims 10 and 19 are rejected under 35 U.S.C. 112(b) for similar reasons because they contain substantially the same indefinite language discussed above with respect to claim 1.
Applicant is advised to amend the claims to clarify:
(1) whether one or more detection power supplies are being recited; and
(2) which component outputs the first level signal.
Claims 2-9, 11-18 and 20 also rejected as being dependent on rejected base claim.
Claim Rejections - 35 USC § 103
5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over CHEN (CN111965515A) in view of MA (CN206348428U).
Regarding claim 1, CHEN teaches an apparatus (including an anti reverse current diode fault detection arrangement for a charging module [0004]-[0006]).
a first end configured to be connected to a high electric potential input end of an anti backflow circuit (including detection of the power supply voltage VL before the anti reverse current diode [0006], [0021], [0025], [0030], Fig. 1).
a second end configured to be connected to a high electric potential output end of the anti backflow circuit (including detection of the module port voltage Vbat after the anti reverse current diode [0006], [0021], [0025], [0030], Fig. 1).
a detection power supply connected to the first end (including a charging module power conversion device configured to output a set voltage Vo used for subsequent fault determination operations across the anti reverse current diode [0020], [0023]- [0024], Fig. 1).
a digital component connected to the second end (including module control circuitry configured to detect voltages VL and Vbat and determine whether the anti reverse current diode has failed [0009], [0021]- [0033], Fig. 3).
a detection power supply connected to the first end and the digital component (including circuitry electrically coupled across the anti reverse current diode between VL and Vbat for fault determination operations [0021]- [0033], Fig. 3).
wherein the first level signal indicates that the anti backflow circuit has failed (reporting fault information when the anti reverse current diode is determined to be
short circuited or open circuited [0006]- [0009], [0028], [0032]- [0035]).
wherein the detection power supply is configured to: apply bias voltages to the first end and the second end to make a first electric potential at the second end higher than a second electric potential at the first end (including outputting a set voltage Vo from one module and comparing voltages VL and Vbat across the anti reverse current diode during insulation testing [0006], [0023]- [0027], [0037], Fig. 4).
CHEN does not explicitly teach wherein the detection power supply and the digital component are connected in series between the first end and the second end, transmit a detection current between the first end and the second end when a current loop is formed between the first end and the second end, output a first level signal when transmitting the detection current.
However, MA in a relevant art further teaches wherein the detection power supply and the digital component are connected in series between the first end and the second end (electrically connected bridge circuit, amplifier, and controller circuitry arranged along a diode current detection path for diode current detection and signal processing [0011]- [0019], [0036]- [0044], Figs. 1-2).
transmit a detection current between the first end and the second end when a current loop is formed between the first end and the second end (reverse leakage current detection circuitry configured to detect current characteristics of a diode using a bridge circuit, amplifier circuitry, and reverse current measurement circuitry [0004]- [0009], [0011]- [0019], [0036]- [0044]).
output a first level signal when transmitting the detection current (controller circuitry configured to convert detected electrical characteristics into digital signals and output corresponding detection information [0013]-[0019], [0041 ]-[0044], [0051 ]-[0053]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the anti reverse current diode fault detection arrangement of CHEN using the reverse leakage current detection circuitry, bridge circuit architecture, amplifier circuitry, and digital signal processing circuitry of MA in order to improve the accuracy and reliability of anti reverse current diode fault detection because MA expressly teaches dynamically detecting reverse leakage current characteristics of diodes and converting detected electrical characteristics into digital outputs suitable for monitoring and evaluation, while CHEN teaches using detected fault conditions to determine and report anti reverse current diode failure states in charging modules.
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Regarding claims 2, 11, CHEN further teaches wherein the second level signal indicates that the anti backflow circuit has not failed (determining that the anti reverse current diode is not in a fault state when the detected electrical conditions do not indicate a short circuit or open circuit condition [0006)- (0009), [0027)- (0035)).
CHEN does not explicitly teach outputting a second level signal when the digital component does not transmit the detection current.
However, MA in a relevant art further teaches output a second level signal when the digital component does not transmit the detection current (controller circuitry configured to convert detected electrical characteristics into corresponding digital output signals representing diode operating conditions [0013]- [0019], [0041]- [0044], [0051]- [0053)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the anti reverse current diode fault detection arrangement of CHEN using the digital signal processing circuitry of MA in order to output different signal levels corresponding to different diode operating conditions because MA expressly teaches converting detected diode electrical characteristics into corresponding digital output information suitable for monitoring and evaluation, while CHEN teaches determining fault and non fault operating conditions of an anti reverse current diode in a charging module.
Regarding claims 3, 12, CHEN does not explicitly teach a detection power supply comprising a positive electrode and a negative electrode connected to the first end, or a digital component comprising a current input end connected to the positive electrode, a current output end connected to the second end, and a signal output end configured to output the first level signal.
However, MA in a relevant art further teaches wherein the detection power supply
comprises: a positive electrode; and a negative electrode connected to the first end (positive and negative diode connections associated with bridge circuit based reverse
leakage current detection circuitry [0011]- [0017], [0036]- [0040], Figs. 1-2).
wherein the digital component comprises: a current input end connected to the positive
electrode (amplifier input circuitry connected to bridge circuit based diode detection circuitry [0041]- [0044], [0051]- [0053]).
a current output end connected to the second end (output circuitry connected to diode detection and display circuitry for transmitting detected reverse leakage current information [0041]- [0044], [0051]- [0053]).
and a signal output end configured to output the first level signal (controller and display circuitry configured to output reverse leakage current data corresponding to detected diode operating conditions [0013]- [0019], [0041]- [0044], [0051]- [0053]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the anti reverse current diode fault detection arrangement of CHEN using the bridge circuit based current detection and signal processing circuitry of MA in order to provide defined current input, current output, and signal output structures for improved diode fault monitoring and signal processing because MA expressly teaches diode current detection circuitry including corresponding signal processing and output circuitry, while CHEN teaches determining and reporting anti reverse current diode fault conditions in charging modules.
Regarding claim 4, 13, CHEN does not explicitly teach a breaking circuit connected in series to both the detection power supply and the digital component, wherein the breaking circuit electrically connects the detection power supply and the digital component during failure detection of the anti backflow circuit and electrically disconnects the detection power supply and the digital component when the failure detection ends.
However, MA in a relevant art further teaches a breaking circuit connected in series to both the detection power supply and the digital component (electrically connected bridge circuit and current detection circuitry arranged along a diode current detection path configured for selective current detection operations [0011]- [0019], [0036] -[0044], Figs. 1-2).
wherein the breaking circuit is configured to: electrically connect the detection power supply and the digital component during failure detection of the anti backflow circuit (diode current detection circuitry configured to establish electrical connection paths during reverse leakage current measurement operations [0036]- [0044], Figs. 1-2).
and electrically disconnect the detection power supply and the digital component when the failure detection ends (current detection circuitry configured for selective diode measurement operations during active detection conditions [0036]- [0044], Figs. 1-2).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the anti reverse current diode fault detection arrangement of CHEN using the selectively connectable diode current detection circuitry of MA in order to selectively enable and disable fault detection circuitry during diode failure detection operations because MA expressly teaches circuitry configured for diode current measurement operations along defined current detection paths, while CHEN teaches detecting and reporting anti reverse current diode fault conditions in charging modules.
Regarding claim 5, 14, CHEN does not explicitly teach a detection diode connected in series to both the detection power supply and the digital component, wherein the detection diode comprises an anode configured to receive the detection current and a cathode configured to output the detection current.
However, MA in a relevant art further teaches a detection diode connected in series to both the detection power supply and the digital component (diode current detection circuitry including diode connected bridge circuit detection paths arranged along a diode current
measurement path [0011] - [0019], [0036]- [0044], Figs. 1-2).
wherein the detection diode comprises: an anode configured to receive the detection current (positive diode terminal connections configured to receive reverse leakage
current during diode current detection operation [0011]- [0017], [0036]- [0040],
Figs. 1-2).
and a cathode configured to output the detection current (negative diode
terminal connections configured to output detected reverse leakage current through the diode
current detection circuitry [0011]- [0017], [0036]- [0040], Figs. 1-2).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the anti reverse current diode fault detection arrangement of CHEN using the diode current detection circuitry of MA in order to provide diode based current direction detection and monitoring within the anti backflow circuit fault detection arrangement because MA expressly teaches diode current detection paths using defined diode terminal connections for reverse leakage current measurement, while teaches detecting and reporting anti reverse current diode fault conditions in charging modules.
Regarding claim 6,15, CHEN does not explicitly teach a detection resistor connected in series to both the detection power supply and the digital component.
However, MA in a relevant art further teaches a detection resistor connected in series to both the detection power supply and the digital component (resistor containing bridge circuit current detection circuitry electrically arranged along a diode current detection path for reverse leakage current measurement operations [0011]- [0019], [0036]- [0044], Figs. 1-2).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the anti reverse current diode fault detection arrangement of CHEN using the resistor containing current detection circuitry of MA in order to provide controlled current detection and measurement during anti backflow diode fault detection operations because MA expressly teaches bridge circuit based reverse leakage current measurement circuitry including resistor based current detection structures, while CHEN teaches detecting and reporting anti reverse current diode fault conditions in charging modules.
Regarding claim 7, 16, CHEN does not explicitly teach a digital component comprising a primary side circuit configured to transmit the detection current, a secondary side circuit configured to output the first level signal when the primary side circuit transmits the detection current, and isolation between the primary side circuit and the secondary side circuit.
However, MA in a relevant art further teaches a primary side circuit configured to transmit the detection current (diode current detection circuitry configured to detect
reverse leakage current using bridge circuit and amplifier circuitry arranged along a diode
current detection path [0011]- [0019], [0036]- [0044], Figs. 1-2).
a secondary-side circuit configured to output the first level signal when the primary circuit transmits the detection current (controller and display circuitry configured to
output detected diode operating information corresponding to detected reverse leakage current conditions [0013]- [0019], [0041]- [0044], [0051]- [0053]).
wherein the secondary side circuit and the primary side circuit are isolated from each other (separate current detection circuitry and signal output circuitry configured to
process detected diode operating conditions through corresponding controller circuitry
[0011]- [0019], [0041]- [0044], [0051]- [0053]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the anti reverse current diode fault detection arrangement of CHEN using the current detection and signal processing circuitry of MA in order to provide separated current detection and signal output circuitry for improved fault monitoring and signal processing because MA expressly teaches diode current detection circuitry together with corresponding controller and output circuitry for processing detected diode operating conditions, while CHEN teaches detecting and reporting anti reverse current diode fault conditions in charging modules.
Regarding claim 8, 17, CHEN does not explicitly teach a primary side circuit comprising a light emitting diode including an anode configured to receive the detection current and a cathode configured to output the detection current, wherein the light emitting diode emits light when transmitting the detection current, or a secondary side circuit comprising a light sensing switching transistor configured to be turned on when the light emitting diode emits light and configured to output the first level signal when the light sensing switching transistor is turned on.
However, MA in a relevant art further teaches the primary side circuit comprises a
light emitting diode comprising: an anode configured to receive the detection current; and a
cathode configured to output the detection current (diode current detection circuitry including diode structures arranged along a current detection path for detecting diode operating conditions [0011]- [0019], [0036]- [0044], Figs. 1-2).
wherein the light emitting diode is configured to emit light when transmitting the detection current (diode detection circuitry configured to respond to detected current
conditions during reverse leakage current measurement operations [0036] - [0044], Figs. 1-2).
wherein the secondary side circuit comprises a light sensing switching transistor configured to be turned on when the light emitting diode emits light (controller circuitry
configured to receive detection information from diode current detection circuitry and
responsively process detected operating conditions [0013]- [0019], [0041]- [0044], [0051]- [0053]).
wherein the secondary-side circuit outputs the first level signal when the light sensing switching transistor is turned on (output circuitry configured to generate output
information corresponding to detected diode operating conditions [0013]- [0019],
[0041]- [0044], [0051]- [0053]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the anti reverse current diode fault detection arrangement of CHEN using the diode current detection and signal processing circuitry of MA in order to provide optical response based current detection and corresponding signal output during anti backflow circuit fault detection because MA expressly teaches circuitry configured to detect diode operating conditions and generate corresponding output information, while CHEN teaches detecting and reporting anti reverse current diode fault conditions in charging modules.
Regarding claim 9, 18, CHEN does not explicitly teach a signal acquisition circuit configured to perform shaping filtering on the first level signal.
However, MA in a relevant art further teaches a signal acquisition circuit configured to
perform shaping filtering on the first level signal (amplifier circuitry and controller circuitry configured to process detected diode electrical characteristics and generate processed output signals corresponding to detected diode operating conditions [0013]- [0019], [0041]- [0044], [0051]- [0053]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the anti reverse current diode fault detection arrangement of CHEN using the signal processing circuitry of MA in order to condition and process detected fault signals for improved signal stability and detection reliability because MA expressly teaches processing detected diode electrical characteristics through amplifier and controller circuitry to generate corresponding output information, while CHEN teaches detecting and reporting anti reverse current diode fault conditions in charging modules.
Regarding claim 10, the structure recited is intrinsic to the method recited in claim 7, as disclosed by CHEN (CN111965515A) in view of MA (CN206348428U) as the recited structure will be used during the normal operation, as discussed above with regard to claim 1. CHEN as modified further teaches a system (a charging module system including anti reverse current diode fault detection circuitry associated with an anti backflow circuit [(0004)- (0009],
Figs. 1-4), an anti backflow circuit comprising: a high electric potential input end; and a
high electric potential output end (an anti reverse current diode arrangement
including a front end voltage VL and a back end voltage Vbat positioned on opposite sides of
the anti reverse current diode [0006], [0021], [0025], [0030], Fig. 1), a detection circuit configured to perform failure detection on the anti backflow circuit (anti reverse current diode fault detection circuitry configured to determine whether the anti reverse current diode is short circuited or open circuited [0006]- [0009], [0021]- [0035], Figs. 1-4).
Regarding claim 19, the structure recited is intrinsic to the method recited in claim 10, as disclosed by CHEN (CN111965515A) in view of MA (CN206348428U) as the recited structure will be used during the normal operation of the method, as discussed above with regard to claim 10. CHEN as modified further teaches an apparatus (a charging module and power conversion apparatus configured for charging operations [0001]- [0006], Figs. 1-4), a conversion circuit configured to: receive alternating current electric power (a charging module power conversion system configured to receive input power for charging operations [0001]- [0004]), convert the alternating current electric power into direct current electric power (a power conversion device configured to perform power conversion operations for charging modules [0020], [0023]- [0024], Fig. 1 ), and output the direct current electric power (outputting converted voltage Vo and module output voltages associated with charging module operation [0020], [0023]- [0025], Fig. 1 ).
Regarding claim 20, CHEN further teaches a control circuit connected to both the conversion circuit and the digital component and configured to receive the first level signal (module control circuitry configured to receive fault determination information associated with anti reverse current diode fault detection operations and control charging module operations [(0005)- [0009], [0021]- [0035), Figs. 1-4).
CHEN does not explicitly teach wherein after receiving the first level signal, the control circuit is configured to prohibit the conversion circuit from outputting the direct current electric power.
However, MA in a relevant art further teaches controller circuitry configured to receive detected operating information and out corresponding control information based on detected operating conditions [0013]- [0019], [0041]- [0044], [0051]- [0053].
wherein after receiving the first level signal, the control circuit is configured to prohibit the conversion circuit from outputting the direct current electric power (the combination of CHEN and MA teaching processing detected fault information through controller
circuitry to control operation of the charging module responsive to detected operating conditions).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the charging module control arrangement of CHEN using the controller circuitry of MA in order to prohibit output of direct current
electric power responsive to receipt of a fault indicating signal because MA expressly teaches controller circuitry configured to process detected operating information and generate corresponding control outputs, while CHEN teaches controlling charging module operation responsive to detected anti reverse current diode fault conditions.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Yang (US. Publication 20160368390) discloses VEHICLE MUTUAL-CHARGING SYSTEM AND CHARGING CONNECTOR.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TAQI R NASIR whose telephone number is (571)270-1425. The examiner can normally be reached 9AM-5PM EST M-F.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lee Rodak can be reached at (571) 270-5628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TAQI R NASIR/Examiner, Art Unit 2858
/LEE E RODAK/Supervisory Patent Examiner, Art Unit 2858
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