DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on April 6, 2026 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (U.S. Patent 8,841,959, hereafter Kim) in view of Zeng et al. (U.S. Patent 6,920,055, hereafter Zeng) and in view of Zeleznik et al. (U.S. Patent 10,295,576, hereafter Zeleznik).
Claim 1: Kim teaches a device (Figures 1 and 2), comprising:
a charge pump (110; column 3 lines 1-5) that increases a first value of an input voltage (voltage at IN) by a defined amount (the amount of voltage boosted by the circuit 110; column 3 lines 1-5), resulting in an output voltage that comprises a second value (VCP); and
an error amplifier (121; Figure 1 shown in detail as A; Figure 2, column 3 lines 36-39), the error amplifier receives the output voltage from the charge pump (from 110) and removes defined mixed down frequency disturbances (120 removes the noise boosted by circuit 110, outputting a signal without noise; column 3 lines 5-12 and 26-29).
Kim does not specifically teach the details of the booster circuitry 110.
Zeng teaches a charge pump (Figure 2B), where the charge pump comprises circuitry (switches S1-S8) that decouples (in Phase I, S1 and S5 decouple TOP from MID and in Phase II, S2, S3, S6, S7 and S9 decouple MID from TOP) the input voltage of the charge pump (TOP) from the output voltage of the charge pump (MID; column 5 lines 1-4) during each of a plurality of distinct operational phases of the charge pump (during Phase I, C1, C2 and Cmid are coupled in parallel between MID and ground; during Phase II, C1 and C2 are coupled between TOP and ground; therefore in each operational phase TOP is not connected to MID) and in the process mixes defined frequency disturbances back to baseband (Figure 3 of Kim, where 110 mixes input noise to a baseband center voltage VCP higher than VIN).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the charge pump taught by Zeng as the voltage boosting circuit of Kim to provide both step-up and step-down operation in an efficient manner with multiple switch configurations (column 1 lines 17-27 and 43-45).
Kim and Zeng do not specifically teach that the error amplifier is configured to drive a micro-electromechanical system capacitive sensor.
Zeleznik teaches a charge pump (Pos Charge Pump; Figure 1, corresponding to the combined circuit of Kim and Zeng) configured to drive (via HV POS) a micro-electromechanical system capacitive sensor (102; column 3 lines 3-7 and 39-42), wherein an output of the error amplifier (output of 120 of Kim) is provided as input to the micro-electromechanical system capacitive sensor (via HV POS).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the combined circuit of Kim and Zeng to provide a bias voltage to capacitive sensor 102 of Zeleznik to remove noise without voltage loss of the input signal (column 1 lines 21-22 of Kim) and improve amplified capacitive sensor systems that reduce distortion in amplifier outputs (column 1 lines 37-39 of Zeleznik).
Claim 2: The combined circuit further teaches that the circuitry comprises a first number of flying capacitors (C1, C2; Figure 2B of Zeng) and a second number of Direct Current (DC) capacitors (Cmid, where Cmid has a fixed connection to ground) that are arranged in a defined configuration (via switches S1-S8), wherein the defined configuration decouples the input voltage and the output voltage during distinct phases of the charge pump (in Phase I, S1 and S5 decouple TOP from MID and in Phase II, S2, S3, S6, S7 and S9 decouple MID from TOP).
Claim 3: The combined circuit further teaches that the first number of flying capacitors (C1, C2; Figure 2B of Zeng) comprise no fixed connection to ground (only connected to GND via S4 and S8), and wherein the second number of DC capacitors (Cmid) comprises a fixed connection to ground (Cmid is coupled directly to GND; Figure 2B).
Claim 4: The combined circuit further teaches the plurality of distinct operational phases (Phase I and Phase II; Figure 2B of Zeng) comprise a first phase and a second phase, wherein the first phase is a sampling phase (Phase II couples C1 and C2 in parallel between TOP and GND) and the second phase is a gain phase (Phase I couples C1, C2, and Cmid between MID and GND).
Claim 5: The combined circuit further teaches that the charge pump is configured in a one to two (1:2) voltage conversion ratio (Figure 2D of Zeng in reverse operation mode and MID is the input and TOP is the output; column 5 lines 6-8 and 39-41),
wherein, during a first phase of the plurality of distinct operational phases (Phase I), the first number of flying capacitors (C1, C2) and the second number of DC capacitors (Cmid) are arranged in a parallel configuration connected to the input (between MID and GND), and
wherein, during a second phase of the plurality of distinct operational phases (Phase II), the first number of flying capacitors (C1, C2) are configured in a parallel arrangement (between TOP and MID) and the second number of DC capacitors (Cmid) are connected in series with the parallel arrangement towards the output (between MID and GND, where towards the output is through C1 and C2).
Claim 6: The combined circuit further teaches that the charge pump is configured in a two to three (2:3) voltage conversion ratio (Figure 2C of Zeng in reverse operation mode where MID is connected to the input and TOP is connected to the output; column 5 lines 6-8 and 30-32),
wherein, during a first phase of the distinct phases (Phase I), a series configuration comprising the first number of flying capacitors (C1, C2 connected in series between MID and GND) are placed in a parallel configuration with the second number of DC capacitors (Cmid connected in parallel between MID and GND), and
wherein, during a second phase of the distinct phases (Phase II), the first number of flying capacitors (C1, C2) are configured in a parallel arrangement (connected in parallel between TOP and MID) and the second number of DC capacitors (Cmid) are connected in series with the parallel arrangement (connected between MID and GND).
Claim 7: Kim, Zeng and Zeleznik teach the limitations of claim 1 above. Kim, Zeng and Zeleznik do not specifically teach that the charge pump is automatically configured based on the input voltage to accommodate a continuous supply range from around 1.62 volts to about 3.6 volts. However, the selection of a supply voltage range for the charge pump would have been chosen to ensure an optimal performance of the circuit. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select a continuous supply range from around 1.62 volts to about 3.6 volts when employing the charge pump circuit of the combined circuit to maximize the overall performance of the charge pump circuit. Furthermore, such a provision of selecting a specific voltage involves only routine design expedient.
Claim 8: The combined circuit further teaches that the defined amount is equal to a value of the input voltage (Table 1 and Table 2 of Zeng), and
wherein a ratio of an output voltage value to an input voltage value is a function of a topology of the charge pump (depending on the Formula and Configuration columns in Tables 1 and 2 of Zeng).
Claim 9: The combined circuit further teaches that the charge pump is configured to mix noise at a drive frequency towards direct current (DC) (Figure 3 of Kim, where 110 mixes input noise to a baseband center voltage VCP higher than VIN), and wherein the error amplifier removes noise at baseband (120 of Kim removes the noise boosted by circuit 110, outputting a signal without noise; column 3 lines 5-12 and 26-29).
Claim 10: The combined circuit further teaches that the charge pump is a gearbox charge pump (Figures 2B, 2C and 2D and Tables 1 and 2 of Zeng describe a gearbox charge pump that offers two or more different converter topologies in combination with a topology switching scheme) and the error amplifier is a sensor drive linear voltage regulator (column 3 lines 18-21 and equation 1 of Kim which describes a linear voltage regulator that drives sensor 102 of Zeleznik).
Claim 11: The combined circuit further teaches that the device is configured to facilitate an improvement to a signal to noise ratio as compared to a conventional signal to noise ratio (column 3 lines 5-12 of Kim).
Claim 12: Kim teaches a circuit (Figures 1 and 2) comprising:
a charge pump (110; column 3 lines 1-5) that comprises an input terminal (connected to IN) and an output terminal (connected to 120);
an error amplifier (121; Figure 1 shown in detail as A; Figure 2, column 3 lines 36-39) configured to provide high power supply rejection ratio at baseband (120 removes the noise boosted by circuit 110, outputting a signal without noise; column 3 lines 5-12 and 26-29), wherein the output terminal of the charge pump is operatively connected to an input node of the error amplifier (110 connected to 120 and 121).
Kim does not specifically teach the details of the booster circuitry 110.
Zeng teaches a charge pump (Figure 2B), wherein the input terminal is operatively connected to a voltage supply (TOP connected to IN of Kim) where the charge pump comprises circuitry (switches S1-S8) that decouples (in Phase I, S1 and S5 decouple TOP from MID and in Phase II, S2, S3, S6, S7 and S9 decouple MID from TOP) the input voltage of the charge pump (TOP) from the output voltage of the charge pump (MID; column 5 lines 1-4) during each of a plurality of distinct operational phases of the charge pump (during Phase I, C1, C2 and Cmid are coupled in parallel between MID and ground; during Phase II, C1 and C2 are coupled between TOP and ground; therefore in each operational phase TOP is not connected to MID), and in the process mixes defined frequency disturbances back to baseband (Figure 3 of Kim, where 110 mixes input noise to a baseband center voltage VCP higher than VIN).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the charge pump taught by Zeng as the voltage boosting circuit of Kim to provide both step-up and step-down operation in an efficient manner with multiple switch configurations (column 1 lines 17-27 and 43-45).
Kim and Zeng do not specifically teach that the error amplifier is configured to drive a micro-electromechanical system capacitive sensor.
Zeleznik teaches a charge pump (Pos Charge Pump; Figure 1, corresponding to the combined circuit of Kim and Zeng) configured to drive (via HV POS) a micro-electromechanical system capacitive sensor (102; column 3 lines 3-7 and 39-42), wherein an output of the error amplifier (output of 120 of Kim) is provided as input to the micro-electromechanical system capacitive sensor (via HV POS).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the combined circuit of Kim and Zeng to provide a bias voltage to capacitive sensor 102 of Zeleznik to remove noise without voltage loss of the input signal (column 1 lines 21-22 of Kim) and improve amplified capacitive sensor systems that reduce distortion in amplifier outputs (column 1 lines 37-39 of Zeleznik).
Claim 13: The combined circuit further teaches that the circuitry comprises a first number of flying capacitors (C1, C2; Figure 2B of Zeng) and a second number of Direct Current (DC) capacitors (Cmid, where Cmid has a fixed connection to ground) that are arranged in a defined configuration (via switches S1-S8), wherein the defined configuration decouples the input voltage and the output voltage during distinct phases of the charge pump (in Phase I, S1 and S5 decouple TOP from MID and in Phase II, S2, S3, S6, S7 and S9 decouple MID from TOP).
Claim 14: The combined circuit further teaches that the charge pump is configured in a one to two (1:2) voltage conversion ratio (Figure 2D of Zeng in reverse operation mode and MID is the input and TOP is the output; column 5 lines 6-8 and 39-41),
wherein, during a first phase of the plurality of distinct operational phases (Phase I), the first number of flying capacitors (C1, C2) and the second number of DC capacitors (Cmid) are arranged in a parallel configuration connected to the input (between MID and GND), and
wherein, during a second phase of the plurality of distinct operational phases (Phase II), the first number of flying capacitors (C1, C2) are configured in a parallel arrangement (between TOP and MID) and the second number of DC capacitors (Cmid) are connected in series with the parallel arrangement towards the output (between MID and GND, where towards the output is through C1 and C2).
Claim 15: The combined circuit further teaches that the charge pump is configured in a two to three (2:3) voltage conversion ratio (Figure 2C of Zeng in reverse operation mode where MID is connected to the input and TOP is connected to the output; column 5 lines 6-8 and 30-32),
wherein, during a first phase of the distinct phases (Phase I), a series configuration comprising the first number of flying capacitors (C1, C2 connected in series between MID and GND) are placed in a parallel configuration with the second number of DC capacitors (Cmid connected in parallel between MID and GND), and
wherein, during a second phase of the distinct phases (Phase II), the first number of flying capacitors (C1, C2) are configured in a parallel arrangement (connected in parallel between TOP and MID) and the second number of DC capacitors (Cmid) are connected in series with the parallel arrangement (connected between MID and GND).
Claim 16: The combined circuit further teaches that the first number of flying capacitors (C1, C2; Figure 2B of Zeng) comprise no fixed connection to ground (only connected to GND via S4 and S8), and wherein the second number of DC capacitors (Cmid) comprises a fixed connection to ground (Cmid is coupled directly to GND; Figure 2B).
Claim 17: Kim, Zeng and Zeleznik teach the limitations of claim 1 above. Kim, Zeng and Zeleznik do not specifically teach that the charge pump is automatically configured based on the input voltage to accommodate a continuous supply range from around 1.62 volts to about 3.6 volts. However, the selection of a supply voltage range for the charge pump would have been chosen to ensure an optimal performance of the circuit. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select a continuous supply range from around 1.62 volts to about 3.6 volts when employing the charge pump circuit of the combined circuit to maximize the overall performance of the charge pump circuit. Furthermore, such a provision of selecting a specific voltage involves only routine design expedient.
Claim 18: The combined circuit further teaches that the charge pump is configured to mix noise at a drive frequency towards direct current (DC) (Figure 3 of Kim, where 110 mixes input noise to a baseband center voltage VCP higher than VIN), and wherein the error amplifier removes supply ripple at DC (120 of Kim removes the noise boosted by circuit 110, outputting a signal without noise; column 3 lines 5-12 and 26-29).
Claims 19 and 20: The combined circuit further teaches that the plurality of distinct operational phases of the charge pump (Figure 2B of Zeng) comprise a first phase (Phase II) and a second phase (Phase I), during the first phase, the circuitry is in a first configuration that is tracked to the input voltage (during Phase II, C1 and C2 are connected in parallel between TOP and ground, tracking the input voltage at TOP), and during the second phase, the circuitry is in a second configuration in which the input terminal is disconnected and the circuitry is only connected to the output terminal of the charge pump (during Phase I, C1, C2 and Cmid are connected in parallel between the output terminal MID and ground, and TOP is disconnected).
Response to Arguments
Applicant's arguments filed April 6, 2026 have been fully considered but they are not persuasive.
Applicant asserts that Zeng does not teach decoupling the input voltage of the charge pump from the output voltage of the charge pump during each of a plurality of distinct operational phases of the charge pump. Examiner respectfully disagrees. Zeng teaches a charge pump (Figure 2B), where the charge pump comprises circuitry (switches S1-S8) that decouples (in Phase I, S1 and S5 decouple TOP from MID and in Phase II, S2, S3, S6, S7 and S9 decouple MID from TOP) the input voltage of the charge pump (TOP) from the output voltage of the charge pump (MID; column 5 lines 1-4) during each of a plurality of distinct operational phases of the charge pump (during Phase I, C1, C2 and Cmid are coupled in parallel between MID and ground; during Phase II, C1 and C2 are coupled between TOP and ground; therefore in each operational phase TOP is not connected to MID).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to COLLEEN J O'TOOLE whose telephone number is (571)270-1273. The examiner can normally be reached Monday - Friday, 9:00 am - 6:00pm.
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/C.J.O/Examiner, Art Unit 2836
/Menatoallah Youssef/SPE, Art Unit 2836
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