DETAILED ACTION
This action is responsive to U.S. Patent Application No. 18/461,539 filed on 6 September 2023.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Election/Restrictions
Applicant’s election with traverse of the Species 2 embodiment in the reply filed on 10 February 2026 is acknowledged. The traversal is on the grounds that:
Applicants also note that no "serious burden" is present in examining the remaining claims 6-8, and cite the following: 803 Restriction -When Proper Under the statute an application may properly be required to be restricted to one of two or more claimed inventions only if they are able to support separate patents and they are either independent (MPEP § 806.04 - § 806.04(i)) or distinct (MPEP § 806.05 - §806.05(i)). If the search and examination of an entire application can be made without serious burden, the examiner must examine it on the merits, even though it includes claims to independent or distinct inventions.
Applicant Arguments/Remarks Made in an Amendment (filed 10 February 2026) at 10. Applicant’s arguments are unpersuasive because none of Applicant’s grounds for traversal substantially address any criteria for restriction between mutually exclusive species. See MPEP § 806.04(f). The differences between embodiments noted in the Requirement for Restriction provide prima facie evidence that a serious search burden exists. See Requirement for Restriction/Election (mailed 12 December 2025) at 2-6. Applicant’s entire argument consists of a single conclusory sentence, and does not address any of the grounds that prima facie show that a serious search and/or examination burden exists.
Accordingly, the requirement is still deemed proper and is therefore made FINAL.
Regarding Applicant’s listing of claims 1-5 and 9-23 as readable on the elected species, the Examiner respectfully notes that claim 19 does not belong to the elected Species 2 embodiment. Claim 19 recites the limitation “wherein a connection cable connected to the anode is arranged in the first display area; and the connection cable overlaps the light emitting elements in a direction perpendicular to a plane where the substrate is arranged, and the light emitting elements overlapping the same connection cable are configured to emit light in a same color.” Applicant’s elected Species 2 embodiment is depicted in FIG. 13. The unelected Species 4 embodiment is depicted in FIGS. 8 and 15, however, which are the only embodiments disclosed that disclose a “connection cable” feature.
Accordingly, claims 6-8 and 19 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected species, there being no allowable generic or linking claim.
Claim Objections
Claim 5 is objected to because of the following informalities:
Regarding claim 5: the sentence structure of claim 5 is confusing and should be amended to the following (or similar): “wherein the first light emitting element is configured to emit green or red light blue light
Appropriate correction is required.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the claimed features:
Of claim 9: wherein “the anode is connected to one end of the anode signal cable”;
Of claim 9: wherein “the other end of the anode signal cable is connected to the binding area for the anode to be connected to no pixel circuit.”
Of claim 10: wherein “wherein the anode signal cable comprises: a ring part surrounding the first display area, wherein the anode is connected to the ring part”;
must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 4, 9, 11, and 12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
“The essential inquiry pertaining to this requirement is whether the claims set out and circumscribe a particular subject matter with a reasonable degree of clarity and particularity. ‘As the statutory language of “particular[ity]” and “distinct[ness]” indicates, claims are required to be cast in clear—as opposed to ambiguous, vague, indefinite—terms. It is the claims that notify the public of what is within the protections of the patent, and what is not.’” MPEP 2173.02(II) (quoting In re Packard, 751 F.3d 1307, 1313, 110 USPQ2d 1785, 1788 (Fed. Cir. 2014)).
Regarding claim 4: claim 4 states, in relevant part, “the first light emitting element in the light emitting element group is provided with a larger opening than the first light emitting element in the second display area.” It is unclear whether Applicant is claiming (1) a comparison of opening sizes, thus requiring an opening for each of the first light emitting elements in the first and second display areas; or (2) a comparison of an opening size to light emitting element size, thus requiring an opening for only the first light emitting element in the first display area. For the purposes of examination, the relevant language has been interpreted according to interpretation (1).
Claim 5, which depends from claim 4, is rejected for the same reasons as claim 4.
Regarding claim 9: claim 9 states, in relevant part, “and the other end of the anode signal cable is connected to the binding area for the anode to be connected to no pixel circuit.” It is unclear precisely what features the abovementioned claim language encompasses. Regarding the “no pixel circuit” portion of the claim language, it is unclear whether Applicant is claiming a configuration wherein (1) the anode is not directly connected to a pixel circuit, or (2) the claim language is a negative claim limitation and is claiming an absence of a connection to a pixel circuit, such that the anode and none of the light emitting elements are not connected to any pixel circuit element. Confusion is further compounded by the fact that FIG. 10 appears to specifically show wherein the anode in the first display area is connected to a pixel circuit, but none of the figures show the absence of a connection to a pixel circuit. For the purposes of examination, the relevant language has been interpreted according to interpretation (1).
Regarding the “to be connected” portion of the claim language, it is unclear whether the limitation refers to a capability that is required to be present in the invention or whether it refers to a device capability that is a mere possibility that is not required. In other words, it is unclear whether a semiconductor package device can practice the invention of claim 9 by satisfying all the limitations of claim 9 without necessarily being required to possess the capability to be connected to other structures. For the purposes of examination, the phrase “to be connected” has been interpreted to mean that the limitation is optional, everywhere it appears.
Claims 10-12, which depend from claim 9, are rejected for the same reasons as claim 9.
Regarding claim 11: claim 11 states, in relevant part, “and the anode signal cable is made of at least one of the first metal layer, the second metal layer, the third metal layer and the fourth metal layer.” It is unclear whether Applicant is claiming (1) wherein the anode signal cable is additional to one of the metal layers, (2) wherein the anode signal cable is one of the metal layers. For the purposes of examination, the relevant language has been interpreted according to interpretation (1).
Regarding claim 12: claim 12 states, in relevant part, “wherein the anode signal cable extends from the marginal area closest to the first display area to the first display area to be connected to the anode.” Regarding the “to be connected” portion of the claim language, it is unclear whether the limitation refers to a capability that is required to be present in the invention or whether it refers to a device capability that is a mere possibility that is not required. In other words, it is unclear whether a semiconductor package device can practice the invention of claim 12 by satisfying all the limitations of claim 12 without necessarily being required to possess the capability to be connected to other structures. For the purposes of examination, the phrase “to be connected” has been interpreted to mean that the limitation is optional, everywhere it appears.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-5 and 9-18 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by U.S. Patent Publication No. 2023/0209892 (filed Oct. 12, 2022) (hereinafter “Kim”).
Regarding independent claim 1, Kim discloses: A display panel (FIG. 3A, display panel DP, [0082]), comprising:
a display area (FIG. 3A, depicting a display area, [0062]),
wherein the display area comprises a first display area (FIG. 6A, depicting that portion of the display area DA2 shown in annotated FIG. 6A, which is a first display area, [0055]) and a second display area at least partially surrounding the first display area (FIG. 4A, display area DA1, which at least partially surrounds the portion of the display area DA2 shown in annotated FIG. 6A, [0062]), and
the first display area has greater light transmittance than the second display area (FIG. 7A, depicting wherein the light emitting elements R_ED, G_ED, and B_ED in the display area DA1 overlap with driving circuits, but the light emitting elements R_ED, G_ED, and B_ED in the display area DA2 shown in annotated FIG. 6A do not overlap with driving circuits, and thus the display area DA2 would have a greater transmittance than the display area DA1, [0096]);
a substrate (FIG. 8A, base layer DP_BS, [0173]); and
a display array arranged on the substrate (FIGS. 2/3, depicting a display array comprising a plurality of light emitting elements R_ED, G_ED, and B_ED),
wherein the display array comprises light emitting elements arranged in the display area (FIG. 7A, depicting wherein light emitting elements R_ED, G_ED, and B_ED are arranged in the display area),
the light emitting elements arranged in the first display area are grouped into at least one light emitting element group (FIG. 6A, depicting that portion of the display area DA2 shown in annotated FIG. 6A, which are grouped into at least one light emitting element group [0055]), and
the light emitting elements in the same light emitting element group share a same anode (FIGS. 6A /8A, depicting wherein the light emitting elements R_ED (R_ED21/22) share a same anode, the light emitting elements G_ED (G1_ED21/22) share a same anode, and the light emitting elements B_ED (B_ED21/22) share a same anode, [0119]).
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Regarding claim 2, Kim further discloses wherein all the light emitting elements arranged in the first display area (FIG. 6A, depicting that portion of the display area DA2 shown in annotated FIG. 6A, which is a first display area, [0055]) are grouped into one light emitting element group and share the same anode (FIGS. 6A /8A, depicting wherein that portion of the display area DA2 shown in annotated FIG. 6A, which is a first display area, forms a single group which includes light emitting elements R_ED, G_ED, and B_ED, and further wherein the light emitting elements R_ED (R_ED21/22) share a same anode, the light emitting elements G_ED (G1_ED21/22) share a same anode, and the light emitting elements B_ED (B_ED21/22) share a same anode).
Regarding claim 3, Kim further discloses wherein the light emitting elements in the light emitting element group are configured to emit light in at least two different colors (FIGS. 6A /8A, depicting wherein that portion of the display area DA2 shown in annotated FIG. 6A, which is a first display area, forms a single group which includes light emitting elements R_ED, G_ED, and B_ED, which emit light of at least two different colors), wherein the light emitting elements configured to emit light in different colors are different in luminous efficiency (FIGS. 6A /8A, depicting wherein the light emitting elements R_ED, G_ED, and B_ED emit light of different colors, and thus possess different luminous efficiencies, [0096]).
Regarding claim 4, Kim further discloses wherein the light emitting elements in the light emitting element group and the light emitting elements arranged in the second display area both comprise a first light emitting element and a second light emitting element that are configured to emit light in different colors (FIGS. 4A/6A, depicting wherein both the display area DA2 shown in annotated FIG. 6A, which is a first display area, and the display area DA1 include light emitting elements R_ED, G_ED, and B_ED), the first light emitting element has greater luminous efficiency than the second light emitting element (FIGS. 4A/6A, depicting wherein the light emitting elements emit light of different colors, and thus possess different luminous efficiencies, and further wherein the first light emitting element may be a red light emitting element R_ED or a green light emitting element G_ED, and the second light emitting element may be a blue light emitting element B_ED), and the first light emitting element in the light emitting element group is provided with a larger opening than the first light emitting element in the second display area (FIGS. 4A/6A, depicting wherein the first light emitting element, e.g., the red light emitting element R_ED in the display area DA2 shown in annotated FIG. 6A is provided with a larger opening than the opening for the first light emitting element, e.g., the green light emitting element G_ED in the display area DA1).
Regarding claim 5, Kim further discloses wherein the first light emitting element is configured to emit light in green or red, and the second light emitting element is configured to emit light in blue (FIGS. 4A/6A, depicting wherein both the display area DA2 shown in annotated FIG. 6A, which is a first display area, and the display area DA1 include light emitting elements R_ED, G_ED, and B_ED, and further wherein the first light emitting element may be a red light emitting element R_ED or a green light emitting element G_ED, and the second light emitting element may be a blue light emitting element B_ED).
Regarding claim 9, Kim further discloses a marginal area surrounding the second display area (FIG. 3A/FIG. 6A, depicting that portion of the display area DA2 excluding that portion of the display area DA2 shown in annotated FIG. 6A, which is a first display area, which surrounds the display area DA1),
wherein the marginal area comprises a binding area (FIGS. 3A/6A, depicting that area in which the driving circuits G1_PD2/R_PD2/B_PD2 are disposed),
an anode signal cable is arranged between the substrate and the display array (FIGS. 3A/6A/8A, routing line RL1/RL2_1/RL3 arranged between the base layer DP_BS and the light emitting element layer DP_EL, [0173], [0189]), and
the anode is connected to one end of the anode signal cable and the other end of the anode signal cable is connected to the binding area for the anode to be connected to no pixel circuit (FIGS. 3A/6A/8A, depicting wherein the anodes of the light emitting elements R_ED, G_ED, and B_ED are connected to one end of the routing line RL1/RL2_1/RL3, and the other end of the routing line RL1/RL2_1/RL3 is connected to the area in which the driving circuits G1_PD2/R_PD2/B_PD2 are disposed).
Regarding claim 10, Kim further discloses wherein the anode signal cable comprises: a ring part surrounding the first display area (FIGS. 2B/8A, depicting, e.g., voltage lines VL1 and VIL and VSS, which surround that portion of the display area DA2 shown in annotated FIG. 6A, which is a first display area), wherein the anode is connected to the ring part (FIGS. 2B/8A, depicting wherein the voltage lines VL1 and VIL and VSS are electrically connected to the routing line RL1/RL2_1/RL3); and a wiring part extending from the binding area to an edge of the first display area, wherein the wiring part is connected to the ring part (FIGS. 2B/8A, depicting wherein the routing line RL1/RL2_1/RL3 includes multiple portions extending out from the that area in which the driving circuits G1_PD2/R_PD2/B_PD2 are disposed, which are also electrically connected to the voltage lines VL1 and VIL and VSS).
Regarding claim 11, Kim further discloses wherein the light emitting element in the second display area is connected to a pixel circuit (FIGS. 3A/6A/8A, depicting wherein the display area DA1 includes light emitting elements R_ED, G_ED, and B_ED, which are connected to driving circuits R_PD, G1_PD, and B_PD), and the pixel circuit is arranged between the display array and the substrate and is in the second display area (FIGS. 3A/6A/8A, disclosing wherein the driving circuits R_PD, G1_PD, and B_PD are arranged between the base layer DP_BS and the light emitting element layer DP_EL, [0097], [0173]);
a gate electrode of a thin film transistor in the pixel circuit is arranged in a first metal layer (FIGS. 3A/6A/8A, depicting, exemplarily, a transistor TR1 including a control electrode GE in a first metal layer, [0184]), and
a source electrode and a drain electrode of the thin film transistor are arranged in a second metal layer (FIGS. 3A/6A/8A, depicting, exemplarily, a transistor TR1 including a source area SE and drain area DE including a connection electrode CN1 in a second metal layer, [0183], [0186]),
the first metal layer is arranged between the second metal layer and the substrate (FIGS. 3A/6A/8A, depicting, exemplarily, a transistor TR1 wherein the layer including the control electrode GE is arranged between the layer including the source and drain areas SE/DE and the base layer DP_BS),
a third metal layer is arranged between the second metal layer and a conductive layer where the anode is arranged (FIGS. 3A/6A/8A, depicting, exemplarily, a third metal layer including the routing line RL1/RL2_1/RL3 arranged between the layer including the source and drain areas SE/DE and the layer in which the anode electrode is arranged),
a fourth metal layer is arranged between the second metal layer and the first metal layer (FIGS. 3A/6A/8A, depicting, exemplarily, wherein the layer including the control electrode E1 is arranged between the layer including the source and drain areas SE/DE and the layer including the control electrode GE); and
the anode signal cable is made of at least one of the first metal layer, the second metal layer, the third metal layer and the fourth metal layer (FIGS. 3A/6A/8A, depicting, exemplarily, a third metal layer including the routing line RL1/RL2_1/RL3).
Regarding claim 12, Kim further discloses wherein the anode signal cable extends from the marginal area closest to the first display area to the first display area to be connected to the anode (FIGS. 3A/6A/8A, depicting wherein the routing line RL1/RL2_1/RL3 extends from that portion of the display area DA2 excluding that portion of the display area DA2 shown in annotated FIG. 6A, which is a first display area, which surrounds the display area DA1, closest to the display area DA1, to be connected to the anode).
Regarding claim 13, Kim further discloses wherein the anode is a transparent electrode (FIGS. 3A/6A/8A, [0197]: “The first electrode AE1 may include a reflective layer formed of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, and/or compounds thereof and a transparent or semi-transparent electrode layer formed on the reflective layer. The transparent or semi-transparent electrode layer may include at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO), indium oxide (In2O3), and aluminum-doped zinc oxide (AZO). For instance, the first electrode AE1 may have a stack structure of ITO/Ag/ITO.”).
Regarding claim 14, Kim further discloses wherein all the light emitting elements in the first display area share the same anode (FIGS. 6A /8A, depicting wherein that portion of the display area DA2 shown in annotated FIG. 6A, which is a first display area, forms a single group which includes light emitting elements R_ED, G_ED, and B_ED, and further wherein the light emitting elements R_ED (R_ED21/22) share a same anode, the light emitting elements G_ED (G1_ED21/22) share a same anode, and the light emitting elements B_ED (B_ED21/22) share a same anode), the anode comprises a hollow area and a non-hollow area, and the non-hollow area overlaps the light emitting elements (FIGS. 6A /8A, depicting a hollow area and a non-hollow area as shown in Annotated FIG. 8A, wherein the non-hollow area overlaps the light emitting elements).
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Regarding claim 15, Kim further discloses wherein at least ten light emitting elements are grouped into the same light emitting element group (FIG. 6A, depicting 12 light emitting elements in the same group, as shown in Annotated FIG. 6A).
Regarding claim 16, Kim further discloses wherein in the light emitting element group, a first part of the anode overlapping the light emitting elements is lightproof (FIGS. 3A/6A/8A, disclosing lightproof materials; [0197]: “The first electrode AE1 may include a reflective layer formed of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, and/or compounds thereof and a transparent or semi-transparent electrode layer formed on the reflective layer. The transparent or semi-transparent electrode layer may include at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO), indium oxide (In2O3), and aluminum-doped zinc oxide (AZO). For instance, the first electrode AE1 may have a stack structure of ITO/Ag/ITO.”), and a second part of the anode between adjacent light emitting elements is transparent ([0191]: “According to an embodiment, the routing lines RL1, RL2_1, and RL3 may include a transparent conductive line. The transparent conductive line may include a transparent conductive material or a light transmission material. As an example, the routing lines RL1, RL2_1, and RL3 may be formed of a transparent conductive oxide (TCO) layer, such as indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO), and/or indium oxide (In2O3).”).
Regarding claim 17, Kim further discloses wherein the display panel is configured to regulate light to be emitted by the light emitting element in the first display area based on light to be emitted by the light emitting element adjacent to the first display area in the second display area (FIGS. 3A/6A/8A, [0086]: “In an embodiment of the disclosure, the first image displayed in the first display area DA1 and the second image displayed in the second display area DA2 may be dependent on each other. As an example, a picture, a scene in a movie, or a UX/UI design may be formed by the combination of the first image and the second image, however, the disclosure should not be limited thereto or thereby.”).
Regarding claim 18, Kim further discloses wherein the light emitting elements in the first display area configured to emit light in a same color share the same anode; or the light emitting elements in the first display area configured to emit light in at least two colors share the same anode (FIGS. 6A /8A, depicting wherein that portion of the display area DA2 shown in annotated FIG. 6A, which is a first display area, forms a single group which includes light emitting elements R_ED, G_ED, and B_ED, and further wherein the light emitting elements R_ED (R_ED21/22) share a same anode, the light emitting elements G_ED (G1_ED21/22) share a same anode, and the light emitting elements B_ED (B_ED21/22) share a same anode).
Claims 20-23 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by U.S. Patent Publication No. 2021/0202588 (filed Dec. 17, 2020) (hereinafter “Cho”).
Regarding independent claim 20, Cho discloses: An electronic device (FIG. 1, display device 10, [0040]), comprising:
a display panel (FIG. 2, display panel 100, [0041]), wherein the display panel comprises:
a display area (FIG. 1, display area DA, [0041]),
wherein the display area comprises a first display area (FIG. 1, display area DA2, [0041]) and a second display area at least partially surrounding the first display area (FIG. 1, display area DA1, at least partially surrounding the display area DA2, [0041]), and the first display area has greater light transmittance than the second display area (FIG. 1, [0127]: “Since the first display area DA1 is not overlapped with the optical module 200, the first display area DA1 may have first low light transmittance. Since the second display area DA2 is overlapped with the optical module 200, the second display area DA2 may have second low light transmittance higher than the first light transmittance.”);
a substrate (FIG. 5, substrate 110, [0059]); and
a display array arranged on the substrate (FIG. 3, depicting a display array comprising a plurality of light emitting diodes EL1 and EL2, [0088]), wherein the display array comprises light emitting elements arranged in the display area (FIG. 3, depicting wherein light emitting diodes EL1 and EL2 are arranged in the display area DA),
the light emitting elements arranged in the first display area are grouped into at least one light emitting element group (FIGS. 6/9/10/11, depicting that portion of the display area DA2 shown in FIG. 6, which are grouped into at least one light emitting element group, [0083]) and the light emitting elements in the same light emitting element group share a same anode (FIGS. 6/9/10/11, depicting wherein the light emitting diodes EL2 in subpixels SSP1 share a same anode, depicting wherein the light emitting diodes EL2 in subpixels SSP2 share a same anode, and depicting wherein the light emitting diodes EL2 in subpixels SSP3 share a same anode, [0104]);
a photosensitive component arranged on a side of the first display area away from a display surface (FIG. 2, optical module 200 arranged on a side of the display area DA2 away from a display surface, [0040]); and
a control chip configured to at least control the light emitting element to emit light and the photosensitive component to operate (FIG. 2, circuit board 300; [0054]: “The second display area DA2 may be disposed to overlap an area CA where the optical module 200 is disposed, and whether to display an image may be determined depending on the operation of the optical module 200. In detail, the second display area DA2 may display an image together with the first display area DA1 if the optical module 200 is not operated. On the other hand, the second display area DA2 may not display an image if the optical module 200 is operated.”).
Regarding claim 21, Cho further discloses wherein the photosensitive component is a camera module, and wherein the control chip is configured to switch on the light emitting element in the first display area and the camera module alternately in a period (FIG. 2, [0044]: “For example, the optical module 200 may be, but not limited to, a camera. The optical module 200 may be an illumination sensor, a fingerprint sensor, etc.”; [0054]: “The second display area DA2 may be disposed to overlap an area CA where the optical module 200 is disposed, and whether to display an image may be determined depending on the operation of the optical module 200. In detail, the second display area DA2 may display an image together with the first display area DA1 if the optical module 200 is not operated. On the other hand, the second display area DA2 may not display an image if the optical module 200 is operated.”).
Regarding claim 22: Claim 22 recites the limitation “wherein a duration in which one of the light emitting element and the camera module is on is an integral multiple of a duration in which the other is on, in the period.” “Apparatus claims cover what a device is, not what a device does.” MPEP § 2114(II) (quoting Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469 (Fed. Cir. 1990)). “A claim containing a ‘recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus’ if the prior art apparatus teaches all the structural limitations of the claim.” Id. (quoting Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987)).
In the instant case, the limitation “wherein a duration in which one of the light emitting element and the camera module is on is an integral multiple of a duration in which the other is on, in the period” does not define any further structural or functional limitations of the electronic device, and instead is clearly an intended use of the electronic device. Because Cho discloses all the limitations of claim 21, from which claim 22 depends, and because claim 22 recites no further structural or functional limitations, Cho also anticipates claim 22.
Regarding claim 23, Cho further discloses wherein the photosensitive component is a camera module, and wherein the control chip is configured to control the camera module to be on and the first display area to not perform display throughout a period (FIG. 2, [0044]: “For example, the optical module 200 may be, but not limited to, a camera. The optical module 200 may be an illumination sensor, a fingerprint sensor, etc.”; [0054]: “The second display area DA2 may be disposed to overlap an area CA where the optical module 200 is disposed, and whether to display an image may be determined depending on the operation of the optical module 200. In detail, the second display area DA2 may display an image together with the first display area DA1 if the optical module 200 is not operated. On the other hand, the second display area DA2 may not display an image if the optical module 200 is operated.”).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: U.S. Patent Publication Nos.: 2024/0065044 (effectively filed Aug. 17, 2022) (disclosing a display panel including various another configurations); 2020/0052048 (filed Mar. 31, 2019) (disclosing a display panel including multiple leds on a single anode); 2017/0294155 (filed July 29, 2016) (disclosing a display panel including multiple leds on a single anode).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADAM D WEILAND whose telephone number is (703)756-4760. The examiner can normally be reached Monday - Friday 9am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached at (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ADAM D WEILAND/Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
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