DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant’s submission filed on 05/27/2026 has been entered.
Response to Amendments
Claims 1, 9-10, and 15 are amended.
Claims 4-8, 13-14, 17, and 19 are cancelled.
Claims 1-3, 9-12, 15-16, 18, and 20 are pending.
Claim Objections
Claims 1 and 15 is/are objected to because of the following informalities:
In Claim 1, the phrase “the second clock signal is transmitted to single input terminal of the second single-input signal splitter” should be “the second clock signal is transmitted to the single input terminal of the second single-input signal splitter”
In Claim 15, the phrase “transmit the local oscillator signal a first input terminal” should be “transmit the local oscillator signal to a first input terminal”
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims
particularly pointing out and distinctly claiming the subject matter which the
inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out
and distinctly claiming the subject matter which the applicant regards as his
invention.
Claims 2-3 and 15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding Claim 2, the claims recites the limitation “the fault.” It is unclear whether this limitation refers to the “fault in the first clock generation circuit” of Claim 1, or to the “fault in the first local oscillator signal generator” of Claim 1.
Regarding Claim 3, the claims recites the limitation “the fault.” It is unclear whether this limitation refers to the “fault in the first clock generation circuit” of Claim 1, or to the “fault in the first local oscillator signal generator” of Claim 1.
Regarding Claim 15, the claim recites the limitation “generate a local oscillator signal using a second clock signal.” It is unclear whether “a second clock signal” (emphasis added) refers to the second clock signal generated by the follower radar device recited earlier in the claim, or to a different second clock signal.
Regarding Claim 15, the claim recites the limitation “the oscillator signal.” There is insufficient antecedent basis for this limitation in the claim. The limitation is interpreted as referring to “the local oscillator signal” (emphasis added) recited earlier in the claim.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C.
102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the
statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a
new ground of rejection if the prior art relied upon, and the rationale supporting the rejection,
would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness
rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the
claimed invention is not identically disclosed as set forth in section 102, if the
differences between the claimed invention and the prior art are such that the
claimed invention as a whole would have been obvious before the effective filing
date of the claimed invention to a person having ordinary skill in the art to which
the claimed invention pertains. Patentability shall not be negated by the manner in
which the invention was made.
Claim(s) 1-3 and 9-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tong (US 2019/0187273) in view of Melzer (US 2022/0308161) and Lichter (US 6,970,045).
Regarding Claim 1, Tong teaches:
An automotive radar system, comprising:
a first crystal oscillator ([0067]: "a crystal oscillator for providing a reference clock signal");
a leader radar device electrically connected to the first crystal oscillator ([0063]: "the first transceiver 210 is configured as master IC"), the leader radar device including:
a first clock generation circuit, including a first crystal-controlled clock oscillator unit configured to generate a first clock signal based upon a first input signal from the first crystal oscillator ([0067]: " Each of the first and second transceivers 210, 220, when configured as master IC, may also transmit other signals (not shown) to the slave IC, such as a common clock signal"),
…
a first local oscillator signal generator including a first phase locked loop circuit and local oscillator interface configured to generate a first local oscillator signal using the first clock signal ([0053]: “VCO/PLL (voltage controlled oscillator/phase locked loop) block”; [0063]: "the first transceiver 210 is configured as master IC, such that it generates a first common local oscillator (LO) signal"; [0065]: "PLL"), and
first transmitters and receivers configured to transmit and receive first radar signals using the first local oscillator signal ([0054]: "multiple operational transmit (TX) ports and multiple receiver (RX) ports (not shown)");
…
a follower radar device electrically connected to the … crystal oscillator, wherein the follower radar device is configured to receive the first clock signal and the first local oscillator signal from the leader radar device ([0063]: "the second transceiver 220 is configured as slave IC"; "the second transceiver uses the common LO signal received via the coupling device 230 from the first transceiver 210"; [0067]: "Each of the first and second transceivers 210, 220, when configured as master IC, may also transmit other signals (not shown) to the slave IC, such as a common clock signal"), the follower radar device including:
a second clock generation circuit, including a second crystal-controlled clock oscillator unit configured to generate a second clock signal based upon a second input signal from the … crystal oscillator ([0067]: "Each of the first and second transceivers 210, 220, when configured as master IC, may also transmit other signals (not shown) to the slave IC, such as a common clock signal"),
a second local oscillator signal generator including a second phase locked loop circuit configured to generate a second local oscillator signal using the second clock signal ([0064]: "In a second configuration of the radar system 200, the second transceiver 220 is configured as master IC such that it generates a second common local oscillator (LO) signal."; [0065]: "VCO/PLL block"), and
second transmitters and receivers configured to transmit and receive second radar signals using the second local oscillator signal and/or the first local oscillator signal received from the leader radar device ([0054]: "multiple operational transmit (TX) ports and multiple receiver (RX) ports (not shown)"; [0063]: "the second transceiver 220 is configured as slave IC, such that ... the second transceiver uses the common LO signal"), wherein, when the automotive radar system operates in a default mode:
the follower radar device is configured to bypass the second clock generation circuit so that an input signal to the second clock generation circuit is equal in phase to an output signal of the second clock generation circuit ([0030]: "phase compensation circuitry for compensating a phase difference between the outputs of the coupling device"; [0063]: "In this first configuration of the radar system 200, the second transceiver 220 is configured as slave IC, such that the LO output port 222 of the second transceiver 220 is disabled"), and
the follower radar device is configured to by the local oscillator signal generator so that an input signal to the second local oscillator signal generator is equal in phase to an output signal of the second local oscillator signal generator ([0030]: "phase compensation circuitry for compensating a phase difference between the outputs of the coupling device"; [0063]: "In this first configuration of the radar system 200, the second transceiver 220 is configured as slave IC, such that the LO output port 222 of the second transceiver 220 is disabled");
a dual-input radio frequency signal splitter ([0002]: “The LO signal is generated from the master IC and distributed to all the master and slave ICs through one or more T-junction power dividers.”; [0056]: “A local oscillator signal received at either one of the first and second inputs 232, 234 of the coupling device 230 is distributed to both of the first and second outputs 236, 238 of the coupling device 230.”), including:
a first input terminal connected to an output terminal of the first local oscillator signal generator by a first transmission line having a first electrical length ([0056]: “The first input 232 of the coupling device 230 is coupled via a transmission line 240 to the LO output port 212 of the first transceiver 210.”),
a second input terminal connected to an output terminal of the second local oscillator signal generator by a second transmission line having a second electrical length ([0056]: “The second input 234 of the coupling device 230 is coupled via transmission line 250 to the LO output port 222 of the second transceiver 220.”) … ,
a first output terminal electrically connected to an input terminal of the first local oscillator signal generator by a third transmission line having a third electrical length ([0056]: “The first output 236 of the coupling device 230 is coupled via transmission line 260 to the LO input port 214 of the first transceiver 210.”),
a second output terminal electrically connected to an input terminal of the second local oscillator signal generator by a fourth transmission line having a fourth electrical length … ([0056]: “The second output 238 of the coupling device 230 is coupled via transmission line 270 to the LO input port 224 of the second transceiver 220.”); … and
a central processor ([0067]: "a controller for controlling the data acquisition process for the radar system 200 and receiving data from the master and slave ICs."), configured to perform steps including:
…
causing the follower radar device to enable operation of the second clock generation circuit to generate the second clock signal … ([0067]: "Each of the first and second transceivers 210, 220, when configured as master IC, may also transmit other signals (not shown) to the slave IC, such as a common clock signal"; [0075]: "The second IC 220 may then take over the function of master IC"),
detecting a fault in the first local oscillator signal generator of the leader radar device ([0053]: “a functional failure in the VCO/PLL (voltage controlled oscillator/phase locked loop) block of the master IC 110”; [0075]: “in response to a fault occurring in the first IC 210”; Examiner note: VCOs and PLLs are used in both clock signal generation and LO signal generation),
causing the follower radar device to enable operation of the second local oscillator signal generator, wherein the second local oscillator signal is transmitted to the second input terminal of the dual-input radio frequency signal splitter ([0064]: “The common LO signal generated by the second transceiver 220 as master IC is output from the LO output port 222 of the second transceiver 220 and thereby coupled to the second input 234 of the coupling device 230.”; [0075]: "with the second IC 220 providing the common LO signal"), and
causing the follower radar device to transmit and receive radar signals using the second local oscillator signal ([0075]: “This enables the system 200 to continue to function, with the second IC 220 providing the common LO signal for the system 200.”).
Tong does not explicitly teach:
a crystal oscillator operation detection circuit;
a second crystal oscillator, the follower radar device being electrically connected to the second crystal oscillator, and the second clock signal being generated based upon a second input signal from the second crystal oscillator;
wherein the first electrical length is equal to the second electrical length, and wherein the third electrical length is equal to the fourth electrical length;
receiving a message from the crystal oscillator operation detection circuit indicating a fault in the first clock generation circuit of the leader radar device;
the first and second single-input splitters as claimed; or
wherein the second clock signal is transmitted to the single input terminal of the second single-input signal splitter.
However, Lichter is in the field of redundant clock circuitry (Lichter [Abstract]) and teaches:
a crystal oscillator operation detection circuit (Lichter [col. 2, lines 29-30]: “detection circuitry”);
a second crystal oscillator (Lichter [col. 2, line 29]: “two crystal oscillators”);
a second clock signal being generated based upon a second input signal from the second crystal oscillator (Lichter [col. 2, lines 39-40]: “switch to a secondary working oscillator to take over primary timing functions”); and
receiving a message from the crystal oscillator operation detection circuit indicating a fault in the first clock generation circuit, and enabling a second clock source in response to the message (Lichter [col. 2, lines 37-40]: “If the primary oscillator fails or is out of tolerance, the redundant clock module will detect the failure or out of tolerance condition and switch to a secondary working oscillator to take over primary timing functions.”; [col. 3, lines 8-9]: “The detection circuitry generates an error signal that indicates that an oscillator has failed.”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Tong and use a second crystal oscillator electrically connected to the follower radar device and a crystal oscillator operation detection circuit that outputs a message indicating a fault in the first clock generation circuit, and to enable a second clock generation circuit in response to receiving the message, with a reasonable expectation of success. Combing Tong’s cascaded radar system with Lichter’s redundant clock circuitry yields the predictable result of a cascaded radar system that uses a redundant crystal oscillator to provide an uninterrupted clock signal when a crystal oscillator or clock generation circuit fails, which is imperative in mission critical applications (Lichter [col. 1]) like Tong’s automotive radar.
Furthermore, Melzer is in the field of cascaded radar (Melzer [Abstract]) and teaches:
wherein the first electrical length is equal to the second electrical length, and wherein the third electrical length is equal to the fourth electrical length ([0052]: “The first and the second signal paths 141 and 142 are essentially the same length.”; “Again, the signal paths 151 and 152 are essentially of the same length.”);
first and second single-input splitters, each having a single input terminal electrically connected to an output terminal of a respective device (Melzer [0047]: “A coupler or power splitter may be used in order to split the first LO signal for feeding back to the master and simultaneously to the slave.”; Fig. 1, showing CLK inputs and outputs (e.g., 113, 116, 126) connected by splitters with a single input);
wherein the first splitter includes output terminals electrically connected to a first input terminal of the first clock generation circuit and a first input terminal of the second clock generation circuit (Melzer Fig. 1, items 113, 116, 126);
wherein the second splitter includes output terminals electrically connected to a second input terminal of the first clock generation circuit and a second input terminal of the second clock generation circuit (Melzer Fig. 1, items 117, 123, 127); and
wherein the second clock signal is transmitted to the single input terminal of the second single-input signal splitter ([0051]: “the first and second MMICs 110, 120 may each include at least one system clock input terminal 117, 127 in addition to the respective system clock input terminals 116, 126 for more flexible signal routing options and arrangements on a PCB.”).
It would have been obvious to one of ordinary skill in the art to modify Tong and make the first and second electrical lengths equal, make the third and fourth electrical lengths equal, and use first and second single-input splitters to distribute clock signals, as taught by Melzer, with a reasonable expectation of success. Tong teaches that whichever radar device is configured as master transmits the common clock signal ([0067]), and applying Melzer’s known splitter-based signal distribution technique to Tong’s radar system yields the predictable result of allowing either radar device to provide a clock signal when a fault occurs in one of the devices. Making the respective electrical lengths equal yields the predictable result distributing the LO signals to each radar device with the same propagation delay without any significant phase differences (Melzer [0052]).
Regarding Claim 2, Tong as modified teaches: wherein, after detecting the fault in the leader radar device, the central processor is further configured to perform the step of bypassing at least a portion of the first crystal-controlled clock oscillator unit and wherein the follower radar device is configured to transmit the second clock signal to the leader radar device to enable the leader radar device to continue operating using the second clock signal ([0075]: "the system 200 may be reconfigured from the first to the second configurations described above in response to a fault occurring in the first IC 210"; [0064]: "In this second configuration of the radar system 200, the first transceiver 210 is configured as slave IC, such that the LO output port 212 of the first transceiver 210 is disabled"; [0067]: "Each of the first and second transceivers 210, 220, when configured as master IC, may also transmit other signals (not shown) to the slave IC, such as a common clock signal").
Regarding Claim 3, Tong as modified teaches: wherein the leader radar device includes a fault collection and control circuit that is connected to the first clock generation circuit and the central processor is configured to perform the step of detecting the fault in the leader radar device … ([0075]: "…in response to a fault occurring in the first IC 210, for example a fault in a VCO block of the first IC while configured as master.").
Tong does not explicitly teach – but Lichter teaches: detecting the fault in the leader radar device by receiving a flag signal from the fault collection and control circuit (Lichter [col. 2, lines 37-40]: “If the primary oscillator fails or is out of tolerance, the redundant clock module will detect the failure or out of tolerance condition and switch to a secondary working oscillator to take over primary timing functions.”; [col. 3, lines 8-9]: “The detection circuitry generates an error signal that indicates that an oscillator has failed.”).
The rationale to modify Tong with the teaching of Lichter persists from Claim 1.
Regarding Claim 9, Tong teaches:
A radar system, comprising:
a leader radar device ([0054]: "first IC 210 in the form of a first transceiver"; [0063]: "the first transceiver 210 is configured as master IC"), including:
a first clock generation circuit configured to generate a first clock signal using a first crystal-controlled clock oscillator unit ([0067]: "...master IC, may also transmit other signals (not shown) to the slave IC, such as a common clock signal"; “crystal oscillator”),
…
a first local oscillator signal generator including a first phase locked loop circuit configured to generate a first local oscillator signal using the first clock signal ([0053]: “VCO/PLL (voltage controlled oscillator/phase locked loop) block”; [0063]: "the first transceiver 210 is configured as master IC, such that it generates a first common local oscillator (LO) signal"; [0065]: "PLL"), and
a first transmitter and receiver configured to transmit and receive first radar signals using the first local oscillator signal ([0054]: "multiple operational transmit (TX) ports and multiple receiver (RX) ports (not shown)");
a follower radar device, wherein the follower radar device is configured to receive the first clock signal and the first local oscillator signal from the leader radar device ([0054]: "a second IC 220 in the form of second transceiver"; [0063]: "the second transceiver 220 is configured as slave IC"; "the second transceiver uses the common LO signal received via the coupling device 230 from the first transceiver 210"; [0067]: "Each of the first and second transceivers 210, 220, when configured as master IC, may also transmit other signals (not shown) to the slave IC, such as a common clock signal"), the follower radar device including:
a second clock generation circuit configured to generate a second clock signal, wherein, in a default operational mode of the radar system at least a portion of the second clock generation circuit is disabled ([0065]: "The LO output port of the other transceiver (i.e. the slave) of the first and second transceivers 110, 120 is disabled"; [0067]: "Each of the first and second transceivers 210, 220, when configured as master IC, may also transmit other signals (not shown) to the slave IC, such as a common clock signal"), and in a first fault mode of operation … indicating that the first clock generation circuit is not operational ([0053]: “a functional failure in the VCO/PLL (voltage controlled oscillator/phase locked loop) block of the master IC 110”; [0075]: “in response to a fault occurring in the first IC 210”; Examiner note: VCOs and PLLs are used in both clock signal generation and LO signal generation), the follower radar device is configured to transmit the second clock signal to the first clock generation circuit of the leader radar device ([0067]: "Each of the first and second transceivers 210, 220, when configured as master IC, may also transmit other signals (not shown) to the slave IC, such as a common clock signal"; [0075]: "The second IC 220 may then take over the function of master IC"),
a second local oscillator signal generator including a second phase locked loop circuit configured to generate a second local oscillator signal using the first clock signal ([0064]: "In a second configuration of the radar system 200, the second transceiver 220 is configured as master IC such that it generates a second common local oscillator (LO) signal."; [0065]: "PLL"), wherein, in a default operational mode of the radar system at least a portion of the second local oscillator signal generator is disabled ([0063]: "In this first configuration of the radar system 200, the second transceiver 220 is configured as slave IC, such that the LO output port 222 of the second transceiver 220 is disabled"), and in a second fault mode of operation in which the first local oscillator signal generator is not operational, the second local oscillator signal generator is configured to transmit the second local oscillator signal to the first local oscillator signal generator of the leader radar device ([0073]: “any one of the plurality of transceivers may be configured as master, for outputting the common LO signal, with the other transceivers being configured as slaves and receiving the common LO signal”; [0075]: "with the second IC 220 providing the common LO signal") and
a second transmitter and receiver configured to transmit and receive second radar signals ([0054]: "each IC 210, 220 includes multiple operational transmit (TX) ports and multiple receiver (RX) ports (not shown)").
a dual-input radio frequency signal splitter ([0002]: “The LO signal is generated from the master IC and distributed to all the master and slave ICs through one or more T-junction power dividers.”; [0056]: “A local oscillator signal received at either one of the first and second inputs 232, 234 of the coupling device 230 is distributed to both of the first and second outputs 236, 238 of the coupling device 230.”), including:
a first input terminal connected to an output terminal of the first local oscillator signal generator by a first transmission line having a first electrical length ([0056]: “The first input 232 of the coupling device 230 is coupled via a transmission line 240 to the LO output port 212 of the first transceiver 210.”),
a second input terminal connected to an output terminal of the second local oscillator signal generator by a second transmission line having a second electrical length ([0056]: “The second input 234 of the coupling device 230 is coupled via transmission line 250 to the LO output port 222 of the second transceiver 220.”) … ,
a first output terminal electrically connected to an input terminal of the first local oscillator signal generator by a third transmission line having a third electrical length ([0056]: “The first output 236 of the coupling device 230 is coupled via transmission line 260 to the LO input port 214 of the first transceiver 210.”),
a second output terminal electrically connected to an input terminal of the second local oscillator signal generator by a fourth transmission line having a fourth electrical length … ([0056]: “The second output 238 of the coupling device 230 is coupled via transmission line 270 to the LO input port 224 of the second transceiver 220.”);
Tong does not explicitly teach:
a crystal oscillator operation detection circuit;
the first fault mode being a mode in which an error message is received from the crystal oscillator operation detection circuit indicating that the first clock generation circuit is not operational;
wherein the first electrical length is equal to the second electrical length, and wherein the third electrical length is equal to the fourth electrical length; or
the first and second single-input splitters as claimed.
However, Lichter is in the field of redundant clock circuitry (Lichter [Abstract]) and teaches:
a crystal oscillator operation detection circuit (Lichter [col. 2, lines 29-30]: “detection circuitry”); and
an error message is received from the crystal oscillator operation detection circuit indicating that the first clock generation circuit is not operational (Lichter [col. 2, lines 37-40]: “If the primary oscillator fails or is out of tolerance, the redundant clock module will detect the failure or out of tolerance condition and switch to a secondary working oscillator to take over primary timing functions.”; [col. 3, lines 8-9]: “The detection circuitry generates an error signal that indicates that an oscillator has failed.”).
The rationale to modify Tong with the teachings of Lichter persists from Claim 1.
Furthermore, Melzer is in the field of cascaded radar (Melzer [Abstract]) and teaches:
wherein the first electrical length is equal to the second electrical length, and wherein the third electrical length is equal to the fourth electrical length ([0052]: “The first and the second signal paths 141 and 142 are essentially the same length.”; “Again, the signal paths 151 and 152 are essentially of the same length.”); and
the first and second single-input splitters, each having a single input terminal electrically connected to an output terminal of a respective device (Melzer [0047]; [0051]; Fig. 1), as discussed in the rejection of Claim 1 above.
The rationale to modify Tong with the teachings of Melzer persists from Claim 1.
Regarding Claim 10, Tong as modified teaches: the system further comprising:
a central processor electrically connected to the leader radar device and the follower radar device ([0067]: "a controller for controlling the data acquisition process for the radar system 200 and receiving data from the master and slave ICs."), the central processor being configured to perform steps including:
detecting a fault in the leader radar device ([0075]: "...in response to a fault occurring in the first IC 210"),
causing the follower radar device to enable operation of the second clock generation circuit to generate the second clock signal ([0075]: "The second IC 220 may then take over the function of master IC for the system 200. This enables the system 200 to continue to function, with the second IC 220 providing the common LO signal for the system 200."), and
causing the follower radar device to transmit and receive second radar signals using the second local oscillator signal ([0075]: "This enables the system 200 to continue to function").
Regarding Claim 11, Tong as modified teaches: wherein, after detecting the fault in the leader radar device, the central processor is further configured to perform the step of disabling at least a portion of the first clock generation circuit in the leader radar device ([0075]: "the system 200 may be reconfigured from the first to the second configurations described above in response to a fault occurring in the first IC 210"; [0064]: "In this second configuration of the radar system 200, the first transceiver 210 is configured as slave IC, such that the LO output port 212 of the first transceiver 210 is disabled").
Regarding Claim 12, Tong as modified teaches: wherein the follower radar device is configured to transmit the second clock signal to the leader radar device ([0067]: "Each of the first and second transceivers 210, 220, when configured as master IC, may also transmit other signals (not shown) to the slave IC, such as a common clock signal").
Claim(s) 15-16 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tong (US 2019/0187273) in view of Melzer (US 2022/0308161).
Regarding Claim 15, Tong teaches:
A method, comprising:
detecting a fault in a clock signal generation component of a leader radar device of a cascaded-configuration automotive radar system ([0002]: "automotive radar systems"; "cascading multiple radar transceiver chips"; [0063]: "master IC"; [0075]: "...in response to a fault occurring in the first IC 210"), wherein the automotive radar system includes a follower radar device and the leader radar device is configured to generate a first clock signal and distribute the first clock signal to the follower radar device ( [0063]: "slave IC"; [0067]: "Each of the first and second transceivers 210, 220, when configured as master IC, may also transmit other signals (not shown) to the slave IC, such as a common clock signal");
causing the follower radar device to generate a second clock signal ([0067]: "Each of the first and second transceivers 210, 220, when configured as master IC, may also transmit other signals (not shown) to the slave IC, such as a common clock signal"; [0075]: "The second IC 220 may then take over the function of master IC");
causing the follower radar device to enable operation of a local oscillator signal generator configured to generate a local oscillator signal using the second clock signal ([0075]: "with the second IC 220 providing the common LO signal for the system 200"),
causing the follower radar device to transmit the second clock signal to … the leader radar device … ([0067]: "Each of the first and second transceivers 210, 220, when configured as master IC, may also transmit other signals (not shown) to the slave IC, such as a common clock signal"; [0075]: "The second IC 220 may then take over the function of master IC"), and wherein the leader radar device is configured to use the second clock signal to transmit and receive second radar signals ([0075]: “This enables the system 200 to continue to function”);
causing the follower radar device to transmit the local oscillator signal to a first input terminal of a dual-input radio frequency signal splitter, wherein the dual-input radio frequency signal splitter includes a first output terminal connected to the leader radar device and a second output terminal connected to the follower radar device ([0056]: “The first output 236 of the coupling device 230 is coupled via transmission line 260 to the LO input port 214 of the first transceiver 210. The second output 238 of the coupling device 230 is coupled via transmission line 270 to the LO input port 224 of the second transceiver 220.”; [0064]: “The common LO signal generated by the second transceiver 220 as master IC is output from the LO output port 222 of the second transceiver 220 and thereby coupled to the second input 234 of the coupling device 230.”), and wherein the leader radar device is configured to use the oscillator signal to transmit and receive the second radar signals ([0075]: “This enables the system 200 to continue to function”); and
causing the follower radar device to transmit and receive radar signals using the local oscillator signal ([0075]: "This enables the system 200 to continue to function").
Tong does not explicitly teach:
causing the follower radar device to transmit the second clock signal to an input terminal of a single-input signal splitter, wherein the single-input signal splitter includes a first output terminal connected to the leader radar device and a second output terminal connected to the follower radar device.
However, Melzer is in the field of cascaded radar (Melzer [Abstract]) and teaches:
the follower radar device to transmitting the second clock signal to an input terminal of a single-input signal splitter, wherein the single-input signal splitter includes a first output terminal connected to the leader radar device and a second output terminal connected to the follower radar device (Melzer [0041]: “the system clock signal 111 may not only be fed from the system clock output terminal 113 of the first MMIC 110 to the system clock input terminal 126 of the second MMIC 120, but also to a system clock input terminal 116 of the first MMIC 110”; [0047]: “A coupler or power splitter may be used in order to split the first LO signal for feeding back to the master and simultaneously to the slave.”; Fig. 1, items 117, 123, 127).
It would have been obvious to one of ordinary skill in the art to modify Tong and distribute clock signals from the follower radar device to the leader radar device using a single-input signal splitter, as taught by Melzer, with a reasonable expectation of success. Tong teaches that whichever radar device is configured as master transmits the common clock signal ([0067]), and applying Melzer’s known splitter-based signal distribution technique to Tong’s cascaded radar system yields the predictable result of allowing either radar device to provide a clock signal when a fault occurs in any of the devices.
Regarding Claim 16, Tong as modified teaches: the method further comprising, after detecting the fault in the clock signal generation component of the leader radar device, preventing the leader radar device from generating the first clock signal ([0075]: "the system 200 may be reconfigured from the first to the second configurations described above in response to a fault occurring in the first IC 210"; [0064]: "In this second configuration of the radar system 200, the first transceiver 210 is configured as slave IC, such that the LO output port 212 of the first transceiver 210 is disabled").
Regarding Claim 20, Tong as modified teaches: the method further comprising, after detecting the fault in the leader radar device, disabling at least a portion of the clock signal generation component of the leader radar device by way of a central processor ([0075]: "the system 200 may be reconfigured from the first to the second configurations described above in response to a fault occurring in the first IC 210"; [0064]: "In this second configuration of the radar system 200, the first transceiver 210 is configured as slave IC, such that the LO output port 212 of the first transceiver 210 is disabled").
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tong (US 2019/0187273) and Melzer (US 2022/0308161), as applied to Claim 15 above, and further in view of Reuter (US 2019/0204846).
Regarding Claim 18, Tong as modified teaches: wherein the leader radar device includes a fault condition and control circuit that is connected to a first local oscillator signal generator and further comprising detecting the fault in the leader radar device … ([0075]: "…in response to a fault occurring in the first IC 210, for example a fault in a VCO block of the first IC while configured as master.").
Tong does not explicitly teach: detecting the fault in the leader radar device by receiving a flag signal from the fault condition and control circuit
However, Reuter is in the field of cascaded radar (Reuter [Abstract]) and teaches: detecting the fault in the leader radar device by receiving a flag signal from the fault condition and control circuit (Reuter [0054]: “The MCU 350 may be configured to detect a fault in any one of the transceivers 310, 320, 330, 340 by receiving an error signal forwarded from the respective transceiver on detection of an internal fault. For example, each transceiver 310, 320, 330, 340 may be configured to perform a self-test (e.g. to check if the PLL is locked and/or if a transmitted frequency is correct) and to forward an error signal or interrupt signal to the MCU 350 if the self-test results in a fail.”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Tong and detect the fault in the leader radar device by receiving a flag signal from the fault condition and control circuit, as taught by Reuter, with a reasonable expectation of success. Applying Reuter’s known error signal technique to Tong’s cascaded radar system yields the predictable result of allowing the system to identify which radar device has failed so that the follower radar device con be reconfigured as master, thereby improving the fault-tolerance of the system.
Response to Arguments
Applicant’s amendments and arguments, filed 05/27/2026, regarding Claim Rejections under 35 USC 112(b) have been fully considered and are persuasive. The previous 112(b) rejections have been overcome.
Applicant’s arguments, filed 05/27/2026, regarding Claim Rejections under 35 USC 103 have been fully considered but are moot because they do not apply to the specific combination of references being used in the current rejection.
Conclusion
The cited references made of record in the contemporaneously filed PTO-892 form and not relied upon in the instant office action are considered pertinent to Applicant’s disclosure, and may have one or more of the elements in Applicant’s disclosure and at least Claim 1.
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/NOAH YI MIN ZHU/Examiner, Art Unit 3648
/BRADY W FRAZIER/Primary Examiner, Art Unit 3648
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