Prosecution Insights
Last updated: April 19, 2026
Application No. 18/461,829

COMBINERS FOR DOHERTY POWER AMPLIFIER SYSTEMS

Non-Final OA §102§103
Filed
Sep 06, 2023
Examiner
CHOE, HENRY
Art Unit
2843
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Skyworks Solutions Inc.
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
2y 1m
To Grant
65%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allow Rate
1238 granted / 1339 resolved
+24.5% vs TC avg
Minimal -27% lift
Without
With
+-27.4%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
29 currently pending
Career history
1368
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
37.4%
-2.6% vs TC avg
§102
47.1%
+7.1% vs TC avg
§112
3.8%
-36.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1339 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1, 13 and 15 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by [Imai (Fig. 5); 11,824,501]. Regarding claims 1 and 13, Imai discloses an amplifier circuit comprising a plurality of amplifiers (amplifiers in 120 and 130) including a main amplifier (top amplifier in 120) configured to amplify a first radio frequency input signal (input signal of top amplifier in 120) to generate a first RF output signal (output signal of top amplifier in 120), a first auxiliary amplifier (top amplifier in 130) configured to amplify a second RF input signal (input signal of top amplifier in 130) to generate a second RF output signal (output signal of top amplifier in 130), a second auxiliary amplifier (lower amplifier in 130) configured to amplify a third RF input signal (input signal of lower amplifier in 130) to generate a third RF output signal (output signal of lower amplifier in 130), a first balun combiner (151) configured to combine the second RF output signal (output signal of top amplifier in 130) and the third RF output signal (output signal of lower amplifier in 130) to generate a first RF combined signal (the signal present at the secondary winding of 151), and a second balun combiner (141) configured to combine the first RF output signal (output signal of top amplifier in 120) and the first RF combined signal (the signal present at the secondary winding of 151) to generate a second RF combined signal (the signal present at the top terminal of the load 1000) and the second balun combiner (141) having an impedance ratio different than an impedance ratio of the first balun combiner (151). Regarding claim 15, Imai discloses an amplifier circuit comprising a frond end system (120, 130) including a main amplifier (top amplifier in 120) configured to amplify a first radio frequency input signal (input signal of top amplifier in 120) to generate a first RF output signal (output signal of top amplifier in 120), a first auxiliary amplifier (top amplifier in 130) configured to amplify a second RF input signal (input signal of top amplifier in 130) to generate a second RF output signal (output signal of top amplifier in 130), a second auxiliary amplifier (lower amplifier in 130) configured to amplify a third RF input signal (input signal of lower amplifier in 130) to generate a third RF output signal (output signal of lower amplifier in 130), a first balun combiner (151) configured to combine the second RF output signal (output signal of top amplifier in 130) and the third RF output signal (output signal of lower amplifier in 130) to generate a first RF combined signal (the signal present at the secondary winding of 151), a second balun combiner (141) configured to combine the first RF output signal (output signal of top amplifier in 120) and the first RF combined signal (the signal present at the secondary winding of 151) to generate a second RF combined signal (the signal present at the top terminal of the load 1000) and the second balun combiner (141) having an impedance ratio different than an impedance ratio of the first balun combiner (151), and an antenna (1000) configured to transmit the second RF combined signal (the signal present at the top terminal of the load 1000). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2, 6, 14, 16, 18 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over [Imai (Fig. 5); 11,824,501] in view of [Walker (Fig. 3); 6,445,247]. Regarding claims 2, 14 and 16, Imai discloses all the limitations in the claims except for that the bias circuit configured to selectively turn on or off the first auxiliary amplifier and the second auxiliary amplifier based on an envelope signal. Walker discloses an amplifier circuit comprising a bias circuit (310) configured to selectively turn on or off the first auxiliary amplifier (303B) and the second auxiliary amplifier (303C) based on an envelope signal (output signal of 302). It would have been obvious to one of ordinary skill in the art at the time the invention was made would have found it obvious to have employed the bias circuit at the first and second auxiliary amplifiers of Imai (Fig. 5), such as taught by Walker (Fig. 3) in order to provide the advantageous benefit of improving the efficiency of the amplifier circuit. Regarding claims 6 and 18, Imai discloses all the limitations in claim 6 except for that the input splitting circuit configured to split a RF input signal into the first RF input signal, the second RF input signal, and the third RF input signal. Walker discloses an amplifier circuit comprising an input splitting circuit [the node between the input terminal (the terminal receiving the input signal INPUT) and the element 306B] configured to split a RF input signal (INPUT) into the first RF input signal (input signal of 303A), the second RF input signal (input signal of 303B), and the third RF input signal (input signal of 303C). It would have been obvious to one of ordinary skill in the art at the time the invention was made would have found it obvious to have employed the input splitting circuit at the input terminal of Imai (Fig. 5), such as taught by Walker (Fig. 3) in order to provide the advantageous benefit of stabilizing the variation of the gain of the amplifier. Regarding claim 19, Walker further comprising a transceiver (the element producing the input signal INPUT) configured to generate the RF input signal (INPUT). Claims 3-5 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over [Imai (Fig. 5); 11,824,501]. Imai discloses all the limitations in the claims except for that the impedance ratio of the second balun combiner is greater than the impedance ratio of the first balun combiner, wherein the impedance ratio of the first balun combiner is about three to one, and the impedance ratio of the second balun combiner is about two to one. It would have been obvious to one of ordinary skill in the art at the time the invention was made to have implemented the certain impedance ratios for the first and second balun combiners in order to improve the impedance matching of the amplifier circuit which produces the noisy free amplifier circuit as is typically known to one of ordinary skill in the art. Allowable Subject Matter Claims 7-12 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Henry Choe whose telephone number is (703)774-4614. The examiner can normally be reached Mon-Fri 6:00 AM- 6:00 PM EST. Examiner interviews are available via telephone, in person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interview practice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea J Lindgren Baltzell can be reached on (571)272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. /HENRY CHOE/ Primary Examiner, Art Unit 2843 #2936
Read full office action

Prosecution Timeline

Sep 06, 2023
Application Filed
Jan 05, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
65%
With Interview (-27.4%)
2y 1m
Median Time to Grant
Low
PTA Risk
Based on 1339 resolved cases by this examiner. Grant probability derived from career allow rate.

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