Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office Action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 6-8, and 17-18 are rejected under 35 U.S.C. 102(a)(1) as obvious over U.S. Patent Application Publication No. 2022/0229960 (“Nath”) in view of Non-Patent Literature “Clock Tree Optimization Methodologies for Power and Latency Reduction” (“Singer”) and further in view of Non-Patent Literature “Optimality and Non-Scalar-Valued Performance Criteria” (“Zadeh”).
Regarding claim 1, NATH teaches A processor-implemented simulation (FIG. 9’s computer system, featuring a processor (element 902), which “may perform the reinforcement learning-based technique” as taught, per [0033], and which is understood to determine a best adjustment to a digital circuit (e.g., [0003]: in terms of “improved power, performance, and area (PPA)”), not just in the immediate sense of a single next adjustment that is the best but more generally with respect to all the many adjustments to be made, which the Examiner likens to a simulation as recited (as discussed per [0033]-[0035])) method comprising:
obtaining an initial state variable and an initial reward variable detected from a semiconductor device and training an agent to output a first action variable of a reinforcement learning model based on the initial state variable and the initial reward variable and generating, by at least one processor, a first state variable of the reinforcement learning model and generating a first reward variable, based on the first action variable (the reinforcement learning agent as taught is understood to generally determine a reward for a particular action performed while in a particular state ([0036]-[0041]), and where the Examiner understands the RL agent to be subject to training, as briefly discussed per [0035]-[0036] and more fully discussed per [0073]-[0076], for which the training necessarily begins by considering a particular gate (e.g., per [0074], where the gate is a particular state in/for a particular digital circuit being evaluated/improved by the RL agent, and hence satisfies the limitation for being “detected”), a first adjustment that is determined and corresponding to an adjustment for that gate ([0075]), and then a reward for performing that first adjustment ([0076]), and per [0041] the Examiner notes “At each time step t, there is a corresponding state (st), action (at), and reward (rt) pair denoted as (st, at, rt)”, in which case at t0 or essentially any starting time, there would be understood to be an initial state and an initial reward which corresponds to the digital circuit being evaluated/improved); and
correcting at least one timing issue in the semiconductor device as a function of the first reward variable (as part of the iterative RL agent process referenced just above, the Examiner understands that adjustments may include “clock-tree adjustment” (e.g., [0003]) or “clock-tree skewing” (e.g., [0006], [0012], [0033]), which the Examiner reasons is a timing-based adjustment deemed to be optimal based on the RL agent’s processing and would be understood as an optimization and hence a “correcting” as recited).
As discussed above, Nath clearly contemplates a reward in consideration of its reinforcement learning, and more specifically one that generally/broadly seeks to optimize “PPA” or the like, per [0003], [0035], and [0040] as examples, where the optimization broadly is for “power, performance, and area” of the digital circuit, and includes elements such as skew, as the Examiner has discussed above. Hence, Nath’s RL-based framework may be read to optimize for multiple objectives such as these, but it is not entirely clear whether Nath’s reward clearly encompasses the sort of nesting/compartmentalization of Applicants’ further limitation wherein the first reward variable includes a skew reward variable for rewarding a skew occurring in the semiconductor device and a duty reward variable for rewarding a duty error rate of an output signal output from the semiconductor device. Regarding this, the Examiner understands the reward value/variable to be one that encompasses both skew and duty, as recited, and while Nath’s generally contemplates optimizations that read on both, it does not discuss on a granular level computations or variables that themselves do just that. On this basis, the Examiner declines to contend that Nath alone teaches the aforementioned limitation, and rather relies upon SINGER and ZADEH to provide what Nath otherwise may lack:
SINGER teaches a comparable digital circuit optimization framework, and, on its page 7 via Table 1, teaches different parameters that go towards optimization, many of which constitute clock-related parameter types (i.e., relating/contributing to skew broadly) and some of which could be understood to be power-related (i.e., relating/contributing to duty broadly). Whereas Nath teaches clock and power more generally, albeit with some additional specificity as to skew/clock, the Examiner reasons that Singer’s teaching is more granular in presenting various parameters for each of those types, and hence could be understood, when combined with Nath, to suggest that Nath’s optimization for “power, performance, and area” of the digital circuit could be implemented by considering these these different specific parameters, per Singer’s Table for example.
Nath and Singer both relate to digital circuit optimization, and hence are similarly directed and therefore analogous. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, in implementing the sort of optimization contemplated by Nath, to then consider using specific parameters of the same type/kind, and hence of relevance, as presented by Singer, with a reasonable expectation of success. Said another way, the combination is obvious because Singer provides specific examples in terms of its parameters that match the broader objectives as contemplated by Nath.
ZADEH teaches an expression for optimality, akin to what Nath’s reinforcement learning approach seeks, but in a manner that is explicitly more multi-objective in its computation/calculation. See, e.g., page 59’s 3rd column, discussing a constraint set that is considered together when subjected to a weighted linear combination.
Like Nath and Singer, Zadeh contemplates a parameter-driven optimization problem. Hence, they are similarly directed and therefore analogous. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement Zadeh’s notion of weighted linear combination as applied to Nath and Singer’s parameter considerations, with a reasonable expectation of success, such that Nath’s aim to optimize across “power, performance, and area” of the digital circuit, which imply/involve diverse parameterization to suit the different optimization objectives, could then be defined and used together in the spirit of Nath’s reinforcement learning process.
Regarding claim 2, Nath in view of Singer and further in view of Zadeh teach the simulation method of claim 1, as discussed above. The aforementioned references teach the additional limitations wherein the generating of the first reward variable comprises:
generating the skew reward variable and generating the duty reward variable (as discussed per claim 1, Nath’s reinforcement learning agent as taught is understood to generally determine a reward for a particular action performed while in a particular state ([0036]-[0041], [0076]), e.g., per [0041] the Examiner notes “At each time step t, there is a corresponding state (st), action (at), and reward (rt) pair denoted as (st, at, rt)”, and further per both Nash and Singer, parameterization to optimize the framework, in accordance with a RL/reward feature per Nash, is inclusive of clock and duty/power considerations (e.g., per claim 1, Nath’s “clock-tree adjustment” (e.g., [0003]) or “clock-tree skewing” (e.g., [0006], [0012], [0033])) and Singer’s Table 1 which includes both clock/skew-related parameters and some which pertain to power/CPU parameterization)), and
wherein the skew reward variable includes a first skew variable and a second skew variable and the duty reward variable includes a first duty variable and a second duty variable (as discussed above per claim 1, Zadeh teaches an optimization approach that is explicitly more multi-objective in its computation/calculation than what Nath and Singer contemplate. See, e.g., Zadeh’s page 59, 3rd column, discussing a constraint set that is considered together when subjected to a weighted linear combination of the constraints, and the Examiner reasons that such a weighted combination approach could be applied to either/both skew/clock and duty/power considerations to be optimized – as Nath and Singer broadly do – but in a more composited and fine-grained manner as Zadeh’s weighted combination computation provides, thereby giving the capability to holistically reward across multiple objectives broadly (e.g., Nath’s “PPA” [improved power, performance, and area] optimization objective, Singer’s Table 1) but also to reward in view of different expressions of each, e.g. different clock/skew and/or duty/power parameters as Nath and Singer contemplate).
The motivation for combining the references is as discussed above in relation to claim 1.
Regarding claim 3, Nath in view of Singer and further in view of Zadeh teach the simulation method of claim 2, as discussed above. The aforementioned references teach the additional limitations
wherein the generating of the skew reward variable includes summing the first skew variable and the second skew variable (Zadeh’s weighted combination computation is a summing of parameters, and when applied to Nath and Singer, the Examiner reasons it could be used to sum together different types of clock/skew and/or duty/power parameters as Nath and Singer contemplate). The motivation for combining the references is as discussed above in relation to claim 1.
Regarding claim 4, Nath in view of Singer and further in view of Zadeh teach the simulation method of claim 2, as discussed above. The aforementioned references teach the additional limitations wherein the generating of the duty reward variable includes calculating the duty reward variable based on the first duty variable and the second duty variable (as discussed per claim 1, Nath’s reinforcement learning agent as taught is understood to generally determine a reward generally for a particular action in view of its effect on the system ([0036]-[0041], [0076]), and further per both Nash and Singer, parameterization to optimize the framework, in accordance with a RL/reward feature per Nash, is inclusive of clock and duty/power considerations (e.g., Singer’s Table 1 which includes both clock/skew-related parameters and some which pertain to power/CPU parameterization), and the Examiner reasons that different particular power/CPU parameters can be combined and considered together using a weighted combination computation, for example as Zadeh contemplates). The motivation for combining the references is as discussed above in relation to claim 1.
Regarding claim 5, Nath in view of Singer and further in view of Zadeh teach the simulation method of claim 4, as discussed above. The aforementioned references teach the additional limitations wherein the generating of the duty reward variable includes: calculating an error rate of each of the first duty variable and the second duty variable and summing an error rate of the first duty variable and an error rate of the second duty variable (Nath’s reinforcement learning approach described as involving a loss function per [0064], which the Examiner reasons that this would pertain to the optimization of any relevant parameters – for example, duty/power parameters as Nath and especially Singer contemplate (as discussed above per claim 1), and where the references can be understood to teach multiple parameter types/instances relating to duty/power, then the error can be realized and evaluated with respect to each one as part of the modified framework’s greater optimization process as it iterates). The motivation for combining the references is as discussed above in relation to claim 1.
Regarding claim 6, Nath in view of Singer and further in view of Zadeh teach the simulation method of claim 1, as discussed above. The aforementioned references teach the additional limitations wherein the generating of the first reward variable includes calculating the first reward variable based on a minimum value of the skew reward variable and a minimum value of the duty reward variable (Nath’s [0034]-[0035] described as involving the seeking of minima, and it reasons that this would pertain to any parameters being optimized – for example, such as skew/clock and duty/power parameters as Nath and Singer contemplate (as discussed above per claim 1)). The motivation for combining the references is as discussed above in relation to claim 1.
Regarding claim 7, Nath in view of Singer and further in view of Zadeh teach the simulation method of claim 1, as discussed above. The aforementioned references teach the additional limitations wherein the training of the agent includes generating the first action variable by the agent based on the initial state variable and the initial reward variable (Nath’s [0041]: “At each time step t, there is a corresponding state (st), action (at), and reward (rt) pair denoted as (st, at, rt)”, in which case at t0 or essentially any starting time, there would be understood to be an initial state and an initial reward which corresponds to the digital circuit being evaluated/improved). The motivation for combining the references is as discussed above in relation to claim 1.
Regarding claim 8, the claim includes the same or similar limitations as discussed above in relation to claim 1, and is therefore rejected under the same rationale. Additionally, it mentions a memory which the Examiner reasons is taught per Nath’s FIG. 9 elements 926 and 904.
Regarding claim 13, the claim includes the same or similar limitations as discussed above in relation to claim 2, and is therefore rejected under the same rationale.
Regarding claim 14, the claim includes the same or similar limitations as discussed above in relation to claim 3, and is therefore rejected under the same rationale.
Regarding claim 15, the claim includes the same or similar limitations as discussed above in relation to claim 4, and is therefore rejected under the same rationale.
Regarding claim 17, the claim includes the same or similar limitations as discussed above in relation to claim 6, and is therefore rejected under the same rationale.
Regarding claim 18, the claim includes the same or similar limitations as discussed above in relation to claim 7, and is therefore rejected under the same rationale.
Regarding claim 19, the claim includes the same or similar limitations as discussed above in relation to claims 1 and 2, and is therefore rejected under the same rationale.
Regarding claim 20, the claim includes the same or similar limitations as discussed above in relation to claims 3 and 4, and is therefore rejected under the same rationale.
Allowable Subject Matter
Claims 9-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to Applicants’ disclosure.
US 20130099822 A1 Cao
US 20190199602 A1 Zhang
US 20050021483 A1 Kaplan
US 20200184137 A1 Tsutsui
CN 110362411 B
KR 20220077678 A
Non-Patent Literature “Multi-objective Reinforcement Learning” (Srinivasa)
Non-Patent Literature “Common mode control loop for current mode logic-based circuits in FD-SOI technology” (Saif)
Non-Patent Literature “Ultimate Guide: Clock Tree Synthesis” (AnySilicon)
Non-Patent Literature “RobustAnalog: Fast Variation-Aware Analog Circuit Design via Multi-task RL” (Shi)
Non-Patent Literature “What is Clock Skew? Understanding Clock Skew in a Clock Distribution Network” (Hertz)
Non-Patent Literature “ECEN689: Special Topics in High-Speed Links Circuits and Systems- Lecture 6: RX Circuits” (“Palermo”)
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/SHOURJO DASGUPTA/Primary Examiner, Art Unit 2144
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