DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-18, 21, and 22 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zeng et al. (US 2014/0269263 A1), hereinafter referred to as D1.
Regarding claims 1, 6, and 11, D1 discloses systems and methods for performing layer one link aggregation over wireless links, which comprises:
receiving, by a first device, a first packet, wherein the first packet comprises a first bearing area and a second bearing area, and the first bearing area bears a first destination media access control layer protocol address (DA} and a first source media access control layer protocol address (SA) (Referring to Figures 1-4, receiving an ethernet frame from a router/switch, each frame comprising a SOF, preamble, destination address field and source address field (first bearing area), and payload (second bearing area). See paragraphs 0040-0043.);
performing, by the first device, slicing processing on the second bearing area to obtain N slices, wherein N is a positive integer greater than or equal to 1 (Referring to Figures 1-4, The transmitting data access card in step 350 suppresses the interframe gap (IFG), the preamble and the start of frame (SOF), thereby generating a raw Ethernet frame 304 from Ethernet frame 316, a raw Ethernet frame 306 from Ethernet frame 318, and a raw Ethernet frame 308 from Ethernet frame 320. The transmitting data access card in step 352 uses layer one link aggregation (L1LA) to segment each raw Ethernet frames 304, 306 and 308 (or alternatively a group of buffered one or more raw Ethernet frames 304, 306, 308) (slicing processing on the second bearing area to obtain N slices, wherein N is a positive integer greater than 1). See paragraphs 0040-0043.);
encapsulating, by the first device, each of the N slices to obtain N Ethernet frames, wherein the N Ethernet frames are in a one-to-one correspondence with the N slices, and the first DA and the first SA are used for encapsulating at least one of the N slices (Referring to Figures 1-4, The transmitting data access card adds local encapsulation overhead to each of the segments (slices) for supporting transportation of the encapsulated raw Ethernet frame segments (as "encapsulated virtual containers") (wherein the N Ethernet frames are in a one-to-one correspondences with the N slices, 3 segments and 3 Ethernet frames for transmission over the wireless links 310, 312, and 314) across the available wireless links 310, 312 and 314. In the example shown, available wireless link 310 supports 366 Mbps with 256 QAM, available wireless link 312 supports 268 Mbps and 64 QAM, and available wireless link 314 supports 182 Mbps and 16 QAM. In this example, available wireless link 310 has the greatest capacity, available wireless link 312 has intermediate capacity, and available wireless link 314 has the lowest capacity. The transmitting data access card segments and encapsulates the raw Ethernet frames 304, 306 and 308 according to the wireless link capacities for transport across the wireless links 310, 312 and 314. See paragraphs 0042-0044.); and
sending, by the first device, the N Ethernet frames (Referring to Figures 1-4, As stated above, the transmitting data access card segments the raw Ethernet frames 304, 306 and 308 based on the wireless link capacities, encapsulates the raw Ethernet frame segments 304, 306 and 308, and distributes the encapsulated raw Ethernet frames 310, 312 and 314 for transport across the wireless links 310, 312 and 314. See paragraphs 0041-0044.)
Regarding claims 2, 7, and 12, D1 discloses stripping, by the first device, the first bearing area from the first packet to obtain the second bearing area (Referring to Figures 1-4, The transmitting data access card in step 350 suppresses the interframe gap (IFG), the preamble and the start of frame (SOF) (stripping by the first device first bearing area), thereby generating a raw Ethernet frame 304 from Ethernet frame 316, a raw Ethernet frame 306 from Ethernet frame 318, and a raw Ethernet frame 308 from Ethernet frame 320. The transmitting data access card in step 352 uses layer one link aggregation (L1LA) to segment each raw Ethernet frames 304, 306 and 308 (or alternatively a group of buffered one or more raw Ethernet frames 304, 306, 308) (slicing processing on the second bearing area to obtain N slices, wherein N is a positive integer greater than 1). See paragraphs 0040-0043.);
Regarding claims 3, 8, and 13, D1 discloses wherein N>1 and the first DA and the first SA are used for encapsulating each of the N slices (Referring to Figures 1-4, The transmitting data access card in step 350 suppresses the interframe gap (IFG), the preamble and the start of frame (SOF), thereby generating a raw Ethernet frame 304 from Ethernet frame 316, a raw Ethernet frame 306 from Ethernet frame 318, and a raw Ethernet frame 308 from Ethernet frame 320. The transmitting data access card in step 352 uses layer one link aggregation (L1LA) to segment each raw Ethernet frames 304, 306 and 308 (or alternatively a group of buffered one or more raw Ethernet frames 304, 306, 308) (slicing processing on the second bearing area to obtain N slices, wherein N is a positive integer greater than 1). Each segment comprising a SA and DA See paragraphs 0040-0043.)
Regarding claims 4, 9, and 14, D1 discloses wherein N>1 the first DA and the first SA are used for encapsulating one of the N slices, and N-1 of the N slices are encapsulated by using a second DA and a second SA (Referring to Figures 1-4, The transmitting data access card in step 350 suppresses the interframe gap (IFG), the preamble and the start of frame (SOF), thereby generating a raw Ethernet frame 304 from Ethernet frame 316, a raw Ethernet frame 306 from Ethernet frame 318, and a raw Ethernet frame 308 from Ethernet frame 320. The transmitting data access card in step 352 uses layer one link aggregation (L1LA) to segment each raw Ethernet frames 304, 306 and 308 (or alternatively a group of buffered one or more raw Ethernet frames 304, 306, 308) (slicing processing on the second bearing area to obtain N slices, wherein N is a positive integer greater than 1). Each segment comprising a SA and DA, respective to each segment (thereby comprising N slices and N-1 of the N slices are encapsulated by using a second DA and SA) See paragraphs 0040-0043.)
Regarding claims 5, 10, 15, and 21, D1 discloses wherein N>1, and multiple slices among the N slices have a same preset slice length (Referring to Figures 1-4, segments (slices) is a minimum length, respectively, thereby comprising a preset slice length. See paragraphs 0087-0089.)
Regarding claim 16, D1 discloses wherein the second DA and the second SA are preset values (Referring to Figures 1-4, The transmitting data access card in step 350 suppresses the interframe gap (IFG), the preamble and the start of frame (SOF), thereby generating a raw Ethernet frame 304 from Ethernet frame 316, a raw Ethernet frame 306 from Ethernet frame 318, and a raw Ethernet frame 308 from Ethernet frame 320. The transmitting data access card in step 352 uses layer one link aggregation (L1LA) to segment each raw Ethernet frames 304, 306 and 308 (or alternatively a group of buffered one or more raw Ethernet frames 304, 306, 308) (slicing processing on the second bearing area to obtain N slices, wherein N is a positive integer greater than 1). Each segment comprising a SA and DA, comprising preset values as the values are preset at specific locations, respective to each segment (thereby comprising N slices and N-1 of the N slices are encapsulated by using a second DA and SA) See paragraphs 0040-0043.)
Regarding claim 17, D1 discloses wherein the second DA is a broadcast address, and the second SA is a unicast address (Referring to Figures 3-5, Periodically, the L1LA master (source address, unicast) can broadcast a "group discovery frame" (broadcast address) into C2 to external ports P2, P3 and P4. The L1LA slaves in the group detect any group ID mismatch or Ethernet cables misconnections from the received group discovery frame. Similarly, each L1LA slave device also sends periodically a unicast "group discovery frame" to the L1LA master, authenticating its group ID. The L1LA master detects misconnected L1LA slaves of other groups, and/or detects the connection of third party devices (by timeouts). See paragraphs 0059-0061.)
Regarding claim 18, D1 discloses wherein the second DA being the broadcast address and the second SA being the unicast address are preset values (Referring to Figures 3-5, Periodically, the L1LA master (source address, unicast) can broadcast a "group discovery frame" (broadcast address) (preset in the sense the location of the addresses within the frame are preset) into C2 to external ports P2, P3 and P4. The L1LA slaves in the group detect any group ID mismatch or Ethernet cables misconnections from the received group discovery frame. Similarly, each L1LA slave device also sends periodically a unicast "group discovery frame" to the L1LA master, authenticating its group ID. The L1LA master detects misconnected L1LA slaves of other groups, and/or detects the connection of third party devices (by timeouts). See paragraphs 0059-0061.)
Regarding claim 22, D1 discloses wherein N>2, the second DA and the second SA are preset values different form the first DA and the first SA, respectively; and multiple slices among the N slices have a same preset slice length (Referring to Figures 1-4, segments (slices) is a minimum length, respectively, thereby comprising a preset slice length. See paragraphs 0087-0089. The transmitting data access card in step 350 suppresses the interframe gap (IFG), the preamble and the start of frame (SOF), thereby generating a raw Ethernet frame 304 from Ethernet frame 316, a raw Ethernet frame 306 from Ethernet frame 318, and a raw Ethernet frame 308 from Ethernet frame 320. The transmitting data access card in step 352 uses layer one link aggregation (L1LA) to segment each raw Ethernet frames 304, 306 and 308 (or alternatively a group of buffered one or more raw Ethernet frames 304, 306, 308) (slicing processing on the second bearing area to obtain N slices, wherein N is a positive integer greater than 1). Each segment comprising a SA and DA, comprising preset values as the values are preset at specific locations, respective to each segment (thereby comprising N slices and N>2 of the N slices are encapsulated by using a second DA and SA) See paragraphs 0040-0043.)
Response to Arguments
Applicant's arguments filed 16 January 2026 have been fully considered but they are not persuasive.
On page 7 of the remarks, regarding claim 1, the Applicant argues D1 does not disclose at least one of the N slices is encapsulated by using the first DA and the first SA of the first packet. The Examiner respectfully disagrees. In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., encapsulated by using . . .) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). The claim recites “encapsulating, by the first device, each of the N slices to obtain N Ethernet frames, wherein the N Ethernet frames are in a one-to-one correspondence with the N slices, and the first DA and the first SA are used for encapsulating at least one of the N slices”. D1 teaches, referring to Figures 1-4, the transmitting data access card adds local encapsulation overhead to each of the segments (slices) for supporting transportation of the encapsulated raw Ethernet frame segments (as "encapsulated virtual containers") (wherein the N Ethernet frames are in a one-to-one correspondences with the N slices, 3 segments and 3 Ethernet frames for transmission over the wireless links 310, 312, and 314) across the available wireless links 310, 312 and 314. In the example shown, available wireless link 310 supports 366 Mbps with 256 QAM, available wireless link 312 supports 268 Mbps and 64 QAM, and available wireless link 314 supports 182 Mbps and 16 QAM. In this example, available wireless link 310 has the greatest capacity, available wireless link 312 has intermediate capacity, and available wireless link 314 has the lowest capacity. The transmitting data access card segments and encapsulates the raw Ethernet frames 304, 306 and 308 according to the wireless link capacities for transport across the wireless links 310, 312 and 314. See paragraphs 0042-0044. Furthermore, the limitation “used for . . .” is intended-use limitation of a recitation of some future use and not a positive recitation. The intended-use limitation is merely a statement of some future intended purpose and is not given patentable weight. The rejection address each limitation as recited and taught in light of the broad literal reasonable claim interpretation as described above as the prior art teaches all of the claim limitations. The prior teaches using source and destination addresses during the recited encapsulation process. On page 9 of the remarks, the Applicant argues D1 does not disclose stripping, by the first device, the first bearing area from the first packet to obtain the second bearing area. The Examiner respectfully disagrees. Regarding claims 2, 7, and 12, D1 discloses stripping, by the first device, the first bearing area from the first packet to obtain the second bearing area. D1 teaches, referring to Figures 1-4, The transmitting data access card in step 350 suppresses the interframe gap (IFG), the preamble and the start of frame (SOF) (stripping by the first device first bearing area), thereby generating a raw Ethernet frame 304 from Ethernet frame 316 (stripped of first bearing bearing area; thereby, resulting in the second bearing area), a raw Ethernet frame 306 from Ethernet frame 318, and a raw Ethernet frame 308 from Ethernet frame 320. The transmitting data access card in step 352 uses layer one link aggregation (L1LA) to segment each raw Ethernet frames 304, 306 and 308 (or alternatively a group of buffered one or more raw Ethernet frames 304, 306, 308) (slicing processing on the second bearing area to obtain N slices, wherein N is a positive integer greater than 1). See paragraphs 0040-0043. The Applicant argues claim 2 recites stripping the first DA and the first SA from the first packet to obtain the second bearing area. In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., stripping the first DA and the first SA from the first packet . . .) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). On pages 10 and 11 of the remarks, regarding claims 3, 8, and 13 and 4, 19, and 14, respectively, the Applicant argues D1 does not disclose the first DA and the first SA are used for encapsulating each of the N slices. The Examiner respectfully disagrees for the same rationale explained in regards to the arguments regarding claim 1 as discussed above, as well as noting the intended-use language. On page 12 of the remarks, the Applicant argues D1 does not disclose a same preset slice length. The Examiner respectfully disagrees. Regarding claims 5, 10, 15, and 21, D1 discloses wherein N>1, and multiple slices among the N slices have a same preset slice length (Referring to Figures 1-4, segments (slices) is a minimum length, respectively, thereby comprising a preset slice length. See paragraphs 0087-0089.) On page 12 of the remarks, regarding claim 17, the Applicant argues D1 does not disclose as being used for encapsulating . . . . The Examiner The Examiner respectfully disagrees for the same rationale explained in regards to the arguments regarding claim 1 as discussed above, as well as noting the intended-use language. The Examiner suggests amending the claims to more explicitly recite the instant invention as disclosed by the specification to overcome the prior art of record.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Sun et al. (US 2019/0124704 A1) - The control device determines parameter information of the network slice based on the identifier and determines a forwarding path based on the parameter information. Then, the control device adds a forwarding resource included in the forwarding path to a forwarding resource of the network slice. When the terminal device sends the service packet, the service packet is forwarded using the forwarding resource of the network slice.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DONALD L MILLS whose telephone number is (571)272-3094. The examiner can normally be reached Monday through Friday from 9-5 PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yemane Mesfin can be reached at 571-272-3927. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
DONALD L. MILLS
Primary Examiner
Art Unit 2462
/Donald L Mills/ Primary Examiner, Art Unit 2462
Prosecution Insights