DETAILED ACTION
Response to Amendment
The amendment filed on 1 June 2026 has been entered.
Claims 1-30 are pending.
Claims 1, 7, 9, 15, 17, 23, 25 are amended.
Applicant’s amendments to the Claims have overcome each and every objection previously set
forth in the Non-Final Office Action mailed 27 March 2026.
Response to Arguments
Applicant’s remarks, regarding the rejections of claims under 35 USC 103, have been fully considered.
Applicant submits as amended, Claim 1 recites, in part, "sampling, in a single forward pass, according to a priority sampling policy, a set of node priorities from a computation graph, each node priority of the set of node priorities associated with a respective node on the computation graph, each node representing an operation of a task performed by a trained artificial neural network."
Applicant submits Claim 1 is allowable over the cited references, either alone or in combination.
Applicant’s arguments have been considered, but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier.
Such claim limitation(s) is/are:
“An apparatus comprising: means for sampling” in claim 9.
“An apparatus comprising: means for converting” in claim 9.
“An apparatus comprising: means for performing” in claim 9.
Claims 10-16, which are directly or indirectly dependent on claim 9, are similarly interpreted.
Examiner notes, for the record, the generic placeholder listed above is described in the Specification as “intended to cover such an apparatus or method practiced using other structure, functionality, or structure and functionality in addition to or other than the various aspects of the disclosure set forth” as described in Specification [0018].
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-2, 6-10, 14-18, 22-26, 30 are rejected under 35 U.S.C. 103 as being unpatentable over Amarnath et al. (U.S. Pre-Grant Publication No. 20230012710, hereinafter ‘Amarnath'), in view of Dong et al. (NPL: "Searching for A Robust Neural Architecture in Four GPU Hours", hereinafter 'Dong').
Regarding claim 1 and analogous claims 9, 17, 25, Amarnath teaches A processor-implemented method comprising ([0082] Turning now to FIG. 6, a method 600 for providing a machine learning agent for dynamic task scheduling in heterogenous systems in a computing environment using a processor is depicted, in which various aspects of the illustrated embodiments may be implemented. The functionality 800 may be implemented as a method (e.g., a computer-implemented method) executed as instructions on a machine, where the instructions are included on at least one computer readable medium or one non-transitory machine-readable storage medium. Repetitive description of like elements employed in other embodiments described herein is omitted for sake of brevity.):
each node priority of the set of node priorities associated with a respective node on the computation graph ([0102] In operation (as observed in Table 820 and 830), a on the computation graph DAG processor (e.g., the DAG processor 540 of FIG. 5 ) may assign each node priority of the set of node priorities associated with a respective node rank to tasks when they are ready to be scheduled. In this example, it may be assumed that the ranks for tasks are assigned as follows by the DAG processor: task 0 a rank of 10, task 1 a rank of 10, task 2 a rank of 2, task 3 a rank of 0, task 4 a rank of 5, task 5 a rank of 3. The ordered ready queue depicts the DAG and the task. For example, at time stamp 0, the ordered ready queue depicts the DAG 0 and the task 0 (e.g., “0.0” where the first number is the DAG, and the second number presents the task).; [0104] If the rank is same, priority 2 tasks may be ordered before priority 1 tasks.),
each node representing an operation of a task performed by a trained artificial neural network ([0022] The DAGs may be comprised of a collection of one or more nodes connected by one or more edges, each node representing an operation of a task each of the nodes represents one or more tasks ordered into a sequence, and each of the edges connected to a node represents one or more constraints on the task represented by the node. In an additional embodiment, a machine learning component may be initialized (e.g., initialized active, and/or installed) to dynamically schedule the tasks of the DAGs.; [0060] Workloads layer 90 provides examples of functionality for which the cloud computing environment may be utilized. Examples of workloads and functions which may be provided from this layer include: mapping and navigation 91; software development and lifecycle management 92; virtual classroom education delivery 93; data analytics processing 94; transaction processing 95; and, in the context of the illustrated embodiments of the present invention, various workloads and functions 96 for dynamic task scheduling in heterogenous systems using a machine learning agent in a computing environment (e.g., in a neural network architecture).; [0023] In general, as used herein, “optimize” may refer to and/or defined as “maximize,” “minimize,” “best,” or attain one or more specific targets, objectives, goals, or intentions. Optimize may also refer to maximizing a benefit to a user (e.g., maximize performed by a trained artificial neural network a trained machine learning scheduling agent benefit).);
converting, via a list scheduling function, the set of node priorities to a schedule that associates each node of the computation graph with a processor of a group of processors of a device associated with the trained artificial neural network, the schedule associated with a makespan; and performing the task in accordance with the schedule ([0079] The system 500 may include a scheduler 530 at the operating software (“OS”) level. The scheduler 530 may be a dynamic scheduler with a DAG processor 540 and a task scheduler 570. The dynamic scheduler 530 may be in communication with a heterogeneous SoC 570 having one or more processor elements such as, for example, processor element 572 (“PE 1” such as, for example, a CPU core), processor element 574 (“PE 2” such as, for example, a GPU core), and processor element 576 (“PE N” such as, for example, an accelerator).; [0081] The DAG processor 540 may order or re-order tasks based on a dynamic rank assigned to each of the tasks 550 and 552. The rank can be determined using deadlines/slack and priority of the DAG such as, for example, each of the DAGs 510. The converting, via a list scheduling function, the set of node priorities to a schedule task scheduler 560 may read the ordered that associates each node of the computation graph with a processor of a group of processors of a device associated with the trained artificial neural network tasks and determines an appropriate or “best” or optimal PE to schedule and assign the task such as, for example, processor element 572, processor element 574, or processor element 576.; [0104] If the rank is same, priority 2 tasks may be ordered before priority 1 tasks. The schedule associated with a makespan schedule and performing the task in accordance with the schedule execution of the tasks can be seen in the table 830 task in the readyQ is represented as (DAG_ID.Task_ID). For example, at time stamp 11, the DAG 0 has task 1 scheduled with an accelerator. Task 5 is scheduled with the GPU. Task 2 is now in a waiting period for an available PE. However, accessing and utilizing the RL agent such as, for example, the RL agent 562 of FIG. 6 , the RL agent 562 may use machine learning and execute a correct decision for scheduling the task 2 rather than waiting such as, for example, at time stamp “11” the RL agent 562 may schedule for execution DAG 0's task 2 on a free PE (e.g., GPU) since there are four GPU's and there are available GPU's at time stamp 11. Thus, rather than waiting, as depicted in table 830 of the DAG 0's task 2 waiting until time stamp 94 for being assigned to an accelerator, by assigning the DAG 0's task 2 to a free PE (e.g., GPU), the response time of DAG 0, can be reduced to 94 cycles instead of 104 cycles and can meet the deadline.).
Amarnath fails to teach sampling, in a single forward pass, according to a priority sampling policy, a set of node priorities from a computation graph,
Dong teaches sampling, in a single forward pass, according to a priority sampling policy, a set of node priorities from a computation graph ([Figure 1., pg. 1761] We utilize a DAG to represent the search space of a neural cell. Different operations (colored arrows) transform one node (square) to its intermediate features (little circles). Meanwhile, each node is the sum of the intermediate features transformed from the previous nodes. As indicated by the solid connections, the neural cell in the proposed GDAS is a sampled sub-graph of this DAG. Specifically, among the intermediate features between every two nodes, GDAS samples one feature in a differentiable way.; [1. Introduction, pg. 1762] To solve these two problems, the proposed sampling, in a single forward pass GDAS samples a sub-graph at one training iteration. As a result, we only need to optimize a part of the DAG at one iteration, which accelerates the training procedure. Moreover, the inappropriate competition is avoided, which makes the optimization effective.; [3.2. Searching by Differentiable Model Sampling, pg. 1763] Formally, we denote a neural architecture as α and the weights of this neural architecture as ωα. The according to a priority sampling policy goal of NAS is to find a set of node priorities from a computation graph an architecture α, which can achieve the minimum validation loss after being trained by minimizeing the training loss, as shown in Eq. (2).),
Amarnath and Dong are considered to be analogous to the claimed invention because they are in the same field of machine learning. In view of the teachings of Amarnath, it would have been obvious for a person of ordinary skill in the art to apply the teachings of Dong to Amarnath before the effective filing date of the claimed invention in order to search neural architecture by gradient descent (cf. Dong, [Abstract, pg. 1761] Conventional neural architecture search (NAS) approaches are based on reinforcement learning or evolutionary strategy, which take more than 3000 GPU hours to find a good model on CIFAR-10. We propose an efficient NAS approach learning to search by gradient descent. Our approach represents the search space as a directed acyclic graph (DAG). This DAG contains billions of sub-graphs, each of which indicates a kind of neural architecture. To avoid traversing all the possibilities of the sub-graphs, we develop a differentiable sampler over the DAG. This sampler is learnable and optimized by the validation loss after training the sampled architecture. In this way, our approach can be trained in an end-to-end fashion by gradient descent, named Gradient-based search using Differentiable Architecture Sampler (GDAS). In experiments, we can finish one searching procedure in four GPU hours on CIFAR-10, and the discovered model obtains a test error of 2.82% with only 2.5M parameters, which is on par with the state-of-the-art.).
Regarding claim 2 and analogous claims 10, 18, 26, Amarnath, as modified by Dong, teaches The processor-implemented method of claim 1, The apparatus of claim 9, The apparatus of claim 17, The non-transitory computer-readable medium of claim 25, respectively.
Amarnath teaches further comprising generating a policy parameter associated with the priority sampling policy via reinforcement learning ([0093] via reinforcement learning Using a reinforcement learning (“RL”) agent 562 in a task scheduler 560 of FIG. 1 , the RL agent 562 may receive tasks schedule on a PE (e.g., a busy or unavailable PE), as in block 702. The RL agent may use a further comprising generating a policy parameter associated with the priority sampling policy decision tree based RL quality (“Q”) learning operation to execute each decision in the task scheduler 560.).
Amarnath and Dong are combinable for the same rationale as set forth above with respect to claim 1.
Regarding claim 6 and analogous claims 14, 22, 30, Amarnath, as modified by Dong, teaches The processor-implemented method of claim 1, The apparatus of claim 9, The apparatus of claim 17, The non-transitory computer-readable medium of claim 25, respectively.
Amarnath teaches wherein the makespan is a maximum across an end time of each operation on the processor associated with each node ([0103] Thus, as task 0 (a parent task) arrives makespan is a maximum across an end time of each operation on the processor associated with each node at time stamp 0, task 0 will complete at time stamp 10. Since tasks 1 (e.g., convolution task), task 5 (decoder task), and task 2 (convolution task) are task dependencies of task 0, tasks 1, 5, and 2 arrive at time stamp 10. As depicted, task 2 is a convolution task and is scheduled for execution while it waits for an accelerator since task 1 was already scheduled on the only accelerator. This is depicted in the ordered ready queue depicts the DAG 0 and the task 2 (e.g., “0.2”) at time stamp 11 as task 2 being schedule and waiting for a busy PE.).
Amarnath and Dong are combinable for the same rationale as set forth above with respect to claim 1.
Regarding claim 7 and analogous claims 15, 23, Amarnath, as modified by Dong, teaches The processor-implemented method of claim 1, The apparatus of claim 9, The apparatus of claim 17, respectively.
Amarnath teaches wherein the task is an inference task performed by the trained artificial neural network ([0103] Thus, as task 0 (a parent task) arrives at time stamp 0, task 0 will complete at time stamp 10. Since task is an inference task performed by the trained artificial neural network tasks 1 (e.g., convolution task), task 5 (decoder task), and task 2 (convolution task) are task dependencies of task 0, tasks 1, 5, and 2 arrive at time stamp 10. As depicted, task 2 is a convolution task and is scheduled for execution while it waits for an accelerator since task 1 was already scheduled on the only accelerator. This is depicted in the ordered ready queue depicts the DAG 0 and the task 2 (e.g., “0.2”) at time stamp 11 as task 2 being schedule and waiting for a busy PE.).
Amarnath and Dong are combinable for the same rationale as set forth above with respect to claim 1.
Regarding claim 8 and analogous claims 16, 24, Amarnath, as modified by Dong, teaches The processor-implemented method of claim 1, The apparatus of claim 9, The apparatus of claim 17, respectively.
Amarnath teaches wherein the task is a hierarchical task ([0103] Thus, as task 0 (a parent task) arrives at time stamp 0, task 0 will complete at time stamp 10. Since tasks 1 (e.g., convolution task), task 5 (decoder task), and task 2 (convolution task) are task wherein the task is a hierarchical task dependencies of task 0, tasks 1, 5, and 2 arrive at time stamp 10. As depicted, task 2 is a convolution task and is scheduled for execution while it waits for an accelerator since task 1 was already scheduled on the only accelerator. This is depicted in the ordered ready queue depicts the DAG 0 and the task 2 (e.g., “0.2”) at time stamp 11 as task 2 being schedule and waiting for a busy PE.).
Amarnath and Dong are combinable for the same rationale as set forth above with respect to claim 1.
Claims 3-5, 11-13, 19-21, 27-29 are rejected under 35 U.S.C. 103 as being unpatentable over Amarnath, in view of Dong, and further in view of Tan et al. (NPL: "Mutually-aware Sub-Graphs Differentiable Architecture Search", hereinafter 'Tan').
Regarding claim 3 and analogous claims 11, 19, 27, Amarnath, as modified by Dong, teaches The processor-implemented method of claim 1, The apparatus of claim 9, The apparatus of claim 17, The non-transitory computer-readable medium of claim 25, respectively.
Amarnath, as modified by Dong, fails to teach wherein the priority sampling policy samples the set of node priorities according to a Gumbel Top-K function.
Tan teaches wherein the priority sampling policy samples the set of node priorities according to a Gumbel Top-K function ([Preliminary., pg. 3] Our method is built on the framework of DARTS [27]. We first revisit DARTS, which was designed for searching a robust cell structure, and then the full networks are constructed by stacking a series of the searched cells. A neural cell often consists of N computational nodes represented by a directed acyclic graph (DAG), where each node xi is a latent representation (i.e., a stack of feature maps), and each edge (i,j) from node xi to xj in the DAG indicates a bunch of feature transformation functions weighted by architecture parameters. Within a cell, each intermediate node is computed as a sum of all its predecessors. The searching procedure in DARTS is formulated as a bi level optimization problem. The model weights and architecture parameters are then updated in an alternative fashion by using a training set and a validation set, respectively. When the architecture parameters are learned, a full super net can be pruned to derive a discrete architecture by maintaining the top-2 strongest predecessors for each intermediate node in the cell and keeping the top scoring operations.; [Extension to Gumbel-SoftMax., pg. 4] Our goal is to find a differentiable approach to wherein the priority sampling policy samples the set of node priorities sample multiple single-path sub graphs. Moreover, these sub-graphs should be mutually exclusive, which requires that the same operation on each edge of super-net cannot be selected multiple times by a sampler. This casts the problem of producing multiple exclusive sub graphs into the problem of sampling multiple items without replacement. The feasible domain for the next call of Gumbel-Soft Max sampler should be updated by the previous selection. To be more specific, the previously selected elements ought to be removed from the available candidates: (2) The main challenge is to carry out the pruning on the feasible space in a differentiable way. To this end, we propose to utilize a recent progress in top K relaxation [36]. Let r =(α+g)/τ and ˆ hk is the corresponding one-hot vector of hk, we compute hk+1 by setting the largest entry of hk to be negative infinity: rk+1 = rk +log 1− ˆ hk (3) The updated r is then used in the computation for next se lection. Details of the according to a Gumbel Top-K function proposed sampler are summarized in Algorithm 1.).
Amarnath, Dong, and Tan are considered to be analogous to the claimed invention because they are in the same field of machine learning. In view of the teachings of Amarnath and Dong, it would have been obvious for a person of ordinary skill in the art to apply the teachings of Tan to Amarnath before the effective filing date of the claimed invention in order to strike a balance between flexible memory usage and searching quality, alleviate the severer skip-connect issue brought by multiple sub-graphs setting, and introduce a memory efficient super-net guidance distillation to improve training (cf. Tan, [Abstract, pg. 1] Differentiable architecture search is prevalent in the field of NAS because of its simplicity and efficiency, where two paradigms, multi-path algorithms and single-path methods, are dominated. Multi-path framework (e.g. DARTS) is intuitive but suffers from memory usage and training collapse. Single-path methods (e.g. GDAS and Proxyless NAS) mitigate the memory issue and shrink the gap between searching and evaluation but sacrifice the performance. In this paper, we propose a conceptually simple yet efficient method to bridge these two paradigms, referred as Mutually-aware Sub-Graphs Differentiable Architecture Search (MSG-DAS). The core of our framework is a differentiable Gumbel-Top K sampler that produces multiple mutually exclusive single-path sub-graphs. To alleviate the severer skip-connect issue brought by multiple sub-graphs setting, we propose a Dropblock-Identity module to stabilize the optimization. To make best use of the available models (super-net and sub-graphs), we introduce a memory efficient super-net guidance distillation to improve training. The proposed framework strikes a balance between flexible memory usage and searching quality. We demonstrate the effectiveness of our methods on ImageNet and CIFAR10, where the searched models show a comparable performance as the most recent approaches.).
Regarding claim 4 and analogous claims 12, 20, 28, Amarnath, as modified by Dong and Tan, teaches The processor-implemented method of claim 3, The apparatus of claim 11, The apparatus of claim 19, The non-transitory computer-readable medium of claim 27, respectively.
Tan teaches further comprising: generating, for each node of the computation graph, a logit indicating a probability distribution for a priority of the node; and adding Gumbel noise to a logit representation of each node ([Gumbel-Softmax., pg. 3-4] Gumbel-MaxTrick [50] adding Gumbel noise to a logit representation of each node perturbs the architecture parameters α with Gumbel noise g, and then selects the operation having the highest score. GDAS [12] and SNAS [47] apply the Gumbel-Max Trick to each edge in a DAG, which allows them to sample a single-path sub graph from a super-net. To embed the sampling procedure in the neural networks, it is usually relaxed to Gumbel SoftMax [31], which can be formulated as, generating, for each node of the computation graph, a logit indicating a probability distribution for a priority of the node ¯ OGDAS(xi) = o∈O exp((αo +go)/τ) o∈Oexp((αo +go)/τ) ·o(xi). (1) where g ∼ Gumbel(0,1), and τ is the temperature of SoftMax. The output of SoftMax approximates one-hot encoding when τ → 0. If τ → ∞, all elements in the logits vector are the same, and the approximated distribution is smooth.).
Amarnath, Dong, and Tan are combinable for the same rationale as set forth above with respect to claim 3.
Regarding claim 5 and analogous claims 13, 21, 29, Amarnath, as modified by Dong and Tan, teaches The processor-implemented method of claim 4, The apparatus of claim 12, The apparatus of claim 20, The non-transitory computer-readable medium of claim 28, respectively.
Tan teaches wherein the set of node priorities are sampled from the logit representation of each node with added Gumbel noise ([Gumbel-Softmax., pg. 3-4] Gumbel-MaxTrick [50] perturbs the architecture parameters α with Gumbel noise g, and then selects the operation having the highest score. GDAS [12] and SNAS [47] apply the Gumbel-Max Trick to each edge in a DAG, which allows them to sample a single-path sub graph from a super-net.; [Preliminary., pg. 3] Our method is built on the framework of DARTS [27]. We first revisit DARTS, which was designed for searching a robust cell structure, and then the full networks are constructed by stacking a series of the searched cells. A neural cell often consists of N computational nodes represented by a directed acyclic graph (DAG), where each node xi is a latent representation (i.e., a stack of feature maps), and each edge (i,j) from node xi to xj in the DAG indicates a bunch of feature transformation functions weighted by architecture parameters. Within a cell, each intermediate node is computed as a sum of all its predecessors. The searching procedure in DARTS is formulated as a bi level optimization problem. The model weights and architecture parameters are then updated in an alternative fashion by using a training set and a validation set, respectively. When the architecture parameters are learned, a full super net can be pruned to derive a discrete architecture by maintaining the top-2 strongest predecessors for each intermediate node in the cell and keeping the top scoring operations.; [Extension to Gumbel-SoftMax., pg. 4] Our goal is to find a differentiable approach to wherein the set of node priorities are sampled sample multiple single-path sub graphs. Moreover, these sub-graphs should be mutually exclusive, which requires that the same operation on each edge of super-net cannot be selected multiple times by a sampler. This casts the problem of producing multiple exclusive sub graphs into the problem of sampling multiple items without replacement. The feasible domain for the next call of Gumbel-Soft Max sampler should be updated by the previous selection. To be more specific, the previously selected elements ought to be removed from the available candidates: (2) The main challenge is to carry out the pruning on the feasible space in a differentiable way. To this end, we propose to utilize a recent progress in from the logit representation of each node with added Gumbel noise top K relaxation [36]. Let r =(α+g)/τ and ˆ hk is the corresponding one-hot vector of hk, we compute hk+1 by setting the largest entry of hk to be negative infinity: rk+1 = rk +log 1− ˆ hk (3) The updated r is then used in the computation for next selection. Details of the proposed sampler are summarized in Algorithm 1.).
Amarnath, Dong, and Tan are combinable for the same rationale as set forth above with respect to claim 3.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
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/MM/Examiner, Art Unit 2129
/MICHAEL J HUNTLEY/Supervisory Patent Examiner, Art Unit 2129
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