DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 10 and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Youm et al. US 2017/0238865 in the IDS.
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Regarding claims 1, 10 and 15: Youm discloses an electrode 120 (figure 1) disposed on an external surface of the device (this is considered to be inherent if the electrode is internal the design will not function); sensing circuitry 150 (figure 1) configured to sense a physiological signal via one or more electrodes, the one or more electrodes including the external electrode (paragraph 0033 bio-signal measuring mode); a switching circuitry 130/140 (figure 1) coupled between the external electrode 120 and a node N1 (figure 1) at a voltage (all nodes will be “at a voltage” this is inherent); the switching circuity configured to; in a first mode of operation provide a low-impedance path between the external electrode and the node; and in a second mode of operation provide a high-impedance path between the external electrode and the node (paragraph 0027; when the circuit is set to stimulate both switches are set to be “on” which is considered to be a low impedance path (the circuit is complete) whereas when the circuit is set to sense the bio-signal the switches are set to be “off” creating an open circuit and a high impedance path). Regarding claims 10 and 15: Youm discloses that the control circuit includes memory which stores commands and programs to operate the stimulator, this also includes algorithms (paragraph 0044). This inherently includes the method of claim 10 as well as the non-transitory computer readable medium to carry out the method.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-16 and 18-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-7 and 9-16 of U.S. Patent No. 11,751,790. Although the claims at issue are not identical, they are not patentably distinct from each other. It is noted that the breadth of claim 1 in US Patent No. 11,751,790 would necessarily include both implantable and external devices and that electrodes on an external device would inherently be configured to contact skin.
18/465,111
11,751,790 (serial No. 16/551,704)
1. A wearable device comprising: an external electrode disposed on an external surface of the wearable device configured to contact skin on a wrist; sensing circuitry configured to sense a physiological signal via one or more electrodes including the external electrode; and a switching circuit coupled between the external electrode and a node at a voltage, the switching circuit configured to: in a first mode of operation associated with sensing the physiological signal, provide a low-impedance path between the external electrode and the node; and in a second mode of operation different from the first mode of operation, provide a high-impedance path between the external electrode and the node.
2. The wearable device of claim 1, wherein the external electrode is a ground electrode and the node is a system ground node.
3. The wearable device of claim 1, wherein the external electrode is a reference electrode and the voltage is different from a system ground voltage.
4. The wearable device of claim 1, wherein the external electrode is a measurement electrode and the voltage is different from a system ground voltage.
1. A device comprising: an external electrode disposed on an external surface of the device; sensing circuitry configured to sense a physiological signal via one or more electrodes including the external electrode during a first mode of operation; a switching circuit coupled between the external electrode and a node at a voltage, the switching circuit configured to: in the first mode of operation, provide a low-impedance path between the external electrode and the node; and in a second mode of operation different from the first mode of operation, provide a high-impedance path between the external electrode and the node; wherein: the external electrode is a ground electrode and the node is a system ground node; the external electrode is a reference electrode and the voltage is different from a system ground voltage, or the external electrode is a measurement electrode and the voltage is different from the system ground voltage.
5. The wearable device of claim 1, wherein the switching circuit comprises a bipolar analog switch.
2. The device of claim 1, wherein the switching circuit comprises a bipolar analog switch.
6. The wearable device of claim 1, wherein the switching circuit comprises at least a first transistor and a second transistor coupled in series.
3. The device of claim 1, wherein the switching circuit comprises at least a first transistor and a second transistor coupled in series.
7. The wearable device of claim 6, wherein the first transistor is an n-mos transistor and the second transistor is an n-mos transistor.
4. The device of claim 3, wherein the first transistor is an n-mos transistor and the second transistor is an n-mos transistor.
8. The wearable device of claim 6, wherein the first transistor is a p-mos transistor and the second transistor is an n-mos transistor.
5. The device of claim 3, wherein the first transistor is a p-mos transistor and the second transistor is an n-mos transistor.
9. The wearable device of claim 8, further comprising: one or more power rails coupled to the switching circuit, wherein the one or more power rails are powered on while sensing the physiological signal and are powered off while not sensing the physiological signal.
6. The device of claim 5, further comprising: one or more power rails coupled to the switching circuit, wherein the one or more power rails are powered on while sensing a physiological signal.
7. The device of claim 6, wherein the one or more power rails are powered off while not sensing the physiological signal.
10. A method comprising: at a wearable device including an external electrode disposed on an external surface of the wearable device configured to contact skin on a wrist and a switching circuit coupled between the external electrode and a node of the wearable device at a voltage: in a first mode of operation associated with sensing a physiological signal via the external electrode, providing a low-impedance path between the external electrode and the node; and in a second mode of operation, providing a high-impedance path between the external electrode and the node.
12. The method of claim 11, wherein providing the high-impedance path between the external electrode and the node comprises: grounding the gate of the first transistor to turn off the channel through the first transistor; and grounding the gate of the second transistor to turn off the channel through the second transistor.
9. A method comprising: at a device including an external electrode disposed on an external surface of the device and a switching circuit coupled between the external electrode and a node of the device at a voltage: in a first mode of operation associated with sensing a physiological signal via the external electrode, providing a low-impedance path between the external electrode and the node; and in a second mode of operation, providing a high-impedance path between the external electrode and the node by: grounding a gate of a first transistor to turn off a channel through the first transistor; and grounding a gate of a second transistor to turn off a channel through the second transistor.
11. The method of claim 10, wherein providing the low-impedance path between the external electrode and the node comprises: applying a first gate voltage to a gate of a first transistor to turn on a channel through the first transistor; and applying a second gate voltage to a gate of a second transistor to turn on a channel through the second transistor.
10. The method of claim 9, wherein providing the low-impedance path between the external electrode and the node comprises: applying a first gate voltage to the gate of the first transistor to turn on the channel through the first transistor; and applying a second gate voltage to the gate of the second transistor to turn on the channel through the second transistor.
13. The method of claim 10, wherein the external electrode is a ground electrode and the node is a system ground node.
11. The method of claim 9, wherein the external electrode is a ground electrode and the node is a system ground node.
14. The method of claim 10, wherein: the switching circuit comprises a first transistor and a second transistor coupled in series, the first transistor comprises a first n-mos transistor and the second transistor comprises a second n-mos transistor, and a drain of the first n-mos transistor is coupled to the external electrode, a source of the first n-mos transistor is coupled to a source of the second n-mos transistor, and a drain of the second n-mos transistor is coupled to a system ground.
12. The method of claim 9, wherein the switching circuit comprises the first transistor and the second transistor coupled in series, wherein the first transistor comprises a first n-mos transistor and the second transistor comprises a second n-mos transistor, wherein a drain of the first n-mos transistor is coupled to the external electrode, a source of the first n-mos transistor is coupled to a source of the second n-mos transistor, and a drain of the second n-mos transistor is coupled to a system ground.
15. A non-transitory computer readable storage medium storing instructions, which when executed by one or more processing circuits of a wearable device including an external electrode disposed on an external surface of the wearable device configured to contact skin on a wrist and a switching circuit coupled between the external electrode and a node of the wearable device at a voltage, cause the one or more processing circuits to: in a first mode of operation associated with sensing a physiological signal via the external electrode, operate the switching circuit as a closed circuit between the external electrode and the node; and in a second mode of operation different from the first mode of operation, operating the switching circuit as an open circuit between the external electrode and the node.
16. The non-transitory computer readable storage medium of claim 15, wherein operating the switching circuit as a closed circuit between the external electrode and the node comprises: applying a first gate voltage to a gate of a first transistor to turn on a channel through the first transistor; and applying a second gate voltage to a gate of a second transistor to turn on a channel through the second transistor.
13. A non-transitory computer readable storage medium storing instructions, which when executed by one or more processing circuits of a device including an external electrode disposed on an external surface of the device and a switching circuit coupled between the external electrode and a node of the device at a voltage, cause the one or more processing circuits to perform a method, the method comprising: in a first mode of operation associated with sensing a physiological signal via the external electrode, providing a low-impedance path between the external electrode and the node by: applying a first gate voltage to a gate of a first transistor to turn on a channel through the first transistor; and applying a second gate voltage to a gate of a second transistor to turn on a channel through the second transistor; and in a second mode of operation different from the first mode of operation, providing a high-impedance path between the external electrode and the node.
18. The non-transitory computer readable storage medium of claim 16, wherein operating the switching circuit as an open circuit between the external electrode and the node comprises: grounding the gate of the first transistor to turn off the channel through the first transistor; and grounding the gate of the second transistor to turn off the channel through the second transistor.
14. The non-transitory computer readable storage medium of claim 13, wherein providing the high-impedance path between the external electrode and the node comprises: grounding the gate of the first transistor to turn off the channel through the first transistor; and grounding the gate of the second transistor to turn off the channel through the second transistor.
19. The non-transitory computer readable storage medium of claim 15, wherein the external electrode is a ground electrode and the node is a system ground node.
15. The non-transitory computer readable storage medium of claim 13, wherein the external electrode is a ground electrode and the node is a system ground node.
20. The non-transitory computer readable storage medium of claim 15, wherein: the switching circuit comprises a first transistor and a second transistor coupled in series; the first transistor comprises a first n-mos transistor and the second transistor comprises a second n-mos transistor; and a drain of the first n-mos transistor is coupled to the external electrode, a source of the first n-mos transistor is coupled to a source of the second n-mos transistor, and a drain of the second n-mos transistor is coupled to a system ground.
16. The non-transitory computer readable storage medium of claim 13, wherein the switching circuit comprises the first transistor and the second transistor coupled in series, wherein the first transistor comprises a first n-mos transistor and the second transistor comprises a second n-mos transistor, wherein a drain of the first n-mos transistor is coupled to the external electrode, a source of the first n-mos transistor is coupled to a source of the second n-mos transistor, and a drain of the second n-mos transistor is coupled to a system ground.
Allowable Subject Matter
Claims 2-9, 11-14 and 16-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
As many claims are indicated as including allowable subject matter, a detailed reasons for allowance will be provided upon allowance.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAULA J. STICE whose telephone number is (303)297-4352. The examiner can normally be reached Monday - Friday 7:30am -4pm MST.
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PAULA J. STICE
Primary Examiner
Art Unit 3796
/PAULA J STICE/Primary Examiner, Art Unit 3796