Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Terminal Disclaimer
The terminal disclaimer filed on 11/13/2025 disclaiming the terminal portion of any patent granted on this application which would extend beyond the expiration date of Application No. 18/465,877 has been reviewed and is NOT accepted. See the Terminal Disclaimer review decision mailed out on 11/13/2025.
Election/Restrictions
Claims 6, 13-17, 21, 27, 34-38 and 42 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 07/21/2025.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claim 1 provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of copending Application No.18/465,877. Although the claims at issue are not identical, they are not patentably distinct from each other because claim of the instant application is directed to essentially similar limitation as in claim 1 of copending Application No. 18/465,877. Claim 1 of the instant application is broader than claim 1 of copending Application No.18/465,877 by omitting other features recited in claim 1 of copending Application No.18/465,877 such as “a second op amp; a two-terminal synthesis resistor connected across a non-inverting input of the first op amp and an output of the first op amp”.
Claim 22 provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 23 of copending Application No.18/465,877. Although the claims at issue are not identical, they are not patentably distinct from each other because claim of the instant application is directed to essentially similar limitation as in claim 23 of copending Application No. 18/465,877. Claim 22 of the instant application is broader than claim 23 of copending Application No.18/465,877 by omitting other features recited in claim 23 of copending Application No.18/465,877 such as “a second op amp; a two-terminal synthesis resistor to be connected across a non-inverting input of a first operational amplifier (op amp) and an output of the first op amp”.
Instant application 18/465847
Co-pending application 18/465877
1. A two-terminal synthesis resistor, comprising: an operational amplifier (op amp); a current mirror having a first transistor, a second transistor, and a common node connected to the first transistor, the second transistor, and an output of the op amp; a resistor having a first side configured to be a first terminal of the two-terminal synthesis resistor, and a second side connected to an inverting input of the op amp, and the first transistor; and a second terminal of the two-terminal synthesis resistor connected to the second transistor, and a non-inverting input of the op amp.
1. An amplifier circuit, comprising: a first operational amplifier (op amp); a two-terminal synthesis resistor connected across a non-inverting input of the first op amp and an output of the first op amp, the two-terminal synthesis resistor comprising: a second op amp; a current mirror having a first transistor, a second transistor, and a common node connected to the first transistor, the second transistor, and an output of the second op amp; a resistor having a first side configured to be a first terminal of the two-terminal synthesis resistor, and a second side connected to an inverting input of the second op amp, and the first transistor; and a second terminal of the two-terminal synthesis resistor connected to the second transistor, and a non-inverting input of the second op amp.
22. (Original) A method for forming a two-terminal synthesis resistor, comprising: configuring a current mirror to have a first side a first transistor and a second side with a second transistor, the first side of the current mirror and the second side of the current mirror connected to a common node that is also connected to an output of an operational amplifier (op amp);configuring a resistor to have a first side configured to be a first terminal of the two- terminal synthesis resistor, and a second side connected to an inverting input of the op amp, the first transistor; and configuring a second terminal of the two-terminal synthesis resistor to be connected to the second transistor, and a non-inverting input of the op amp.
23. A method for forming an amplifier circuit, comprising: configuring a two-terminal synthesis resistor to be connected across a non-inverting input of a first operational amplifier (op amp) and an output of the first op amp; configuring the two-terminal synthesis resistor to include a resistor, a second op amp, and a current mirror having a first side with a first transistor and a second side with a second transistor, the first side of the current mirror and the second side of the current mirror connected to a common node that is also connected to an output of the second op amp; configuring the resistor to have a first side configured to be a first terminal of the two-terminal synthesis resistor, and a second side connected to an inverting input of the op amp, the first transistor; and configuring a second terminal of the two-terminal synthesis resistor to be connected to the second transistor and a non-inverting input of the first op amp.
Claims 2-4, 7-12, 18-20 and 23-25, 28-33, 39-41 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 2-4, 7-12, 18-20 and 24-26, 29-34, 40-42 of copending Application No. 18/465,877.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Response to Arguments
Applicant’s arguments, see pg. 12-13, filed 11/06/2025, with respect to claims 1 and 22 under 35 U.S.C. § 102(a)(1) have been fully considered and are persuasive. Therefore, the rejection has been withdrawn.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/METASEBIA T RETEBO/Primary Examiner, Art Unit 2842