DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of invention-I (claims 1-11) directed to device claims in the reply filed on 11/04/2025 is acknowledged. The non-elected invention-II and invention-III are canceled. Applicant newly submitted claims 21-29 which are directed to circuitry and method claims.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 6-8, 11, 21-23, 25 and 27-28 rejected under 35 U.S.C. 103 as being unpatentable over Elshafie et al. (US 2024/0048188, “Elshafie”) in view of Barak et al. (US 2014/0030994, “Barak”) and Ek (US 2025/0343552).
Examiner’s note: in what follows, references are drawn to Elshafie unless otherwise mentioned.
Elshafie comprises the following features:
With respect to independent claims:
Regarding claim 1, a first electronic device (See Fig. 2 for RIS 290.) configured to redirect wireless signals ([0049 and Fig. 2] “the RIS 290 may assist the communications, by receiving and re-radiate radio signals, between the BS 110 and UE 120”) between a second electronic device (See Fig. 2 for 110 or 120.) and a third electronic device (See Fig. 2 for 110 or 120.), the first electronic device comprising:
a first set of antenna elements (See Fig. 9 for Sub-RIS (1), Sub-RIS (2) or Sub-RIS (3).);
first phase shifters ([0035 and Fig. 2] “The re-radiation by the RIS is controlled by a RIS controller that may apply different weights to the RIS elements, causing different phase shifts”, and [0033, Fig. 1 and Fig. 2] “The codebook 132 includes values of weights to modify the radio signal re-radiated by each RIS element, such as weight shifting or changing amplitudes.”. Note that phase shifters are discussed in view of Barak.) coupled to the first set of antenna elements (See Fig. 6A for the RIS Controller and elements in RIS depicted in Fig. 6A.);
a first processor (This will be discussed in view of Ek.) configured to generate a first value ([0033] “The codebook 132 includes values of weights to modify the radio signal re-radiated by each RIS element, such as weight shifting or changing amplitudes.”, and [0050] “The RIS controller 292 may reconfigure the phase or amplitude changes by applying a precoding weight to each RIS element to enable the RIS 290 to re-radiate”. See Fig. 8 for generating weights, and [0019] “FIG. 8 illustrates an example generation of high-resolution weights for precoding RIS elements, in accordance with certain aspects of the present disclosure.”);
a bus system (See Fig. 11 for 1106 and [0100] “The RIS controller 1102 includes a processor 1104 coupled to a computer-readable medium/memory 1112 via a bus 1106.”); and
a second processor (See Fig. 2 for RIS Controller.) coupled to the first processor and the first phase shifters over the bus system (See Fig. 1 or Fig. 2. The RIC controller includes the codebook generator that generates codebooks which is equivalent to “first phase shifters”.),
the second processor being configured to
generate, based on the first value, first phase settings ([0033] “The RIS controller 103 includes a codebook 132 and a codebook generator 134 for generating the codebook 132. The codebook 132 includes values of weights to modify the radio signal re-radiated by each RIS element, such as weight shifting or changing amplitudes. The codebook generator 134 may generate different codebooks when provided different conditions.” Note that the cited different codebooks are equivalent to the recited “first phase settings”), and
configure the first phase shifters using the first phase settings ([0050] “The RIS 290 may be reconfigured or controlled by a RIS controller 292. Each RIS element may re-radiate radio signals with certain phase or amplitude changes, such as phase shifts. The RIS controller 292 may reconfigure the phase or amplitude changes by applying a precoding weight to each RIS element … the RIS controller 292 includes a codebook generator 296 and a codebook 294. The codebook generator 296 may generate codebooks 294 specific to incoming reference signals, such as the reference signals transmitted by a transmitter (either the BS 110 or the UE 120). The generated codebooks 294 may be stored in the RIS controller 292 for future use in conditions similar to when the codebooks 294 are generated.”),
wherein the first electronic device is configured to redirect the wireless signals while the first phase shifters are configured using the first phase settings ([Elshfie, 0067] “At 404, the RIS controller participates in training between a transmitter and a receiver, by applying different precodings to the RIS elements, based on the codebook, while the transmitter transmits reference signals (RSs). In some aspects, applying different precodings to the RIS elements causes at least one of a phase shift or an amplitude change to one or more of the RIS elements when the RIS reflects the RSs.”).
It is noted that while disclosing phase shifting using codebooks, Elshafie does not specifically teach about phase shifters. It, however, had been known in the art before the effective date of the instant application as shown by Barak as follows;
first phase shifters ([Barak, 0052 and Fig. 2] “a respective programmable Phase Shifter (PS) 44, which shifts the phase of the signal by a controlled amount that is externally-programmable.”).
Therefore, it would have been obvious to one of ordinary skill in the art at the time of instant application to modify Elshafie by using the features of Barak in order to effectively process signals in phased array antennas such that “the at least one digitally-controlled component includes at least one component type selected from a group of types consisting of a digitally-controlled phase shifter and a digitally-controlled gain stage.” [Barak, 0014].
It is noted that while disclosing phase shifting using codebooks, Elshafie does not specifically teach about a digital signal processor and a state machine. It, however, had been known in the art before the effective date of the instant application as shown by Ek as follows;
a first processor ([0088] “the processing circuitry 53, 63 may comprise any sequential state machine operative to execute machine instructions stored as machine-readable computer programs in memory 56, 66, such as one or more hardware-implemented state machines (e.g., in discrete logic, FPGA, ASIC, etc.); programmable logic together with appropriate firmware; one or more stored-program, general-purpose processors, such as a microprocessor or Digital Signal Processor (DSP)”).
Therefore, it would have been obvious to one of ordinary skill in the art at the time of instant application to modify Elshafie by using the features of Ek in order to be more flexible and adjustable for frequency hopping systems such that “Directional antennas use precise phase shifts between RF signals transmitted from large arrays of antenna elements to steer the transmitted RF beam, or to enhance reception in specific directions.” [Ek, 0003].
Regarding claim 21, it is a wireless circuitry claim corresponding to the method claim 1, and is therefore rejected for the similar reasons set forth in the rejection of claim 1.
Regarding claim 28, it is a method claim corresponding to the method claim 1, and is therefore rejected for the similar reasons set forth in the rejection of claim 1.
With respect to dependent claims:
Regarding claims 2 and 22, the first electronic device of claim 1 and the wireless circuitry of claim 21, respectively, further comprising:
an antenna configured to receive a control signal from the second electronic device, wherein the first processor is configured to generate the first value based on the control signal ([0036] “The BS 110a may use one of the metrics as feedback to inform the RIS controller which set of weights may be preferred and training the RIS controller of the preferred settings.”).
Regarding claims 6 and 23,
the first electronic device of claim 1 and the wireless circuitry of claim 21, respectively, wherein the first processor comprises a digital signal processor and the second processor comprises a hardware state machine (aforesaid [0088] “the processing circuitry 53, 63 may comprise any sequential state machine operative to execute machine instructions stored as machine-readable computer programs in memory 56, 66, such as one or more hardware-implemented state machines (e.g., in discrete logic, FPGA, ASIC, etc.); programmable logic together with appropriate firmware; one or more stored-program, general-purpose processors, such as a microprocessor or Digital Signal Processor (DSP)”).
Regarding claims 8 and 25, the first electronic device of claim 7 and the wireless circuitry of claim 24, respectively, further comprising: a trigger register (See below [Barak, 0058 and Fig. 2] “CLK” and “LD”) configured to control the second register to configure the first phase shifters using the first phase settings ([Barak, 0057 and Fig. 2] “Device 32 is configured such that one 8-bit shift register 64 controls two of phase shifters 44, a second shift register controls the other two phase shifters”).
Regarding claims 11 and 27, the first electronic device of claim 7 and the wireless circuitry of claim 24, respectively, wherein the first value comprises a phase offset value and a base value ([0060] “The phase shifts are controlled by precoding weights (e.g., a multiplier or an offset of time delay) applied to the RIS elements. For an array of RIS elements, such as an m×n rectangular matrix, for example, a respective precoding weight may be generated or specified for each of the RIS element by the RIS controller.” Note that the cited precoding weights are equivalent to the recited a base value and the cited oversampling is equivalent to the recited offset.), the calculation logic (See Fig. 8 and [0083] “FIG. 8 illustrates an example generation 800 of high-resolution weights for precoding RIS elements”) being configured to generate the first phase settings by adding multiples of the offset value to the base value ([0083] “When oversampling weights are generated, a subset of the oversampled codebook may be used. For example, the first wireless communication device may signal a part of the codebook to use. As shown in FIG. 8, after applying the oversampling factor O.sub.1, the oversampled DFT matrix grows from N.sub.1 by N.sub.1 to O.sub.1N.sub.1 by O.sub.1N.sub.1, and is truncated by removing the columns from N.sub.1+1 to O.sub.1N.sub.1.”).
Regarding claim 22, the wireless circuitry of claim 21, further comprising: an antenna configured to receive a control signal from the second electronic device, the first set of one or more processors being configured to generate the value based on the control signal ([0036] “The BS 110a may use one of the metrics as feedback to inform the RIS controller which set of weights may be preferred and training the RIS controller of the preferred settings.”).
Claim(s) 7 and 24 rejected under 35 U.S.C. 103 as being unpatentable over Elshafie et al. (US 2024/0048188, “Elshafie”) in view of Barak et al. (US 2014/0030994, “Barak”) and Ek (US 2025/0343552), and further in view of Reisslein et al (US 2016/0081006, “Reisslein”).
Examiner’s note: in what follows, references are drawn to Elshafie unless otherwise mentioned.
Regarding claims 7 and 24, the first electronic device of claim 1, wherein the second processor comprises:
a buffer configured to receive the first value (This will be discussed in view of Reisslein.);
calculation logic configured to generate the first phase settings based on the first value received by the buffer ([0100] “The RIS controller 1102 includes a processor 1104 coupled to a computer-readable medium/memory 1112 via a bus 1106. … computer-readable medium/memory 1112 stores code 1122 for generating a codebook for performing precoding of elements of a reconfigurable intelligent surface (RIS)”);
a first register ([0245] “the machine-readable media, or any portion thereof, may be integrated into the processor, such as the case may be with cache and/or general register files.”); and
a second register configured to load at least a portion of the first phase settings into the first register ([0246] “One or more cache lines may then be loaded into a general register file for execution by the processor.”).
It is noted that while disclosing phase shifting using codebooks, Elshafie does not specifically teach about a buffer. It, however, had been known in the art before the effective date of the instant application as shown by Ek as follows;
a buffer configured to receive the first value ([Reisslein, claim 1] “the system controller comprising a set of hardware finite state machines configured to: receive a network frame buffer from a base station”).
Therefore, it would have been obvious to one of ordinary skill in the art at the time of instant application to modify Elshafie by using the features of Reisslein in order to be robust for multi-technology wireless systems such that “methods, and devices for high performance roaming and autonomous distribution of wireless devices where the repetitive data path functions for each individual client device is implemented in hardware” [Reisslein, 0003].
Claim(s) 29 rejected under 35 U.S.C. 103 as being unpatentable over Elshafie et al. (US 2024/0048188, “Elshafie”) in view of Barak et al. (US 2014/0030994, “Barak”) and Ek (US 2025/0343552), and further in view of Li (US 2023/0379935).
Examiner’s note: in what follows, references are drawn to Elshafie unless otherwise mentioned.
Regarding claim 29, the method of claim 28, further comprising:
receiving, using an antenna separate from the set of antenna elements, a control signal from the second electronic device (This will be discussed in view of LI.), wherein outputting the value comprises outputting the value based on the control signal ([0036] “The BS 110a may use one of the metrics as feedback to inform the RIS controller which set of weights may be preferred and training the RIS controller of the preferred settings.”).
It is noted that while disclosing phase shifting using codebooks, Elshafie does not specifically teach about receiving a control signal at a separate antenna. It, however, had been known in the art before the effective date of the instant application as shown by Li as follows;
receiving, using an antenna separate from the set of antenna elements, a control signal from the second electronic device ([Li, 0040] “the terminal device 210 may also use different antenna panels to receive the physical downlink control channel (PDCCH)”).
Therefore, it would have been obvious to one of ordinary skill in the art at the time of instant application to modify Elshafie by using the features of Li in order to ensure signal coverage for better accuracy of reception such that “downlink control information (DCI) signaling is mapped to N control channel elements (CCEs) during rate matching, where N is a positive integer greater than 1. In the case that more than one TRP (such as 2 TRPs) is used for sending, each TRP uses N/2 or N CCEs to send the DCI signaling.” [Li, 0022].
Allowable Subject Matter
Claim(s) 3-5, 9-10 and 26 objected to as being dependent upon a rejected base claim, but be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 3, said claim contains the following underlined features which, when combined with other underlined features of the claim, prior art of record failed to anticipate or render obvious before the effective filing date of the instant application was filed:
3. the first electronic device of claim 2, further comprising:
a second set of antenna elements;
second phase shifters coupled to the second set of antenna elements; and
a third processor coupled to the first processor and the second phase shifters over the bus system,
the first processor being configured to generate a second value based on the control signal, and the third processor being configured to generate, based on the second value, second phase settings, and configure the second phase shifters using the second phase settings,
wherein the first electronic device is configured to redirect the wireless signals while the second phase shifters are configured using the second phase settings.
Claims 4 and 5 depend from claim 3, thus are objected.
Regarding claim 9, said claim contains the following underlined features which, when combined with other underlined features of the claim, prior art of record failed to anticipate or render obvious before the effective filing date of the instant application was filed:
9. The first electronic device of claim 7,
wherein the second register is coupled to a first subset of the first phase shifters,
the first electronic device further comprising:
a third register coupled to a second subset of the first phase shifters, the third register being configured to load an additional portion of the first phase settings into the third register.
Claim 10 depends from claim 9, thus is objected.
Regarding claim 26, said claim contains the following underlined features which, when combined with other underlined features of the claim, prior art of record failed to anticipate or render obvious before the effective filing date of the instant application was filed:
26. The wireless circuitry of claim 24
wherein the second register is coupled to a first subset of the first phase shifters, the wireless circuitry further comprising:
a third register coupled to a second subset of the first phase shifters, the third register being configured to load an additional portion of the phase settings into the third register,
wherein the bus system comprises a first bus that couples the first processor to the second processor; and a second bus that couples the first register to the second register and that couples the first register to the third register.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Harry H. Kim whose telephone number and email address are as follows; 571-272-5009, harry.kim2@uspto.gov.
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/HARRY H KIM/ Primary Examiner, Art Unit 2411