Prosecution Insights
Last updated: April 19, 2026
Application No. 18/466,472

POWER AMPLIFIER AND CONTROL METHOD

Non-Final OA §102§103§112
Filed
Sep 13, 2023
Examiner
LIENG, MALANE
Art Unit
2843
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Smarter Microelectronics (Guang Zhou) Co. Ltd.
OA Round
1 (Non-Final)
96%
Grant Probability
Favorable
1-2
OA Rounds
3y 4m
To Grant
99%
With Interview

Examiner Intelligence

Grants 96% — above average
96%
Career Allow Rate
22 granted / 23 resolved
+27.7% vs TC avg
Moderate +6% lift
Without
With
+6.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
20 currently pending
Career history
43
Total Applications
across all art units

Statute-Specific Performance

§103
39.3%
-0.7% vs TC avg
§102
39.3%
-0.7% vs TC avg
§112
19.7%
-20.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 23 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 13-17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as failing to set forth the subject matter which the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the applicant regards as the invention. Claim 13, lines 2-9 recites the limitation “a first current according to a received first control voltage by a current generating circuit”, “a first bias current by a first mirroring circuit, wherein the first bias current is used to be input into a power amplifying circuit”, “a second radio frequency signal with a power that meets a preset condition according to a first radio frequency signal and the first bias current by a power amplifying circuit”. There is insufficient antecedent basis for these limitations in the claim. Claims 14-17 are also rejected by virtue of their dependency on claim 13. For examination purposes Claim 13 will be dependent upon Claim 1 which recites the “the first current according to the received first control voltage by the current generating circuit”, “the first bias current by the first mirroring circuit, wherein the first bias current is used to be input into the power amplifying circuit”, and “the second radio frequency signal with the power that meets the preset condition according to the first radio frequency signal and the first bias current by the power amplifying circuit”. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, 13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nozaki (US 8648656 B2), hereafter referred to as “Nozaki”. Regarding claims 1 and 13, in the embodiment of Figs. 2, 6, 10, and 14, Nozaki discloses: A power amplifier (Figs. 6 and 14, low-noise amplifier) and a control method applied to the power amplifier per claim 13, comprising: a current generating circuit (Figs. 2 and 10, bias circuits 105 and 602 in Figs. 6 and 14), a first mirroring circuit (Figs. 2 and 10, transistors 202/202B and 203/203B form a mirror circuit) and a power amplifying circuit (Figs. Transistors 102/102B, 601/601B, and 104/104B, functions as an amplifying circuit), wherein the current generating circuit is configured to output a first current (current source 201) according to a received first control voltage (control terminal 208, column 12, lines 27-33, control terminals 206 and 208 comprises control signals (e.g. 2.5 volts)); the first mirroring circuit is configured to, according to the first current, mirror the current, and output a first bias current (column 11, lines 15-20, power supply voltage-mirrored current x resistance value is outputted through output terminal 204); and the power amplifying circuit has a stacked circuit unit (as shown in Figs. 6 and 15), and is configured to output a second radio frequency signal (Figs. 6 and 14, output terminal 13, outputs a high-frequency signal per column 12, lines 23-26) with a power that meets a preset condition (columns 11, lines 33-57, by determining an output voltage to meet a condition, a voltage equal to or more than terminal-to-terminal breakdown voltages are prevented from transistors 102,104), according to a first radio frequency signal and the first bias current which are respectively input into different stacked transistors (columns 10, lines 59-64, high-frequency signal to input terminal 101 is fed to transistors 102 (also 601/601B in figs. 6,14) and 104 (i.e. connected to the bias circuits 105,602) and outputted to output terminal 103). Regarding claim 2, in the embodiment of Figs. 2, 6, 10, and 14, Nozaki discloses: the first bias current is positively correlated with the first control voltage (column 11, lines 12-20, current output of bias circuit is correlated to the control signal (e.g. 0 volts) at control terminal 208). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 12 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Nozaki (US 8648656 B2) in view of GEBEYEHU (US 20140049321 A1), hereafter referred to “Nozaki” and “GEBEYEHU”, respectively. Regarding claim 12 and 17, in the embodiment of Figs. 2, 6, 10, and 14, Nozaki discloses: the preset condition comprises the power amplifier but is, however silent in teaching the power amplifier meeting a preset forward isolation index. GEBEYEHU teaches the power amplifier meeting a preset forward isolation index (Fig. 7, performance in loop lock acquisition associated with the PA control system in Fig. 6, paragraph [0105] a PA control is charged during startup below the PA turn-on threshold so that forward isolation and PVT violation are avoided/reduced). It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify the amplifier as taught by Nozaki (Figs. 2, 6, 10, and 14) to meet a preset forward isolation index as taught by GEBEYEHU (GEBEYEHU, Fig. 7), to avoid forward isolation issues and PVT violations, thereby suggesting the obviousness of such a modification. Allowable Subject Matter Claims 3-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 3: the cited prior art of record, Nozaki, either singly or in proper combination, does not teach or make obvious, along with the other claimed features, “when the first branch is conductive, the second branch outputs a first target current as the first current; when the first branch is partially conductive, the second branch outputs a second target current as the first current; when the first branch is turned off, the second branch outputs a third target current as the first current; and the third target current is greater than the second target current, and the second target current is greater than the first target current.” Regarding claim 11: the cited prior art of record, Nozaki, either singly or in proper combination, does not teach or make obvious, along with the other claimed features, “a second mirroring circuit”, and “the second mirroring circuit is configured to, according to the bias current of the power amplifier, mirror the current, output a second bias current, and provide the second bias current for a second stacked transistor of the stacked circuit unit, wherein the bias current is generated based on the first control voltage.” Claims 4-10 are objected to due to dependency on objected claim 3. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MALANE LIENG whose telephone number is (571)272-5739. The examiner can normally be reached Monday-Friday 6:30 - 4:00 CST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Baltzell can be reached at (571) 272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MALANE LIENG/Examiner, Art Unit 2843 /ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843
Read full office action

Prosecution Timeline

Sep 13, 2023
Application Filed
Feb 07, 2026
Non-Final Rejection — §102, §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
96%
Grant Probability
99%
With Interview (+6.3%)
3y 4m
Median Time to Grant
Low
PTA Risk
Based on 23 resolved cases by this examiner. Grant probability derived from career allow rate.

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