DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 and 7-9 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Applicant’s arguments (Applicant’s Remarks pages 7-8) assert that the new limitations “the second insulating layer is silicon carbide or silicon carbonitride and the third insulating layer is silicon nitride, germanium nitride, carbon nitride or carbon; or the second and third insulating layers are silicon carbide or silicon nitride, the second insulating layer having a density between 0.5 and 1.5 g/cm^3 and the third insulating layer having a density higher than 2 g/cm^3” added to claim 1 are not taught or obviously suggested by the prior art cited in the Office action mailed 3/19/2026. The Examiner agrees, but further search and consideration in view of the amended limitations have yielded US patent publications US 20140124726 A1 (Oh) in view of US 20210193922 A1 (Lee et al), which teach or suggest the claimed invention.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1 and 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over US patent publications US 20140124726 A1 (Oh) in view of US 20210193922 A1 (Lee et al hereinafter Lee).
Regarding claim 1, Oh discloses a phase change memory cell (the cell of FIG. 2A ¶ [0051]) comprising: - a first layer (FIG. 2A, phase-change layer 172 is a phase change material ¶ [0073]) which is a phase change material;- a heating element (FIG. 2A, lower electrode 158 may be used as a heating element ¶ [0074, 0092]) located under the first layer;- a second insulating layer (FIG. 2A, gap-filling mold layer 148 coats a side of lower electrode 158 ¶ [0076]) coating a side of the heating element; and- a third insulating layer (FIG. 2A, second spacer 146 is between mold layer 148 and phase-change layer 172 ¶ [0080]) interposed between the first layer and second insulating layer, wherein: the third insulating layer is silicon nitride, germanium nitride, carbon nitride or carbon (second spacer 146 may be silicon nitride ¶ [0080]).
Oh does not further disclose that the third insulating layer is in a material having a density higher than that of the material of the second insulating layer, or that the second insulating layer is silicon carbide or silicon carbonitride. Regarding a material for the second insulating layer, which is used as a molding layer, Oh broadly suggests insulating materials, and specifically mentions silicon nitride and silicon oxide (¶ [0076]).
However, Lee discloses a memory device (the device of FIGS. 3-5 ¶ [0011-0013]) which may be adapted for phase-change memory technology (¶ [0003]), wherein a second insulating layer (FIG. 4, mold layer 300 ¶ [0049]) may be interchangeably formed of silicon oxide, silicon nitride, silicon carbide, and silicon carbonitride (¶ [0049]).
Oh and Lee both pertain to the field of memory cells, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Oh in view of Lee such that the material of the second insulating layer/mold layer is silicon carbide or silicon carbonitride, because Lee has demonstrated those materials to be suitable as mold layer materials and interchangeable with the materials explicitly suggested by Oh. A person of ordinary skill in the art may further find silicon carbide or silicon carbonitride beneficial from consideration of materials costs and changing market conditions. Consequently, the third insulating layer is in a material having a density higher than that of the material of the second insulating layer, as silicon nitride is known to have a greater density than silicon carbonitride (corroborated by present application ¶ [0063-0064]).
Regarding claim 7, Oh in view of Lee discloses the limitations of claim 1 as detailed above, and they further disclose a first conduction electrode (Oh FIG. 2A, contact plug 134 is located under and in contact with the lower face of heating electrode 158 opposite phase-change layer 172 ¶ [0075]) located under and in contact with one face of the heating element opposite the first layer and a second conduction electrode (FIG. 2A, upper electrode 182 is located on and in contact with an upper face of phase-change layer 172 opposite heating electrode 158 ¶ [0075]) located on and in contact with one face of the first layer opposite the heating element.
Regarding claim 8, Oh in view of Lee discloses the limitations of claim 1 as detailed above, and they further disclose that the heating element is L-shaped (as can be seen in the A1-A2 cross section of Oh FIG. 2A, heating electrode 158 is L-shaped).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Oh in view of Lee as applied to claim 1 above, and further in view of US patent publication US 20210174840 A1 (Kaushik et al hereinafter Kaushik).
Oh in view of Lee discloses the limitations of claim 1 as detailed above, and they further disclose a stack comprising a fourth encapsulation layer (Oh FIG. 2A, protection layer 162, which can be seen in the B1-B2 cross section to coat side faces of heating electrode 158, second spacer 146, and gap-filling mold layer 148 after referencing the cross-sectional designations of FIG. 1B ¶ [0099]) coating the side faces of the first layer, second and third insulating layers and a fifth encapsulation layer (FIG. 2A, second mold layer 164 coats protection layer 162 ¶ [0099]) coating the fourth encapsulation layer.
While Oh in view of Lee did not explicitly state the fifth encapsulation layer having a lower density than that of the fourth encapsulation layer, Oh does teach that protection layer 162 is formed of silicon nitride by ALD and second mold layer 164 is formed of silicon nitride by CVD (¶ [0099]).
Further, Kaushik discloses a memory device (see Abstract) and teaches that the method of depositing silicon nitride layers affects the density of the layers, noting the ALD and CVD depositions may provide different silicon nitride layers of distinct densities (¶ [0047]), it being known in the art that an ALD process results in a higher density than a CVD process when forming silicon nitride layers.
Oh, Lee, and Kaushik all pertain to the field of memory devices, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to have the fifth encapsulation/second mold layer 164 having lower density than fourth encapsulation/protection layer 162 by electing to form both of them of silicon nitride as suggested by Oh, since the ALD process that formed layer 162 produces a higher density silicon nitride than the CVD process that forms layer 164.
Cited Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US patent publications US 20230082961 A1 (notably FIG. 20), US 20240065079 A1 (notably ¶ [0069]), and US 20220190242 A1 (notably ¶ [0071]; interlayer dielectric 250 may be SiC or SiN).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/E.R.C./Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
