DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The IDS has been considered to the extent possible due to the excessive number of references.
Claim Objections
Claim 14 is objected to because of the following informalities: Claim 14 recites “…on a substrate an extending in at least…”. However, this language does not make grammatical sense. The Examiner believes this to be a simple typographical error and interprets the claim language to be “…on a substrate and extending in at least…” Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 6 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 6, claim 5 recites “…wherein the supporting dielectric layer acts as a patterning coating…”. However, claim 1, from which claim 5 depends, also recites “a patterning coating”. Therefore, it is unclear whether the supporting dielectric and the patterning coating are two separate structures or the same structure. Appropriate correction is required to clarify the language.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-5, 7-11 and 13-17 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 46, 48, 49, 52, 55, 56, 63, 66, 70, 71, 82, 83, 85, 87-90 of copending Application No. 18044774 (hereinafter ‘774 App) (Published as US 2023/0371348) in view of Ohara et al. (US 2019/0363156) hereinafter “Ohara”. Although the claims at issue are not identical, they are not patentably distinct from each other. The Examiner notes that the ‘774 App has been allowed by the USPTO but a patent has not yet been issued. The provisional rejection here will convert to a non-provisional rejection upon issuance of the patent for the ‘774 App.
Current Application
An opto-electronic device having a plurality of layers deposited on a substrate and extending in at least one lateral aspect defined by a lateral axis thereof, comprising: a patterning coating provided on a first layer surface, in a first portion of the lateral aspect, comprising at least one emissive region of the device, the at least one emissive region comprising: a first electrode; a second electrode; at least one semiconducting layer disposed between the first electrode and the second electrode, the first electrode being disposed between the substrate and the at least one semiconducting layer; a supporting dielectric layer disposed on an exposed layer surface of the second electrode and extending beyond the first portion into a second portion of the lateral aspect, wherein the first layer surface is an exposed layer surface of the supporting dielectric layer; and a discontinuous layer of at least one particle structure comprising a deposited material deposited on a second layer surface in the second portion, wherein the second layer surface is an exposed layer surface of the supporting dielectric layer; wherein: an initial sticking probability against deposition of the deposited material on a surface of the patterning coating is substantially less than an initial sticking probability against deposition of the deposited material onto the first layer surface, such that the patterning coating is substantially devoid of a closed coating of the deposited material; and the discontinuous layer of the at least one particle structure deposited on the supporting dielectric layer comprises an EM radiation-absorbing layer that facilitates absorption of EM radiation incident thereon.
‘774 App
Claim 46. An opto-electronic device having a plurality of layers deposited on a substrate and extending in at least one lateral aspect defined by a lateral axis thereof, comprising: a patterning coating disposed on a first layer surface, in a first portion of the lateral aspect comprising at least an emissive region of the device; and at least one EM radiation-absorbing layer deposited on a second layer surface in a second portion of the lateral aspect, and comprising a discontinuous layer of at least one particle structure comprising a deposited material; wherein the patterning coating is substantially devoid of a closed coating of the deposited material; and the at least one particle structure of the at least one EM radiation-absorbing layer facilitates absorption of EM radiation incident thereon.
63. The device of claim 46, further comprising a supporting dielectric layer
defining the second layer surface, wherein the supporting dielectric layer is disposed on a third layer surface.
68. The device of claim 63, wherein the supporting dielectric layer extends in
the second portion.
70. The device of claim 69, wherein the supporting dielectric layer extends
into the first portion.
82. The device of claim 46, wherein an initial sticking probability against
deposition of the deposited material on a surface of the patterning coating is substantially less than the initial sticking probability against deposition of the deposited material onto the first
layer surface.
‘744 App. does not teach the at least one emissive region comprising: a first electrode; a second electrode; at least one semiconducting layer disposed between the first electrode and the second electrode, the first electrode being disposed between the substrate and the at least one semiconducting layer.
Ohara teaches a display device comprising an emissive region comprising a first electrode (anode), a second electrode (cathode), at least one semiconducting layer (electron control layer) disposed between the first electrode (anode) and the second electrode (cathode), the first electrode (anode) being disposed between a substrate (Item 11) and the at least one semiconductor layer (electron control layer) (Paragraph 0066).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the at least one emissive region comprise: a first electrode; a second electrode; at least one semiconducting layer disposed between the first electrode and the second electrode, the first electrode being disposed between the substrate and the at least one semiconducting layer because the first electrode, the second electrode and the semiconducting layer form part of a subpixel that allows the emissive region to emit light (Ohara Paragraph 0023).
Claim 2 of the current application is anticipated by claim 47 of the ‘774 App.
Claim 3 of the current application is anticipated by claim 52 of the ‘774 App.
Claim 4 of the current application is anticipated by claim 48 of the ‘774 App.
Claim 5 of the current application is anticipated by claim 66 of the ‘774 App.
Claim 7 of the current application is anticipated by claim 49 of the ‘774 App.
Claim 8 of the current application is anticipated by claim 62 of the ‘774 App.
Claim 9 of the current application is anticipated by claim 55 of the ‘774 App.
Claim 10 of the current application is anticipated by claim 56 of the ‘774 App.
Claim 11 of the current application is anticipated by claim 71 of the ‘774 App.
Claim 13 of the current application is anticipated by claim 71 of the ‘774 App.
Current Application
14. A method for manufacturing an opto-electronic device having a plurality of layers deposited on a substrate and extending in at least one lateral aspect defined by a lateral axis thereof, comprising actions of: providing a patterning coating on a first layer surface, in a first portion of the lateral aspect, comprising at least one emissive region of the device, the at least one emissive region comprising: a first electrode; a second electrode; at least one semiconducting layer disposed between the first electrode and the second electrode, the first electrode being disposed between the substrate and the at least one semiconducting layer; disposing a supporting dielectric layer on an exposed layer surface of the second electrode and beyond the first portion into a second portion of the lateral aspect, wherein the first layer surface is an exposed layer surface of the supporting dielectric layer; and depositing a discontinuous layer of at least one particle structure comprising a deposited material on a second layer surface in the second portion, wherein the second layer surface is an exposed layer surface of the supporting dielectric layer; wherein: an initial sticking probability against deposition of the deposited material on a surface of the patterning coating is substantially less than an initial sticking probability against deposition of the deposited material onto the first layer surface, such that the patterning coating is substantially devoid of a closed coating of the deposited material; and the discontinuous layer of the at least one particle structure deposited on the supporting dielectric layer comprises an EM radiation-absorbing layer that facilitates absorption of EM radiation incident thereon.
‘774 App
83. A method for manufacturing an opto-electronic device having a plurality
of layers that facilitates absorption of EM radiation incident thereon, the method comprising actions of: disposing a patterning coating on a first layer surface in a first portion of the lateral aspect;
depositing at least one EM radiation-absorbing layer on a second layer surface in a second portion of the lateral aspect, and comprising at discontinuous layer of at least one particle structure comprising a deposited material; wherein: the at least one particle structure is deposited on a second layer surface in a second portion of the lateral aspect that is substantially devoid of the patterning material; and
the at least one EM radiation-absorbing layer facilitates absorption of EM radiation
incident thereon.
89. The method of claim 83, further comprising, before the action of depositing, an action of: establishing a supporting dielectric layer as the second layer surface
87. The method of claim 83, further comprising, after the actin of disposing, an action of seeding the second layer surface with at least one seed, comprising a seed material, about which the deposited material tends to coalesce, wherein an initial sticking probability against deposition of the seed material on a surface of the patterning coating is substantially less than the initial sticking probability against deposition of the seed material onto the first layer surface, such that the first portion is substantially devoid of the seeds.
‘744 App. does not teach the optoelectronic device comprising at least one emissive region, the at least one emissive region comprising: a first electrode; a second electrode; at least one semiconducting layer disposed between the first electrode and the second electrode, the first electrode being disposed between the substrate and the at least one semiconducting layer.
Ohara teaches a display device comprising an emissive region comprising a first electrode (anode), a second electrode (cathode), at least one semiconducting layer (electron control layer) disposed between the first electrode (anode) and the second electrode (cathode), the first electrode (anode) being disposed between a substrate (Item 11) and the at least one semiconductor layer (electron control layer) (Paragraph 0066).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have at least one emissive region, where the at least one emissive region comprises: a first electrode; a second electrode; at least one semiconducting layer disposed between the first electrode and the second electrode, the first electrode being disposed between the substrate and the at least one semiconducting layer because the first electrode, the second electrode and the semiconducting layer form part of a subpixel that allows the emissive region to emit light (Ohara Paragraph 0023).
Claim 15 of the current application is anticipated by claim 85 of the ‘774 App.
Claim 16 of the current application is anticipated by claim 88 of the ‘774 App.
Claim 17 of the current application is anticipated by claim 90 of the ‘774 App.
Claim 12 is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 46, 48, 49, 52, 55, 56, 63, 66, 70, 71, 82, 83, 85, 87-90 of copending Application No. 18044774 (hereinafter ‘774 App) (Published as US 2023/0371348) in view of Ohara et al. (US 2019/0363156) hereinafter “Ohara” and in further view of Choi et al. (US 2020/0265798) hereinafter “Choi”.
Regarding claim 12, the ‘774 App. teaches all of the elements of the claimed invention as stated above except where the covering layer comprises an encapsulation layer.
Choi teaches where a covering layer comprises an encapsulation layer (Paragraph 0052).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the covering layer comprise an encapsulation layer because the encapsulation layer seals the display area to prevent water or oxygen from penetrating the display panel (Choi Paragraph 0052).
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC K ASHBAHIAN whose telephone number is (571)270-5187. The examiner can normally be reached 8-5:30 PM.
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/ERIC K ASHBAHIAN/Primary Examiner, Art Unit 2891
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