DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 22 August 2026 has been entered.
Response to Arguments
Applicant's arguments, filed on 22 August 2026 in the RCE filing, have been fully considered but they are not persuasive. Examiner’s refutation follows:
1. DC Operating Point vs. Quiescent Current: In transistor amplifier design, a transistor's quiescent current (ICQ) is directly defined as its DC bias operating point (Q-point) under zero-signal or steady-state DC conditions.
The Examiner explicitly mapped Gorbachov’s reduction of bias/quiescent current to adjusting the operating state of the PA stage.
Relying on a distinction between "DC operating point" and "quiescent current" is viewed by the Examiner as a distinction without a patentable technical difference under 35 U.S.C. § 103, as adjusting quiescent current naturally shifts the DC operating point.
2. Failure to Teach 'Recovering' the DC Operating Point (Gorbachov's Hysteresis): The Examiner explicitly pointed to paragraph [0049] and Figure 2 of Gorbachov, which describe a hysteresis circuit (44) that restores the amplifier network back to its nominal default bias configuration once an overstress condition ends.
Restoring nominal bias conditions inherently constitutes "recovering" the DC operating point once the fault clears.
3. Deficiency of Xie Regarding Recovery (§0042)
The Applicant correctly highlighted that paragraph [0042] of Xie merely describes a general communication device and does not detail DC operating point recovery.
However, in both the Advisory Action and Final Rejection, the Examiner established that Xie’s secondary contribution relies on its RC delay network (§0031–§0034, §0072–§0088 and Fig. 5). The Examiner uses Xie’s RC delay circuit to provide the timing delay for recovery, while using Gorbachov for the actual bias/operating point restoration. Thus, pointing out a weak citation in Xie does not overcome the structural combination.
4. Over-Current and Over-Voltage Signals vs. Dual: The Applicant argued that the prior art only employs one of over-current or over-voltage.
The Examiner explicitly refuted this in the Advisory Action and Detailed Action by citing Gorbachov (§0013, §0044) and Xie (Fig. 3, §0037, detailing voltage detector 312 and current detector 311 simultaneously). Both references teach monitoring over-voltage and over-current conditions to trigger protection.
5. Inability to Achieve Claimed Circuit Functions & Steady-State Protection: Purely functional clauses (such as "preventing damages... in a process of establishing a steady state") do not impart patentable weight to a structural claim if the underlying physical structure is rendered obvious by the prior art, because the Examiner combined Gorbachov (multi-stage attenuation switches) and Xie (RC timing delay network), the combination structurally exhibits the inherent functional capability of holding the circuit in a safe state during steady-state recovery.
The Applicant should focus on adding specific structural interconnections of the protection control circuit or specific signal routing elements that neither Gorbachov's switch network nor Xie's RC comparator network discloses.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all
obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness
under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-15 are rejected under 35 U.S.C. 103 as being unpatentable over Gorbachov et al. (US 2015/0015339 A1) in view of Xie et al. (US 2013/0257543 A1).
Regarding claim 1, Gorbachov discloses a circuit for protecting a power amplifier (RF power-amplifier circuits and input-power limiter circuits … mitigating voltage and current overstress of transistors utilized in RF power amplifiers. Therefore, it is a circuit for protecting a power amplifier, §0013-§0016) comprising:
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Fig. 1 of Gorbachov reproduced for ease of reference.
a multistage power amplifier circuit (first PA stage 20, second PA stage 22, inter-stage matching network 21, §0039-§0040, Fig. 1) with a matching/adjustment network (Provides an inter-stage adjustment network located in series between adjacent PA stages. Transistor Q3, controlled by control circuit 42, changes the inter-stage impedance and thereby adjusts gain or protects the PA from overstress—corresponds to inter-stage adjustment circuit, §0053-§0056, Fig. 5).
Gorbachov also teaches (§0043–§0049, §0054–0056 and FIG. 5 (control circuit 42, power detector 36, comparator logic: control circuit drives switch Q3 when input power detector voltage exceeds reference value: Q3 changes its impedance to reduce gain and protect the PA. This corresponds to overload detection and protection activation. Gorbachov thus discloses turning an inter-stage circuit from its nominal (ON) state to an altered (OFF or reduced-gain) state when overload protection is triggered. Gorbachov enables protection based on a detected index of any stage (Gorbachov teaches the general multi-stage architecture and tracking localized signal levels to trigger protection, wherein the control architecture utilizes an input power detector to track signal spikes.
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Fig. 5 of Gorbachov reproduced for ease of reference.
When the dynamic voltage generated by this power detector climbs past a designated benchmark level, the comparator logic commands a change in internal impedance states to mitigate operational overstress and lower the overall amplification gain, §0043-§0049). However, in this context Xie discloses the precise localized tracking mechanism. Xie teaches a comparator (in the block 201, in fig. 2) that continually measures a real-time current parameter (Isense) read directly from a localized internal circuit junction and matches it against a specified reference threshold (Vref) to determine an exact overcurrent or overvoltage state.
In terms of the claim limitation “and recovery signals to control the inter-stage adjustment circuit to be in a turn-on state, after a preset time elapses...", Gorbachov describes a system that features a hysteresis circuit (44) which automatically returns the amplifier network back to its normal, default bias configuration once an overstress situation has terminated. However, it lacks a dedicated, rigid clock delay (§0050).
Xie fills this exact gap by teaching a protection layout equipped with a deliberate resistor-capacitor (RC) delay network. This delay loop is specifically designed to suppress the immediate re-activation of the system, keeping the main power amplifier pathways locked down in a safe state for a distinct, pre-calculated interval (§0031-§0034). It only permits the system to return to a standard operational state after that specific temporal safety window has completely expired (§0072-§0088) and thus teaches on the amended limitation of reducing and recovering a direct current (DC) operation point of the power amplifier. This delay ensures the switch remains safe/off for a specified interval and only reenables after a preset time has elapsed (§0072- §0088, Fig. 5) following fault clearance, explicitly managing steady-state recovery. Xie also teaches tracking operational indices (sensed currents/voltages) across device junctions to determine fault states.
It would have been obvious to a person having ordinary skill in the art (PHOSITA) at the time of the invention to modify Gorbachov's control circuit to incorporate Xie's multi-parameter sensing structure and RC delay network. This integration ensures that when an overload index is triggered at any stage of Gorbachov's multi-stage device , the inter-stage attenuation switch Q3 locks open and waits for a preset relaxation window. This is a predictable use of an old timing element for its known function of preventing transient signal overstress during power stabilization. The resulting circuit holds the inter-stage switch open until the preset time expires, inherently fulfilling your functional clause of "preventing incoming signals from burning out the power amplifier after the circuit returns to a steady state".
Therefore, the combination of Gorbachov and Xie renders the subject matter of claim 1 obvious.
Regarding Claim 2, Gorbachov explicitly discloses an inter-stage matching and control network disposed between successive amplifier stages, including later stages of a multi-stage power amplifier (See Gorbachov, Fig. 1, inter-stage network 21 positioned between amplifier stages 12 and 13, and Fig. 5, adjustable inter-stage network 52 between later gain stages).
Regarding Claim 3, Gorbachov teaches that each amplifier stage may be provided with its own inter-stage matching and control circuitry, enabling stage-by- stage gain and protection control (See Gorbachov, Fig. 2, showing multiple amplifier stages 12a–12c with corresponding inter-stage networks 21a–21c, and § §0046–§0048).
Applying the same adjustment circuit between every adjacent stage is a predictable extension of the disclosed architecture.
Regarding Claim 4, Gorbachov discloses a power detector circuit that senses excessive power conditions and outputs a control signal to a controller (See Gorbachov, Fig. 1, power detector 36 feeding control circuit 42, and Fig. 2, overload detection block 36 coupled to controller 42). Xie further reinforces this structure by teaching overload detection circuitry outputting signals to a controller for protective action (see Xie, Fig. 3, detector 310 coupled to controller 320).
Regarding Claim 5, Gorbachov explicitly teaches reducing bias current and operating point of amplifier stages in response to overload detection (See Gorbachov, Fig. 2, control circuit 42 adjusting bias of amplifier 12, and §0049 describing quiescent current reduction. Xie further teaches turning off or disabling an amplifier during fault conditions (see Xie, Fig. 4, switch 410 disabling PA 400).
Regarding Claim 6, Xie expressly discloses comparing sensed voltage/current values against a threshold to determine overload (See Xie, Fig. 3), comparator 315 comparing sensed current Isense to reference Vref, §0036–§0038. Gorbachov similarly teaches threshold-based detection of excessive power conditions using detector 36.
Regarding Claims 7 and 8, Xie expressly teaches separate over-voltage and over-current detection circuits for amplifier protection (See Xie, Fig. 3, voltage detector 312 and current detector 311, §0037. Gorbachov’s power detector 36 inherently monitors voltage and current conditions associated with excessive RF power.
Regarding Claim 9, Gorbachov discloses hysteresis and recovery behavior, wherein the protection circuit restores normal amplifier operation once overload conditions cease (See Gorbachov, Fig. 2, hysteresis circuit 44, §0049 describing return to normal bias). Xie similarly teaches recovery after fault clearance (see Xie, §0042).
Regarding Claim 10, Gorbachov teaches the use of timing and hysteresis delays to allow amplifier stabilization before restoring full operation (See Gorbachov, Fig. 2, delay element within hysteresis circuit 44, §0049). Such timing delays are well-known and routine in amplifier protection circuits.
Regarding Claim 11, Gorbachov explicitly teaches that inter-stage networks remain fully conductive during normal operation and are modified only upon overload detection (See Gorbachov, Fig. 5, switch 53 in default closed state during non-overload conditions).
Regarding Claims 12–14, Gorbachov expressly discloses both: Switch-based inter-stage control (See Gorbachov, Fig. 5, switch 53 controlled by control circuit 42) and Adjustable attenuation networks (See Gorbachov, Fig. 7, variable attenuator 72 between amplifier stages). Claims 13 and 14 merely specify control of insertion loss and switching behavior already shown in these figures.
Claim 15 recites a method corresponding to circuit of claim 1, wherein, Gorbachov and Xie both disclose methods of detecting overload, modifying inter-stage signal paths, and restoring normal operation (See Gorbachov, §0046–§0049 and Xie, §0035–§0043).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAFIZUR RAHMAN whose telephone number is (571)270-0659. The examiner can normally be reached M-F: 10-6.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Han can be reached on (571) 272-2078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/HAFIZUR RAHMAN/Primary Examiner, Art Unit 2843.
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