Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 07/31/2024 is acknowledged. The submission is in compliance with the provisions of 37 CFR 1.97.
Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 – 28 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Han (WO 2015012620 A1).
Regarding Independent Claim 1, Han teaches,
An apparatus comprising a reconfigurable active filter (See Fig. 9a-b) comprising:
an amplifier (Fig. 9a-b, amplifier ON) including:
a first input stage (Fig. 9a-b, stage 902) coupled between an input of the amplifier and an output of the amplifier (Fig. 9a-b, stage 902 is coupled between the input and output of ON); and
a second input stage (Fig. 9a-b, stage 904) selectively coupled between the input of the amplifier and the output of the amplifier (Fig. 9a-b, stage 904 is coupled between the input and output of ON); and
at least two feedback paths (Fig. 9a-b, path comprising C11 and path comprising C12) selectively coupled between the input of the amplifier and the output of the amplifier (Fig. 9a-b, both feedback paths are coupled between the input and output of ON).
Regarding claim 2,
The apparatus of claim 1, wherein one or more of the at least two feedback paths (Fig. 9a-b, path comprising C11 and path comprising C12. See paragraphs [113] – [114], “In the 3G/4G mode, the switches SW1, SW2, SW5, and SW6 interposed between the capacitors C11 and C21 are on (i.e. closed) while the switches SW3, SW4, SW7, and SW8 interposed between the capacitors C11 and C12 and between C21 and C22 are off (i.e. opened). Accordingly, the capacitors operate in the corresponding filter blocks.
Referring to FIG. 9B, in the 2G mode, the switches SW3, SW4, SW7, and SW8 interposed between the capacitors C11 and C12 and between the capacitors C21 and C22 of different filter blocks are on while the switches SW1, SW2, SW5, and SW6 interposed between the capacitors C11 and C21 of the first filter block 808a and the OP AMP 902 are off. Accordingly, the capacitors C11 and C21 operate in the state of being connected in parallel with the OP AMP 904 of the second filter block 808b other than the first filter block 808a. At this time, the OP AMP 904 of the first filter block 808a may be off to conserve the power. By controlling the other filter stages and capacitors of other filter blocks similarly depending on the communication mode, they can be shared in both the 2G mode and 3G/4G mode.”) are selectively coupled between the input of the amplifier and the output of the amplifier based on an operating mode of a wireless device.
Regarding claim 3,
The apparatus of claim 1, wherein the first input stage includes a first transconductance amplifier (Fig. 9a-b, amplifier 902), and wherein the second input stage includes a second transconductance amplifier (Fig. 9a-b, amplifier 904).
Regarding claim 4,
The apparatus of claim 1, wherein at least the second input stage is selectively coupled, via one or more switches (Fig. 9a-b, SW1 – SW4), between the input of the amplifier and the output of the amplifier based on an operating mode of a wireless device (See paragraph [113], “In the 3G/4G mode, the switches SW1, SW2, SW5, and SW6 interposed between the capacitors C11 and C21 are on (i.e. closed) while the switches SW3, SW4, SW7, and SW8 interposed between the capacitors C11 and C12 and between C21 and C22 are off (i.e. opened). Accordingly, the capacitors operate in the corresponding filter blocks”).
Regarding claim 5,
The apparatus of claim 4, wherein one or more of the at least two feedback paths (Fig. 9a-b, path comprising C11 and path comprising C12) are selectively coupled between the input of the amplifier and the output of the amplifier based on the operating mode (See paragraphs [113] – [114], “In the 3G/4G mode, the switches SW1, SW2, SW5, and SW6 interposed between the capacitors C11 and C21 are on (i.e. closed) while the switches SW3, SW4, SW7, and SW8 interposed between the capacitors C11 and C12 and between C21 and C22 are off (i.e. opened). Accordingly, the capacitors operate in the corresponding filter blocks.
Referring to FIG. 9B, in the 2G mode, the switches SW3, SW4, SW7, and SW8 interposed between the capacitors C11 and C12 and between the capacitors C21 and C22 of different filter blocks are on while the switches SW1, SW2, SW5, and SW6 interposed between the capacitors C11 and C21 of the first filter block 808a and the OP AMP 902 are off. Accordingly, the capacitors C11 and C21 operate in the state of being connected in parallel with the OP AMP 904 of the second filter block 808b other than the first filter block 808a. At this time, the OP AMP 904 of the first filter block 808a may be off to conserve the power. By controlling the other filter stages and capacitors of other filter blocks similarly depending on the communication mode, they can be shared in both the 2G mode and 3G/4G mode.”).
Regarding claim 6,
The apparatus of claim 4, wherein the one or more switches (Fig. 9a-b, SW1 – SW4) include a switch (Fig. 9a-b, SW8) coupled between an output of the first input stage and an output of the second input stage.
Regarding claim 7,
The apparatus of claim 4, wherein the amplifier further comprises:
a load impedance (Fig. 9a-b, R21) selectively coupled between an output of the second input stage (Fig. 9a-b, stage 904) and the output of the amplifier based on the operating mode; and
an output stage (Fig. 9a-b, Iout and Qout) selectively coupled between the load impedance (Fig. 9a-b, R21) and the output of the amplifier based on the operating mode.
Regarding claim 8,
The apparatus of claim 1, wherein the first input stage and the second input stage are configured to be selectively enabled based on an operating mode of a wireless device (See Fig. 7a-d, Mode1 – Mode4. See paragraphs [112] – [114], “Referring to FIG. 9A, the first OP AMP 902 is positioned in the first filter block 808a and connected to the two capacitors C11 and C21 in parallel. The second OP AMP 904 is positioned in the second filter block 808b and connected to the two capacitors C12 and C22 in parallel. The capacitor C11 is connected in parallel with the first OP AMP 902 by means of the switches SW1 and SW2, the switch SW3 is interposed between the input nodes of the capacitors C11 and C12, and the switch SW4 is interposed between the output nodes of the capacitors C11 and C12. Likewise, the capacitor C21 is connected in parallel with the second OP AMP 902 by means of the switches SW5 and SW6, the switch SW7 is interposed the input nodes of the capacitors C21 and C22, and the switch SW8 is interposed between the output nodes of the capacitors C21 and C22.
In the 3G/4G mode, the switches SW1, SW2, SW5, and SW6 interposed between the capacitors C11 and C21 are on (i.e. closed) while the switches SW3, SW4, SW7, and SW8 interposed between the capacitors C11 and C12 and between C21 and C22 are off (i.e. opened). Accordingly, the capacitors operate in the corresponding filter blocks.
Referring to FIG. 9B, in the 2G mode, the switches SW3, SW4, SW7, and SW8 interposed between the capacitors C11 and C12 and between the capacitors C21 and C22 of different filter blocks are on while the switches SW1, SW2, SW5, and SW6 interposed between the capacitors C11 and C21 of the first filter block 808a and the OP AMP 902 are off. Accordingly, the capacitors C11 and C21 operate in the state of being connected in parallel with the OP AMP 904 of the second filter block 808b other than the first filter block 808a. At this time, the OP AMP 904 of the first filter block 808a may be off to conserve the power. By controlling the other filter stages and capacitors of other filter blocks similarly depending on the communication mode, they can be shared in both the 2G mode and 3G/4G mode.”).
Regarding claim 9,
The apparatus of claim 8, wherein:
the first input stage (Fig. 9a-b, stage 902. See paragraphs [107] – [108], “FIG. 8 is a circuit diagram illustrating a configuration of the analog baseband filter according to an embodiment of the present invention.
Referring to FIG. 8, the analog baseband filter includes four filter blocks 808a, 808b, 808c, and 808d; and the DRX I and Q signals and PRX Q and I signals are input to the input switching unit 806 via the respective frequency convertors 802 and amplifiers 804. The input switching unit 806 relays the input signals to at least two of the filter blocks 808a to 808d depending on the current communication mode under the control of a control unit (not shown). In the 3G/4G mode, the input switching unit 806 relays the 4 input signals to the four filter blocks 808a to 808d. In the 2G mode, the input switching unit 806 delivers the 2G I and Q signals input from the DRX RF unit through the DRX I and Q input nodes to the second and third filter blocks 808b and 808c, i.e., the 2G Q signal from the DRX RF Q unit to the second block 808b and the 2G I signal from the DRX RF I unit to the third filter block 808c. In another embodiment, in the 2G mode, the input switching unit 806 relays the 2G I and Q signals input from the PRX RF unit through the PRX I and Q input nodes to the second and third filter blocks 808b and 808c, i.e. the 2G Q signal from the PRX RF Q unit to the third filter block 808c and the 2G I signal from the PRX RF I unit to the second filter block 808b.”) includes a first tail current source (Fig. 9a-b, current from the control unit), the first input stage (Fig. 9a-b, stage 902) being configured to be selectively enabled by controlling the first tail current source; and
the second input stage (Fig. 9a-b, stage 904) includes a second tail current source (Fig. 9a-b, current from control unit), the second input stage (Fig. 9a-b, stage 904) being configured to be selectively enabled by controlling the second tail current source.
Regarding claim 10,
The apparatus of claim 1, wherein the first input stage (Fig. 9a-b, stage 902) comprises a common-mode (CM) capacitive element (Fig. 9a-b, C11) coupled between a CM node of the first input stage (Fig. 9a-b, stage 902) and a reference potential node.
Regarding claim 11,
The apparatus of claim 10, wherein the first input stage (Fig. 9a-b, stage 902) further comprises:
a first input transistor (Fig. 9a-b, transistor in 902) having a gate configured to receive a first input signal (Fig. 9a-b, first Iin and Qin);
a second input transistor (Fig. 9a-b, transistor in 904) having a gate configured to receive a second input signal (Fig. 9a-b, second Iin and Qin);
a first switch (Fig. 9a-b, SW1) coupled between a drain of the first input transistor and the CM node; and
a second switch (Fig. 9a-b, SW3) coupled between a drain of the second input transistor and the CM node.
Regarding claim 12,
The apparatus of claim 1, wherein the amplifier further comprises:
a load impedance (Fig. 9a-b, R21) coupled between an output of the first input stage (Fig. 9a-b, stage 902) and the output of the amplifier; and
an output stage (Fig. 9a-b, Iout and Qout) coupled between the load impedance (Fig. 9a-b, R21) and the output of the amplifier.
Regarding claim 13,
The apparatus of claim 1, wherein the at least two feedback paths (Fig. 9a-b, path comprising C11 and path comprising C12) include:
a first feedback path including a first capacitive element (Fig. 9a-b, path comprising C11) selectively coupled in series between the input of the amplifier and the output of the amplifier; and
a second feedback path including a second capacitive element (Fig. 9a-b, path comprising C12) selectively coupled in series between the input of the amplifier and the output of the amplifier.
Regarding claim 14,
The apparatus of claim 13, wherein:
the first feedback path includes a first switch (Fig. 9a-b, path comprising C11 and SW1) coupled between the input of the amplifier and the first capacitive element and a second switch (Fig. 9a-b, SW2) coupled between the first capacitive element and the output of the amplifier; and
the second feedback path includes a third switch (Fig. 9a-b, path comprising C12 and SW3) coupled between the input of the amplifier and the second capacitive element and a fourth switch (Fig. 9a-b, SW4) coupled between the second capacitive element and the output of the amplifier.
Regarding claim 15,
The apparatus of claim 13, wherein at least one of the first capacitive element or the second capacitive element comprises a variable capacitive element (Fig. 8, C1 and C1x).
Regarding claim 16,
The apparatus of claim 1, wherein the at least two feedback paths are selectively coupled between the input of the amplifier and the output of the amplifier based on an operating bandwidth of a reconfigurable active filter being wide-band or narrow-band (See Fig. 7a-d and paragraph [4], “The baseband covers a very broad range including 100kHz bandwidth for the 2nd Generation (2G) communication system and 20MHz bandwidth for the 3rd Generation (3G) and 4th Generation (4G) communication system, and the broadest bandwidth is about 100 times the narrowest one. A multimode mobile terminal designed to operate in a 2G mode for voice communication and in a 3G or 4G mode (hereinafter, referred to as 3G/4G mode) has to have a multimode multiband radio transceiver equipped with an analog baseband filter capable of supporting various bandwidths as aforementioned”).
Regarding claim 17,
The apparatus of claim 1, wherein the reconfigurable active filter comprises a baseband filter coupled between a digital-to-analog converter (DAC) and a mixer (See Fig. 8, DAC0 – DAC3. See paragraph [2], “A wireless communication receiver uses an analog filter to select the signal of the intended channel by removing unnecessary noise from the signal demodulated to baseband by a mixer. The accurate cutoff frequency configuration for the analog filter exerts significant influences to the system performance.”).
Regarding claim 18,
The apparatus of claim 1, wherein the reconfigurable active filter comprises a baseband filter coupled between a mixer and an analog-to-digital converter (ADC) (See Fig. 8, DAC0 – DAC3. See paragraph [2], “A wireless communication receiver uses an analog filter to select the signal of the intended channel by removing unnecessary noise from the signal demodulated to baseband by a mixer. The accurate cutoff frequency configuration for the analog filter exerts significant influences to the system performance.”).
Regarding Independent claim 19,
A method for signal processing, comprising:
determining an operating mode of a wireless device (See paragraph [4], “The baseband covers a very broad range including 100kHz bandwidth for the 2nd Generation (2G) communication system and 20MHz bandwidth for the 3rd Generation (3G) and 4th Generation (4G) communication system, and the broadest bandwidth is about 100 times the narrowest one. A multimode mobile terminal designed to operate in a 2G mode for voice communication and in a 3G or 4G mode (hereinafter, referred to as 3G/4G mode) has to have a multimode multiband radio transceiver equipped with an analog baseband filter capable of supporting various bandwidths as aforementioned”) having at least two feedback paths (Fig. 9a-b, path comprising C11 and path comprising C12) selectively coupled between an input of an amplifier and an output of the amplifier (Fig. 9a-b, inputs and outputs of amplifier ON); and
selectively coupling one or more of the at least two feedback paths (Fig. 9a-b, path comprising C11 and path comprising C12) between the input of the amplifier and the output of the amplifier based on the operating mode (Fig. 9a-b, 3G/4G mode and 2G mode. See paragraphs [113] – [114], “In the 3G/4G mode, the switches SW1, SW2, SW5, and SW6 interposed between the capacitors C11 and C21 are on (i.e. closed) while the switches SW3, SW4, SW7, and SW8 interposed between the capacitors C11 and C12 and between C21 and C22 are off (i.e. opened). Accordingly, the capacitors operate in the corresponding filter blocks.
Referring to FIG. 9B, in the 2G mode, the switches SW3, SW4, SW7, and SW8 interposed between the capacitors C11 and C12 and between the capacitors C21 and C22 of different filter blocks are on while the switches SW1, SW2, SW5, and SW6 interposed between the capacitors C11 and C21 of the first filter block 808a and the OP AMP 902 are off. Accordingly, the capacitors C11 and C21 operate in the state of being connected in parallel with the OP AMP 904 of the second filter block 808b other than the first filter block 808a. At this time, the OP AMP 904 of the first filter block 808a may be off to conserve the power. By controlling the other filter stages and capacitors of other filter blocks similarly depending on the communication mode, they can be shared in both the 2G mode and 3G/4G mode.”), the amplifier including:
a first input stage (Fig. 9a-b, stage 902) coupled between the input of the amplifier and the output of the amplifier; and
a second input stage (Fig. 9a-b, stage 904) selectively coupled between the input of the amplifier and the output of the amplifier.
Regarding claim 20,
The method of claim 19, wherein the first input stage includes a first transconductance (Fig. 9a-b, amplifier 902), and wherein the second input stage includes a second transconductance amplifier (Fig. 9a-b, amplifier 904).
Regarding claim 21,
The method of claim 19, further comprising selectively coupling, via one or more switches (Fig. 9a-b, SW1 – SW4), at least the second input stage between the input of the amplifier and the output of the amplifier based on the operating mode (See paragraph [113], “In the 3G/4G mode, the switches SW1, SW2, SW5, and SW6 interposed between the capacitors C11 and C21 are on (i.e. closed) while the switches SW3, SW4, SW7, and SW8 interposed between the capacitors C11 and C12 and between C21 and C22 are off (i.e. opened). Accordingly, the capacitors operate in the corresponding filter blocks”).
Regarding claim 22,
The method of claim 21, wherein the one or more switches (Fig. 9a-b, SW1 – SW4) include a switch (Fig. 9a-b, SW8) coupled between an output of the first input stage and an output of the second input stage.
Regarding claim 23,
The method of claim 21, further comprising:
selectively coupling a load impedance (Fig. 9a-b, R21) of the amplifier between an output of the second input stage (Fig. 9a-b, stage 902) and the output of the amplifier based on the operating mode; and
selectively coupling an output stage (Fig. 9a-b, Iout and Qout) between the load impedance (Fig. 9a-b, R21) and the output of the amplifier based on the operating mode.
Regarding claim 24,
The method of claim 19, further comprising selectively enabling the first input stage and the second input stage based on the operating mode (See Fig. 7a-d, Mode1 – Mode4. See paragraphs [112] – [114], “Referring to FIG. 9A, the first OP AMP 902 is positioned in the first filter block 808a and connected to the two capacitors C11 and C21 in parallel. The second OP AMP 904 is positioned in the second filter block 808b and connected to the two capacitors C12 and C22 in parallel. The capacitor C11 is connected in parallel with the first OP AMP 902 by means of the switches SW1 and SW2, the switch SW3 is interposed between the input nodes of the capacitors C11 and C12, and the switch SW4 is interposed between the output nodes of the capacitors C11 and C12. Likewise, the capacitor C21 is connected in parallel with the second OP AMP 902 by means of the switches SW5 and SW6, the switch SW7 is interposed the input nodes of the capacitors C21 and C22, and the switch SW8 is interposed between the output nodes of the capacitors C21 and C22.
In the 3G/4G mode, the switches SW1, SW2, SW5, and SW6 interposed between the capacitors C11 and C21 are on (i.e. closed) while the switches SW3, SW4, SW7, and SW8 interposed between the capacitors C11 and C12 and between C21 and C22 are off (i.e. opened). Accordingly, the capacitors operate in the corresponding filter blocks.
Referring to FIG. 9B, in the 2G mode, the switches SW3, SW4, SW7, and SW8 interposed between the capacitors C11 and C12 and between the capacitors C21 and C22 of different filter blocks are on while the switches SW1, SW2, SW5, and SW6 interposed between the capacitors C11 and C21 of the first filter block 808a and the OP AMP 902 are off. Accordingly, the capacitors C11 and C21 operate in the state of being connected in parallel with the OP AMP 904 of the second filter block 808b other than the first filter block 808a. At this time, the OP AMP 904 of the first filter block 808a may be off to conserve the power. By controlling the other filter stages and capacitors of other filter blocks similarly depending on the communication mode, they can be shared in both the 2G mode and 3G/4G mode.”).
Regarding claim 25,
The method of claim 24, wherein:
the first input stage (Fig. 9a-b, stage 902. See paragraphs [107] – [108], “FIG. 8 is a circuit diagram illustrating a configuration of the analog baseband filter according to an embodiment of the present invention.
Referring to FIG. 8, the analog baseband filter includes four filter blocks 808a, 808b, 808c, and 808d; and the DRX I and Q signals and PRX Q and I signals are input to the input switching unit 806 via the respective frequency convertors 802 and amplifiers 804. The input switching unit 806 relays the input signals to at least two of the filter blocks 808a to 808d depending on the current communication mode under the control of a control unit (not shown). In the 3G/4G mode, the input switching unit 806 relays the 4 input signals to the four filter blocks 808a to 808d. In the 2G mode, the input switching unit 806 delivers the 2G I and Q signals input from the DRX RF unit through the DRX I and Q input nodes to the second and third filter blocks 808b and 808c, i.e., the 2G Q signal from the DRX RF Q unit to the second block 808b and the 2G I signal from the DRX RF I unit to the third filter block 808c. In another embodiment, in the 2G mode, the input switching unit 806 relays the 2G I and Q signals input from the PRX RF unit through the PRX I and Q input nodes to the second and third filter blocks 808b and 808c, i.e. the 2G Q signal from the PRX RF Q unit to the third filter block 808c and the 2G I signal from the PRX RF I unit to the second filter block 808b.”) includes a first tail current source (Fig. 9a-b, current from the control unit);
selectively enabling the first input stage (Fig. 9a-b, stage 902) comprises controlling the first tail current source (Fig. 9a-b, current from the control unit);
the second input stage (Fig. 9a-b, stage 904) includes a second tail current source (Fig. 9a-b, current from the control unit); and
selectively enabling the second input stage (Fig. 9a-b, stage 904) comprises controlling the second tail current source.
Regarding claim 26,
The method of claim 19, wherein selectively coupling the at least two feedback paths (Fig. 9a-b, path comprising C11 and path comprising C12) between the input of the amplifier and the output of the amplifier includes:
selectively coupling a first capacitive element (Fig. 9a-b, path comprising C11) in series between the input of the amplifier and the output of the amplifier; and
selectively coupling a second capacitive element (Fig. 9a-b, path comprising C12) in series between the input of the amplifier and the output of the amplifier.
Regarding claim 27,
The method of claim 26, wherein:
selectively coupling the first capacitive element (Fig. 9a-b, path comprising C11 and SW1) includes controlling a first switch (Fig. 9a-b, SW2) coupled between the input of the amplifier and the first capacitive element, and a second switch (Fig. 9a-b, SW2) coupled between the first capacitive element and the output of the amplifier; and
selectively coupling the second capacitive element (Fig. 9a-b, path comprising C12 and SW3) includes controlling a third switch (Fig. 9a-b, SW3) coupled between the input of the amplifier and the second capacitive element, and a fourth switch (Fig. 9a-b, SW4) coupled between the second capacitive element and the output of the amplifier.
Regarding Independent claim 28,
An apparatus for signal processing (See Fig. 9a-b), comprising:
means for determining an operating mode of a wireless device (See paragraph [4], “The baseband covers a very broad range including 100kHz bandwidth for the 2nd Generation (2G) communication system and 20MHz bandwidth for the 3rd Generation (3G) and 4th Generation (4G) communication system, and the broadest bandwidth is about 100 times the narrowest one. A multimode mobile terminal designed to operate in a 2G mode for voice communication and in a 3G or 4G mode (hereinafter, referred to as 3G/4G mode) has to have a multimode multiband radio transceiver equipped with an analog baseband filter capable of supporting various bandwidths as aforementioned”) having at least two feedback paths (Fig. 9a-b, path comprising C11 and path comprising C12) selectively coupled between an input of an amplifier and an output of the amplifier (Fig. 9a-b, inputs and outputs of amplifier ON); and
means for selectively coupling one or more of the at least two feedback paths (Fig. 9a-b, path comprising C11 and path comprising C12) between the input of the amplifier and the output of the amplifier based on the operating mode (Fig. 9a-b, 3G/4G mode and 2G mode. See paragraphs [113] – [114], “In the 3G/4G mode, the switches SW1, SW2, SW5, and SW6 interposed between the capacitors C11 and C21 are on (i.e. closed) while the switches SW3, SW4, SW7, and SW8 interposed between the capacitors C11 and C12 and between C21 and C22 are off (i.e. opened). Accordingly, the capacitors operate in the corresponding filter blocks.
Referring to FIG. 9B, in the 2G mode, the switches SW3, SW4, SW7, and SW8 interposed between the capacitors C11 and C12 and between the capacitors C21 and C22 of different filter blocks are on while the switches SW1, SW2, SW5, and SW6 interposed between the capacitors C11 and C21 of the first filter block 808a and the OP AMP 902 are off. Accordingly, the capacitors C11 and C21 operate in the state of being connected in parallel with the OP AMP 904 of the second filter block 808b other than the first filter block 808a. At this time, the OP AMP 904 of the first filter block 808a may be off to conserve the power. By controlling the other filter stages and capacitors of other filter blocks similarly depending on the communication mode, they can be shared in both the 2G mode and 3G/4G mode.”), the amplifier including:
a first input stage (Fig. 9a-b, stage 902) coupled between the input of the amplifier and the output of the amplifier; and
a second input stage (Fig. 9a-b, stage 904) selectively coupled between the input of the amplifier and the output of the amplifier.
Conclusion
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/JOSE E PINERO/Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843