Prosecution Insights
Last updated: April 19, 2026
Application No. 18/470,245

Oscillator Leakage Calibration

Non-Final OA §102§103
Filed
Sep 19, 2023
Examiner
KUNTZ, CURTIS A
Art Unit
2646
Tech Center
2600 — Communications
Assignee
Qualcomm Incorporated
OA Round
1 (Non-Final)
24%
Grant Probability
At Risk
1-2
OA Rounds
2y 4m
To Grant
39%
With Interview

Examiner Intelligence

Grants only 24% of cases
24%
Career Allow Rate
11 granted / 46 resolved
-38.1% vs TC avg
Moderate +15% lift
Without
With
+14.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
30 currently pending
Career history
76
Total Applications
across all art units

Statute-Specific Performance

§101
2.3%
-37.7% vs TC avg
§103
60.3%
+20.3% vs TC avg
§102
14.9%
-25.1% vs TC avg
§112
17.2%
-22.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 46 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . 2. The abstract of the disclosure is objected to because its more than 150 words. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b). Applicant is reminded of the proper content of an abstract of the disclosure. A patent abstract is a concise statement of the technical disclosure of the patent and should include that which is new in the art to which the invention pertains. The abstract should not refer to purported merits or speculative applications of the invention and should not compare the invention with the prior art. If the patent is of a basic nature, the entire technical disclosure may be new in the art, and the abstract should be directed to the entire disclosure. If the patent is in the nature of an improvement in an old apparatus, process, product, or composition, the abstract should include the technical disclosure of the improvement. The abstract should also mention by way of example any preferred modifications or alternatives. Where applicable, the abstract should include the following: (1) if a machine or apparatus, its organization and operation; (2) if an article, its method of making; (3) if a chemical compound, its identity and use; (4) if a mixture, its ingredients; (5) if a process, the steps. Extensive mechanical and design details of an apparatus should not be included in the abstract. The abstract should be in narrative form and generally limited to a single paragraph within the range of 50 to 150 words in length. See MPEP § 608.01(b) for guidelines for the preparation of patent abstracts. Election/Restrictions 3. Claims 24-30 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 1/29/26. Allowable Subject Matter 4. Examiner note: If the following changes in red were made to independent claims 1 and 21, claims 1-23 would be allowable over the art of record. Claim 1. An apparatus comprising: a mixer circuit comprising: a first stage comprising at least one transistor coupled between a mixer input and a mixer output; a second stage comprising one or more transistors coupled between the at least one transistor of the first stage and the mixer output, the one or more transistors coupled between a local oscillator signal input and the mixer output; and tuning circuitry coupled to the at least one transistor of the first stage; and calibration circuitry comprising: at least one resistor coupled between a power distribution node and at least one mixer node, the at least one mixer node coupled between the at least one transistor of the first stage and the one or more transistors of the second stage; at least one switch coupled between the power distribution node and the at least one mixer node; and controller circuitry coupled between the at least one mixer node and the tuning circuitry, wherein the calibration circuitry uses the tuning circuitry to adjust at least one bias voltage to reduce a DC current offset, which corresponds to a difference between currents flowing through the one or more transistors. Claim 21. An apparatus comprising: a mixer circuit comprising: a first stage comprising at least one transistor coupled between a mixer input and a mixer output; a second stage comprising one or more transistors coupled between the at least one transistor of the first stage and the mixer output; and means for tuning the at least one transistor of the first stage; and calibration circuitry comprising: at least one resistor coupled between a power distribution node and at least one mixer node, the at least one mixer node coupled between the at least one transistor of the first stage and the one or more transistors of the second stage; at least one switch coupled in series with the at least one resistor between the power distribution node and the at least one mixer node; and wherein the calibration circuitry uses the tuning circuitry to adjust at least one bias voltage to reduce a DC current offset, which corresponds to a difference between currents flowing through the one or more transistors. Claim Rejections - 35 USC § 102 5. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 6. Claims 1 and 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Gehring US 7660563 B2. 7. Consider claim 1. Gehring teaches an apparatus (fig 1) comprising: a mixer circuit (fig 1) comprising: a first stage (60 including Q13 as well) comprising at least one transistor (R5) coupled between a mixer input and a mixer output; a second stage (62 including Q14 as well) comprising one or more transistors (R6) coupled between the at least one transistor (R5) of the first stage and the mixer output (OUT1, OUT2), the one or more transistors coupled between a local oscillator signal input (VLO) and the mixer output; and tuning circuitry (64) coupled to the at least one transistor (R5) of the first stage (60); and calibration circuitry (66) comprising: at least one resistor (R7) coupled between a power distribution node (67) and at least one mixer node (N7), the at least one mixer node (N7) coupled between the at least one transistor (Q9) of the first stage (60) and the one or more transistors (Q11) of the second stage; at least one switch (Q16 acts a switch) coupled between the power distribution node (67) and the at least one mixer node (N7); and controller circuitry (14) coupled between the at least one mixer node (N7) and the tuning circuitry (64). Claim 21 is similar in scope and contains the same limitations and connections as applied in claim 1 and is rejected for the same reasons as stated above. Claim Rejections - 35 USC § 103 8. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 9. Claims 2 and 3 are rejected under 35 U.S.C. 103 as being unpatentable over Gehring US 7660563 B2. 10. Regarding claim 2. Gehring teaches the at least one switch (Q16) is coupled in series (through 60) with the at least one resistor (R5) between the power distribution node (67) and the at least one mixer node (N7). Gehring fails to teach and the at least one switch is coupled between the at least one resistor and the at least one mixer node. However, Gehring shows in fig 1 the mixer node (N7) between the switch (Q16) and resistor (R5). It would have been an obvious rearrangement of parts, before the effective date to move the switch in between the mixer node and resistor to ensure faster calibration of the mixer. 11. Regarding claim 3, Gehring teaches the controller circuitry (14) is coupled between the tuning circuitry (64) and another node (N8) that is coupled between the at least one switch (Q16) and the at least one resistor (R5 through R6 and 62). 12. Claims 9 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Gehring US 7660563 B2 in view of Examiner’s Official Notice. 13. Consider claim 9. Gehring fails to teach, wherein the at least one resistor comprises a plus resistor and a minus resistor. However, the examiner takes Official Notice that these are very well known in the art and would have been obvious, before the effective date, and without any claimed function, to exchange one well known type of resistors for another depending on the functioning of the circuit. 14. Regarding claim 20. Gehring discloses a mixer circuit (fig 1) and the calibration circuitry (16 and 66), he fails to explicitly teach in a wireless interface including a display screen; and at least one processor operatively coupled to the display screen, wherein the at least one processor configured to present one or more graphical images on the display screen based on one or more wireless signals communicated using the mixer circuit of the wireless interface device. However, in col 1, line 18 Gehring discloses his mixer circuit is used in wireless devices such as mobile phones. The examiner takes official notice that these well-known devices include wireless interfaces, processors and a display. It would have been obvious, before the effective date, to include the mixer calibration circuit in any well-known mobile device in order to more effectively down convert the received signal. 15. Claims 4-8, 10-19, 22 and 23 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. 16. Regarding claim 4. The prior art of record does not teach or make obvious wherein: the controller circuitry comprises a comparator having a first input and a second input; the first input of the comparator is coupled to the at least one mixer node; and the second input of the comparator is coupled to a node configured to provide a reference voltage. Dependent claims 5-8 are objected to since they depend upon claim 4. 17. Regarding claim 10. The prior art of record does not teach or make obvious, wherein: the at least one transistor of the first stage of the mixer circuit comprises a plus transistor and a minus transistor; and the controller circuitry is configured to: measure a plus voltage corresponding to the plus resistor and the plus transistor and a minus voltage corresponding to the minus resistor and the minus transistor; provide a control signal to the tuning circuitry; and adjust the control signal based on the plus voltage and the minus voltage. Dependent claim 11 is objected to since it depends upon claim 10. 18. Regarding claim 12. The prior art of record does not teach or make obvious, wherein: the controller circuitry comprises at least one analog-to-digital converter having at least one input, the at least one input of the analog-to-digital converter coupled to the plus resistor and the minus resistor. 19. Regarding claim 13. The prior art of record does not teach or make obvious, wherein: the tuning circuitry comprises at least one bias voltage generator; the at least one transistor of the first stage comprises a gate terminal; and the at least one bias voltage generator of the tuning circuitry is coupled to the gate terminal of the at least one transistor of the first stage. Dependent claims 14 and 15 are objected to since they depend upon claim 13. 20. Regarding claim 16. The prior art of record does not teach or make obvious wherein: the tuning circuitry comprises at least one bias voltage generator, the at least one bias voltage generator comprising: one or more current sources coupled between first and second power distribution nodes; and one or more resistors coupled in series with the one or more current sources between the first and second power distribution nodes. Dependent claims 17 and 18 are objected to since they depend upon claim 16. 21. Regarding claim 19. The prior art of record does not teach or make obvious wherein: the at least one transistor of the first stage comprises a plus first transistor and a minus first transistor; the one or more transistors of the second stage comprise a plus second transistor and a minus second transistor; the at least one mixer node comprises a plus mixer node and a minus mixer node, the plus mixer node coupled between the plus first transistor and the plus second transistor, the minus mixer node coupled between the minus first transistor and the minus second transistor; and the at least one switch comprises a plus switch and a minus switch, the plus switch coupled in series with the at least one resistor between the power distribution node and the plus mixer node, the minus switch coupled in series with the at least one resistor between the power distribution node and the minus mixer node. 22. Regarding claim 22. The prior art of record does not teach or make obvious, wherein: the at least one transistor of the first stage comprises a plus transistor and a minus transistor; the at least one voltage comprises a plus voltage corresponding to the plus transistor and a minus voltage corresponding to the minus transistor; and the means for controlling comprises means for controlling the means for tuning based on the plus voltage and the minus voltage. Dependent claim 23 is objected to since it depends upon claim 22. 23. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Lee et al US 2006/0094395 teaches a scheme to provide local oscillator feedthrough offset cancellation to remove baseband and radio frequency coupled offsets. Two separate offset cancellation currents are injected at a driver which drives a baseband signal into a mixer to mix with a local oscillator signal. One offset cancellation current cancels a baseband local oscillator feedthrough offset, while the other offset cancellation current cancels a radio frequency local oscillator feedthrough offset. Simmonds 2014/0079157 A1 teaches an apparatus includes a frequency mixer circuit configured to generate a baseband signal based on a local oscillator signal and a radio frequency signal. The apparatus includes a compensation circuit configured to generate a DC offset-compensated signal based on the baseband signal, a DC offset compensation signal, and a second signal. The DC offset compensation signal and the second signal have currents approximately equal in magnitude and opposite in direction. A current of the DC offset-compensated signal is substantially the same as a current of the baseband signal. The compensation circuit may include a DC digital-to-analog converter circuit configured to generate the DC offset compensation signal and the second signal based on a control signal. Chakraborty et al US 2024/0162921 A1 teaches a device comprises a radio frequency (RF) signal generator and a calibration system. The RF signal generator is configured to upconvert a baseband signal to an RF signal using first and second LO signals. The RF signal generator comprises first and second signal paths to process first and second differential signals. The calibration system comprises calibration control circuitry and actuator circuitry. In response to digital control signals generated by the calibration control circuitry, the actuator circuitry is configured to: inject currents into the first and second signal paths to adjust offsets of the first and second differential signals, and to balance amplitudes of the first and second differential signals; and adjust at least one of respective duty cycles of the first and second local oscillator signals, and a phase difference between the first and second local oscillator signals. Ng et al 7521981 B2 teaches a mixer circuit comprises a double-balanced mixer and a carrier-leakage calibration cell. The double-balanced mixer has first and second input pairs whereby the first input pair receives the first differential input signal. The carrier-leakage calibration cell receives the second differential input signal and a differential calibration current and generates first and second output voltages to the second input pair of the double-balanced mixer. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CURTIS A KUNTZ whose telephone number is (571)272-7499. The examiner can normally be reached on Mon-Thur 530am to 330pm and Fri from 530am to 10am. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew D Anderson, can be reached at telephone number 5712724177. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from Patent Center. Status information for published applications may be obtained from Patent Center. Status information for unpublished applications is available through Patent Center to authorized users only. Should you have questions about access to the USPTO patent electronic filing system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). Examiner interviews are available via a variety of formats. See MPEP § 713.01. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) Form at https://www.uspto.gov/InterviewPractice. /CURTIS A KUNTZ/Primary examiner, Art Unit 2646
Read full office action

Prosecution Timeline

Sep 19, 2023
Application Filed
Feb 14, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12591168
DISASSEMBLY AND ASSEMBLY COMPONENT AND ELECTRONIC DEVICE KIT
2y 5m to grant Granted Mar 31, 2026
Patent 12581001
MOBILE TERMINAL
2y 5m to grant Granted Mar 17, 2026
Patent 12580595
COMMUNICATION CONTROL APPARATUS AND COMMUNICATION CONTROL METHOD
2y 5m to grant Granted Mar 17, 2026
Patent 12562758
BLUETOOTH CHIP, SIGNAL RECEIVING METHOD, AND BLUETOOTH COMMUNICATIONS APPARATUS
2y 5m to grant Granted Feb 24, 2026
Patent 12489474
RF TRANSCEIVER
2y 5m to grant Granted Dec 02, 2025
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
24%
Grant Probability
39%
With Interview (+14.8%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 46 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month