DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Claims 1-3, 5, 7, 9 and 10-11 still pending.
Claims 4, 6 and 8 were canceled.
Claim 1 and 5 were amended.
Response to Arguments
Applicant's arguments filed on 12/31/2025 have been fully considered but they are not persuasive. Arguments or statement that including only the subject matter of claim 8 into claim 1 is similar to amend the claim 1 to include the subject matter is incorrect. The Office Action filed on 10/8/2025 stablishes that it would be allowable if claim 8 is written in independent form including all of the limitations of the base claim and any intervening claims (emphasis added). Applicant fail to include all of the limitation of the base claim 1 and the intervening claim 5.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 is rejected under 35 U.S.C. 103 as being unpatentable over Camenizki et. al. CN Document 102075086 (Camenizki) in view Oohasi et. al. CN Document 101228048 (Oohasi).
[AltContent: textbox (TV)][AltContent: arrow][AltContent: arrow][AltContent: textbox (Dt)][AltContent: arrow][AltContent: textbox (Vfb)][AltContent: arrow][AltContent: textbox (Amp)][AltContent: textbox (Vout)][AltContent: arrow]
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Regarding claim 1, Camenizki discloses a state detection device (see Fig. 1), which is disposed in a power supply circuit including a feedback control unit (see added reference character Amp for purpose of explanation) (Fig. 1) configured to perform a feedback control based on a difference between a feedback voltage (for example see Vfb reference character added for purpose of explanation) (Fig.1) corresponding to an output voltage (i.e., Vout) (Fig. 1) and a reference voltage (i.e., Vref) (Fig. 1) and an output capacitor (i.e., C1) (Fig. 1) configured to smooth the output voltage (i.e., Vout) (Fig. 1), the state detection device configured to detect a state of the output capacitor (i.e., C1) (Fig. 1) and comprising: a target value varying unit ( i.e., T1) (see Fig. 1 and paragraph 3 of the Machine Translation), configured to increase a target value (Camenizki discloses periodically change the value of the resistance voltage divider and the feedback voltage) (Fig. 1) of the output voltage (i.e., Vout) (Fig. 1); and a detector (i.e., Dt) (Fig. 1), configured to detect the state of the output capacitor (i.e., C1) (Fig. 1) based on a change in the output voltage while the output capacitor (i.e., C1) (Fig. 1) is charged when the target value of the output voltage increases; or while the output capacitor is discharged after the target value of the output voltage increases.
Camenizki fail to disclose “a current sensor configured to monitor a discharge current or a charge current of the output capacitor, wherein the detector is further configured to detect a capacitance the output capacitor based on a monitor result of the current sensor.”
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Oohasi in the same field of endeavor discloses a current sensor (i.e., 17b) (Fig. 1) configured to monitor a discharge current or a charge current of the output capacitor (i.e., 11) ( Fig. 1) , wherein the detector (i.e., 15) (Fig. 1) is further configured to detect a capacitance the output capacitor (i.e., 11) ( Fig. 1) based on a monitor result of the current sensor (i.e., 17b) ( Fig. 1) in order to identify degradation of the capacitor output.
Therefore, It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have optionally provide a current sensor configured to monitor a discharge current or a charge current of the output capacitor, wherein the detector is further configured to detect a capacitance the output capacitor based on a monitor result of the current sensor in Camenizki, as taught by Oohasi, in order to identify degradation of the capacitor output.
Claims 1-3 and 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by is rejected under 35 U.S.C. 103 as being unpatentable over Katsuki US Patent 9599644 (Katsuki) in view Oohasi et. al. CN Document 101228048 (Oohasi).
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Regarding claim 1, Katsuki discloses a state detection device (i.e., 1 or 11) (Fig. 1 or Fig. 4), which is disposed in a power supply circuit (for example see abstract) including a feedback control unit configured to perform a feedback control based on a difference between a feedback voltage corresponding to an output voltage (for example see voltage generate at terminal VD) (Fig. 4) and a reference voltage (for example threshold Lower limit voltage at the detection circuit 6 – see column 3, lines38-42) (see Fig. 1) and an output capacitor (i.e., 8) (Fig. 1 or Fig. 4) configured to smooth the output voltage (for example see voltage generate at terminal VD) (Fig. 4), the state detection device (i.e., 1 or 11) (Fig. 1 or Fig. 4) configured to detect a state of the output capacitor (i.e., 8) (Fig. 1 or Fig. 4) and comprising:
a target value varying unit (i.e., 2) (Fig. 1 or Fig. 4), configured to increase a target value (Katsuki discloses the current load is increase or decrease the load current which reflect in a temporary increasing or decreasing the output voltage) (for example see column 9, lines 10-20) of the output voltage (i.e., 8) (Fig. 1 or Fig. 4),
a detector (i.e., 6) (Fig. 1 or Fig. 4), configured to detect the state of the output capacitor (i.e., 8) (Fig. 1 or Fig. 4) based on a change in the output voltage while the output capacitor (i.e., 8) (Fig. 1 or Fig. 4) is charged when the target value of the output voltage increases; or while the output capacitor is discharged after the target value of the output voltage increases.
Katsuki fails to disclose “a current sensor configured to monitor a discharge current or a charge current of the output capacitor, wherein the detector is further configured to detect a capacitance the output capacitor based on a monitor result of the current sensor.”
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Oohasi in the same field of endeavor discloses a current sensor (i.e., 17b) (Fig. 1) configured to monitor a discharge current or a charge current of the output capacitor (i.e., 11) ( Fig. 1) , wherein the detector (i.e., 15) (Fig. 1) is further configured to detect a capacitance the output capacitor (i.e., 11) ( Fig. 1) based on a monitor result of the current sensor (i.e., 17b) ( Fig. 1) in order to identify degradation of the capacitor output.
Therefore, It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have optionally provide a current sensor configured to monitor a discharge current or a charge current of the output capacitor, wherein the detector is further configured to detect a capacitance the output capacitor based on a monitor result of the current sensor in Katsuki, as taught by Oohasi, in order to identify degradation of the capacitor output.
Regarding claim 2, Katsuki in view of Oohasi, more particularly Katsuki discloses that after the target value of the output voltage increases from a first value (Katsuki discloses increasing or decreasing the output voltage during the time of the diagnosis and after the diagnosis in completed and no malfunction is detected returns to operational state), the detector (i.e., 6) (Fig. 1 or Fig. 4) is configured to return the target value of the output voltage (i.e., voltage at the terminal Vd) (Fig. 1 or Fig. 4) to the first value (operational value).
Regarding claim 3, Katsuki in view of Oohasi fails to disclose wherein after the target value of the output voltage increases from the first value, the detector is configured to decrease the target value of the output voltage to a value less than the first value and then return the target value of the output voltage to the first value.
However, Katsuki, as applied in linking claims, discloses increasing or decreasing the voltage during the time of diagnosis. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have optionally provide after the target value of the output voltage increases from the first value, the detector is configured to decrease the target value of the output voltage to a value less than the first value and then return the target value of the output voltage to the first value in Katsuki in view of Oohasi since increasing and decreasing the output voltage at the capacitor during the diagnosis time is used for detecting malfunction of the capacitor.
Regarding claim 7, Katsuki in view of Oohasi, as applied in linking claims, , more particularly Katsuki discloses the detector (i.e., 6) (Fig. 1 or Fig. 4) is configured to perform a periodic detection and detect the state of the output capacitor based on a history of detection result (for example see column 6 lines 48-57).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Katsuki US Patent 9599644 (Katsuki) in view Oohasi et. al. CN Document 101228048 (Oohasi). And in further view of Ikeda et. al. US Patent 9097747 (Ikeda).
Regarding claim 5, Katsuki in view of Oohasi, as applied in linking claims discloses the claimed invention but fails to disclose wherein the detector is configured to detect the state of the output capacitor based on a discharge time for the output voltage to reach a second threshold voltage less than a first threshold voltage from the first threshold voltage.
Ikeda, , in the same field of endeavor, discloses the detector (i.e., 15) (Fig. 1) is configured to detect the state of the output capacitor (i.e., 11) (Fig. 1) based on a discharge time for the output voltage to reach a second threshold voltage (i.e., VL) (Fig. 2) less than a first threshold voltage (i.e., VH) (Fig. 2) from the first threshold voltage (i.e., VH) (Fig. 2) in order to determined that the capacitor is deteriorated.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have optionally provide a detector configured to detect the state of the output capacitor based on a discharge time for the output voltage to reach a second threshold voltage less than a first threshold voltage from the first threshold voltage in Katsuki in view of Oohasi, as taught Ikeda since that process is used to determine if a capacitor is deteriorated.
Claims 9 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Katsuki US Patent 9599644 (Katsuki) in view Oohasi et. al. CN Document 101228048 (Oohasi). And in further view of Hayashi et. al. US Patent 9600005 (Hayashi).
Regarding claim 9, Katsuki in view of Oohasi, as applied in linking claims discloses the claimed invention but fails to disclose a semiconductor integrated circuit device, comprising: the state detection device and at least a part of the power supply circuit.
Hayashi, in the same field of endeavor, discloses semiconductor integrated (i.e., 1) (Fig. 23) circuit device, comprising: the state detection device and at least a part of the power supply circuit (i.e., 1) (Fig. 23) mounted in vehicles for stabilizing power supply circuits.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have optionally provide a semiconductor integrated circuit device, comprising: the state detection device and at least a part of the power supply circuit in Katsuki in view of Oohasi, as taught Hayashi, in order to stabilize power supply circuits.
Regarding claim 11, Hayashi, as mentioned above discloses a vehicle (i.e., 27) (Fig. 25), comprising the semiconductor integrated circuit device (i.e., 10) (Fig. 23).
Allowable Subject Matter
Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 10, the prior art of record, as applied above fail to disclose, alone or combination, an internal circuit, configured to receive the output voltage; and an RC circuit, including a resistor and the output capacitor, wherein: the detector of the state detection device is configured to detect the state of the output capacitor based on the change in the output voltage during a constant discharge time the detector of the state detection device is configured to detect the state of the output capacitor based on the change in the output voltage during a constant discharge time the internal circuit is configured to be in a stop state during the discharge time, and the detector is configured to detect a capacitance of the output capacitor based also on a time constant of the RC circuit in combination with all the limitations of intervening claims.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/YAHVEH COMAS TORRES/Examiner, Art Unit 2838
/THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838