Prosecution Insights
Last updated: July 17, 2026
Application No. 18/470,920

ANTENNA VOLTAGE STANDING WAVE RATIO (VSWR)-TOLERANT TRANSMISSION POWER AMPLIFIER

Non-Final OA §103
Filed
Sep 20, 2023
Examiner
SOROWAR, GOLAM
Art Unit
2641
Tech Center
2600 — Communications
Assignee
Qualcomm Incorporated
OA Round
2 (Non-Final)
81%
Grant Probability
Favorable
2-3
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
727 granted / 893 resolved
+19.4% vs TC avg
Strong +18% interview lift
Without
With
+17.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
46 currently pending
Career history
935
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
86.4%
+46.4% vs TC avg
§102
7.2%
-32.8% vs TC avg
§112
3.1%
-36.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 893 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed 04/08/2026 have been fully considered but they are not persuasive. Regarding claim 1, Applicant argues that (pages 8-9): As noted above, the Office rejected claim 1 as allegedly being obvious in view of the combination of Kawasaki and Jeon. Applicant respectfully submits that Kawasaki and Jeon each fails to teach or suggest "calculating, using the control circuitry, a gain value for the output Tx power amplifier using the input power and the output power," as recited in claim 1. Kawasaki describes a "determination unit that determines whether or not a gain of a power amplifier varies based on a monitor value of input power from a driver amplifier.” Kawasaki, at Abstract. In particular. Kawasaki describes the "the load determination circuit 12 reads the reference value of the input power monitor value from the load variation lookup table 11" and the "the input power monitor value inputted by the input power monitor circuit 2." Kawasaki, para. [0069]. Further, "the load determination circuit 12 determines whether or not the input power monitor value varies from the reference value." Kawasaki, para. [0069]. In other words, Kawasaki determines if the input power varies when compared to the LUT. The output power is also monitored this way. For example, "the APC 82 reads the reference value of the output power monitor value at the reference temperature, and the reference table" based on the bias voltage and then "the APC 82 reads the output power monitor value." Kawasaki, para. [0073]. Then, "the APC 82 determines whether or not the output power monitor value varies from the reference value that is read." Kawasaki, para. [0074]. Kawasaki describes making Boolean determinations that output power varies at different points in the TX path in the PA. But Kawasaki does not teach or suggest "calculating, using the control circuitry, a gain value for the output Tx power amplifier using the input power and the output power," as recited in claim 1. For example, Kawasaki does not ever determine a gain value based on the measurements of the load determination circuit 12 and the APC 82. Jeon is related to a "temperature compensation circuit comprises a bias voltage node for providing a bias voltage to the power amplifier. Jeon, at Abstract. Jeon includes additional resistors to reduce "variation in resistance of the temperature sensor" and "divid[e] the regulated voltage to generate the bias voltage." Jeon, at Abstract. However, Jeon also does not teach or suggest "calculating, using the control circuitry, a gain value for the output Tx power amplifier using the input power and the output power," as recited in claim 1. For at least the reasons discussed above, Applicant respectfully submits that the combination of Kawasaki and Jeon fails to disclose or make obvious all features of claim 1. The Ranta, Shafer, Karoui, and Paul reference, alone or in combination with Kawasaki and Jeon, also fail to describe or make obvious the features of claim 1, and were not used in such a manner. Therefore, it is respectfully submitted that claim 1 is in condition for allowance. Accordingly, reconsideration of independent claim 1 and withdrawal of the rejections under 35 U.S.C. § 103 are requested. Examiner respectfully disagrees for the following reason: Applicant argues that Kawasaki and Jeon each fail to teach or suggest “calculating, using the control circuitry, a gain value for the output Tx power amplifier using the input power and the output power,” as recited in claim 1. Applicant further argues that Kawasaki merely makes Boolean determinations that monitored values vary from reference values and does not determine a gain value based on the measurements of the load determination circuit 12 and the APC 82. This argument is not persuasive. Kawasaki expressly explains that the input power monitor comparison is used to determine that “the gains of the power amplifier 5 and the driver amplifier 7 are varied.” See Kawasaki, para. [0070]. In particular, Kawasaki discloses that the load determination circuit 12 reads a reference value of the input power monitor value from the load variation lookup table 11 and reads the input power monitor value inputted by the input power monitor circuit 2. See Kawasaki, para. [0069]; Fig. 7A. Kawasaki then determines whether the input power monitor value varies from the reference value. See Kawasaki, para. [0070]; Fig. 7A. Kawasaki further explains that, when the input power monitor value varies, “it is determined that the gains of the power amplifier 5 and the driver amplifier 7 are varied due to an external factor such as a temperature change.” See Kawasaki, para. [0070]. Thus, Kawasaki's input-power determination is not merely an unrelated Boolean determination. Rather, Kawasaki uses the monitored input power value to determine whether the gains of the power amplifier 5 and driver amplifier 7 have varied. Kawasaki further discloses using an output power monitor value in determining the gain condition of the amplifier. In Fig. 7B, Kawasaki reads a reference table, reads an output voltage monitor value, and determines whether the monitor value is large, small, or invariant. Kawasaki explains that, when the output power monitor value is larger than the reference value, “it is determined that the gains of the power amplifier 5 and the driver amplifier 7 become large." Sec Kawasaki, para. [0075]; Fig. 7B. Kawasaki also explains that, when the output power monitor value is smaller than the reference value, “the gains of the power amplifier 5 and the driver amplifier 7 become small.” See Kawasaki, para. [0076]; Fig. 7B. Kawasaki then obtains a correction value and adds that correction value to the bias voltage of the driver amplifier 7. See Kawasaki, para. [0077]. Kawasaki also discloses, in connection with Fig. 7C, that the PA bias control circuit 13 reads the PA bias lookup table 14 and reads the output power monitor value. See Kawasaki, para. [0079]; Fig. 7C. Kawasaki determines whether the output power monitor value varies from the previous output power monitor value. Sec Kawasaki, para. [0080]. If the output power monitor value varies, Kawasaki expressly states that “a variation of the gain of the power amplifier 5 is determined.” See Kawasaki, para. [0081]. Kawasaki then acquires the PA bias voltage corresponding to the change amount of the output power monitor value from the PA bias lookup table 14 and supplies the PA bias voltage to the power amplifier 5. See Kawasaki, para. [0081]. Accordingly, Kawasaki teaches determining a gain condition or gain variation of the power amplifier using monitored power information, including the input power monitor value and the output power monitor value. The fact that Kawasaki performs comparisons relative to reference values and lookup tables does not take the disclosure outside the scope of the claim. Claim 1 does not require a particular mathematical formula, does not require the gain value to be expressed in decibels, and does not require the reference to use the exact phrase “gain value.” Under a broadest reasonable interpretation, calculating a gain value encompasses determining a gain-related value, gain condition, or gain variation of the amplifier using monitored input and output power information. Applicant's argument that Kawasaki only makes Boolean determinations is also not persuasive because the determinations in Kawasaki are expressly tied to amplifier gain. Kawasaki does not merely determine that a signal changed. Rather, Kawasaki determines, based on the input power monitor value, that the gains of the power amplifier 5 and driver amplifier 7 are varied. See Kawasaki, para. [0070]. Kawasaki further determines, based on the output power monitor value, whether the gains become large or small. See Kawasaki, paras. [0075]-[0076]. Kawasaki also determines, based on variation of the output power monitor value, that a variation of the gain of the power amplifier 5 is present. See Kawasaki, para. [0081]. Therefore, Kawasaki's determinations correspond to gain-related determinations based on monitored power values. With respect to Jeon, Applicant's argument is also not persuasive because the rejection does not rely on Jeon for the limitation of “calculating, using the control circuitry, a gain value for the output Tx power amplifier using the input power and the output power.” The rejection relies on Kawasaki for that feature. Jeon is relied upon as the secondary reference for the limitation directed to “sampling a thermistor signal to determine a junction temperature associated with the output power.” Thus, Applicant's assertion that Jeon does not teach calculating a gain value using input power and output power does not address the actual basis of the rejection. In view of the above, Kawasaki teaches or at least suggests calculating or determining a gain value, gain condition, or gain variation for the output Tx power amplifier using the input power and output power information, and Jeon is relied upon for the thermistor/junction-temperature limitation. Therefore, Applicant's arguments do not overcome the rejection. Accordingly, the rejection of independent claim I under 35 U.S.C. § 103 over Kawasaki in view of Jeon is maintained. Regarding claim 1, Applicant argues that (pages 10-11): As noted above, the Office rejected claim 11 as allegedly being obvious in view of the combination of Kawasaki, Jeon, and Paul. Applicant respectfully submits that Kawasaki, Jeon, and Paul each fails to teach or suggest "calculating, using the control circuitry, a gain value for the output Tx power amplifier using the input power and the output power," as recited in claim 11. As noted above in connection with claim 1, Kawasaki and Jeon does not teach or suggest "calculating, using the control circuitry, a gain value ... using the input power and the output power," as recited in claim 11. Paul describes "enabling and disabling the parallel power amplifiers and combining their outputs, a desired output power can be realized, while choosing a combination of power amplifiers." Paul, at Abstract. Paul appears to be related to amplifiers with different input impedances, but does not describe features that correspond to "calculating, using the control circuitry, a gain value for the Cascode sliced output Tx power amplifier using the input power and the output power," as recited in claim 11. For at least the reasons discussed above, Applicant respectfully submits that the combination of Kawasaki, Jeon, and Paul fails to disclose or make obvious all features of claim 11. The Ranta, Shafer, Karoui references, alone or in combination with Kawasaki, Jeon, and Paul, also fail to describe or make obvious the features of claim 11, and were not used in such a manner. Therefore, it is respectfully submitted that claim 11 is in condition for allowance. Accordingly, reconsideration of independent claim 11 and withdrawal of the rejections under 35 U.S.C. § 103 are requested. Examiner respectfully disagrees for the following reason: Applicant’s arguments with respect to independent claim 11 have been fully considered but are not persuasive. Applicant argues that Kawasaki, Jeon and Paul fail to teach or suggest “calculating, using the control circuitry, a gain value for the output power”, as recited in claim 11. This argument is not persuasive for at least the same reason discussed above with respect to independent claim 1. As explained above, Kawasaki teaches or at least suggest determining a gain condition or gain variation of the amplifier using monitored input power and output power information. Further, Applicant’s arguments regarding Paul does not address the actual basis of the rejection. The rejection does not rely on Paul for the limitation of “calculating, using the control circuitry, a gain value for the output Tx power amplifier using the input power and the output power.” Rather, Kawasaki is relied upon for that limitation. Paul is relied upon for the features directed to “a cascode sliced output Tx power amplifier and adjust a gain bit setting for the Cascode sliced output Tx power amplifier when the gain value has more than a threshold difference from the temperature calibrated reference gain value”. Similarly, Jeon is relied upon for the feature “sampling a thermistor signal to determine a junction temperature associated with the output power”. According, because Kawasaki teaches or at least suggest the gain-value limitation for the reason already discussed with respect to claim 1 and because Paul and Jeon are relied upon for different claim features, Applicant’s arguments do not overcome the rejection of the independent claim 11. Therefore, the rejection of independent claim 11 under 35 USC § 103 is maintained. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Kawasaki et al. (US 20140118068, hereinafter “Kawasaki”), and further in view of Jeon et al. (US 20020097095, hereinafter “Jeon”). Regarding claim 1, Kawasaki discloses, A method of operating a wireless communication apparatus (i.e., transceiver 100; Fig. 4), comprising: setting, using control circuitry of the wireless communication apparatus ([0046]-[0049]: The driver amplifier 7 is an amplifier capable of adjustment of a gain. By adjusting a gain of the driver amplifier 7, transmission power of the transceiver 100 can be adjusted to a desired value. The driver control circuit 8 controls a bias voltage of the driver amplifier 7. The driver control circuit 8 includes a TPC 81 and an APC 82, and controls the bias voltage of the driver amplifier 7 thereby), a mission mode for an output transmission (Tx) power amplifier ([0046]-0050] describes execution of control processing while the power amplifier is operating to transmit signals, which corresponds to the claimed “mission mode”); measuring, using an output power detector (output power monitor 3; Fig. 4), an output power of the output Tx power amplifier operating in the mission mode ([0055]-[0059]: when the output power monitor value becomes small, it is determined that the temperature rises, and the gain is reduced, and in order to increase the output power of the driver amplifier 7 and the power amplifier 5, the correction value becomes a larger value. When the output power monitor value becomes large, it is determined that the temperature is lowered and the gain is increased, and in order to decrease the output power of the driver amplifier 7 and the power amplifier 5, the correction value becomes a smaller value); measuring, using an input power detector, an input power to the output Tx power amplifier associated with the output power ([0053]-[0057]: in the transceiver 100, the gain variation due to the external factor such as a temperature change is detected by detecting the variation of the output power from the driver amplifier 7, that is, the input power monitor value. When the input power monitor value varies from the reference value stored in the load variation lookup table 11, it is detected that the gains of the driver amplifier 7 and the power amplifier 5 are varied by the temperature varying from the reference temperature.); calculating, using the control circuitry, a gain value for the output Tx power amplifier using the input power and the output power ([0069]-[0071] and [075]-[0081]: the load determination circuit 12 determines whether or not the input power monitor value varies from the reference value. If the input power monitor value varies from the reference value (OP3: Yes), the processing shifts to control processing of the bias voltage of the driver amplifier 7 by the APC 82 that is illustrated in FIG. 7B. This is because as a result that the input power monitor value is varied, it is determined that the gains of the power amplifier 5 and the driver amplifier 7 are varied due to an external factor such as a temperature change…..In OP 21, the PA bias control circuit 13 reads the PA bias lookup table 14. In OP 22, the PA bias control circuit 13 reads the output power monitor value from, for example, the buffer for the output power monitor value, If the output power monitor value varies from the output power monitor value of the previous time (OP 23: Yes), a variation of the gain of the power amplifier 5 is determined. In this case, the processing proceeds to OP 24, and the PA bias control circuit 13 performs control of the PA bias voltage); comparing, using the control circuitry, the gain value with a temperature calibrated reference gain value selected using the junction temperature ([0070]-[0071]: In OP3, the load determination circuit 12 determines whether or not the input power monitor value varies from the reference value. If the input power monitor value varies from the reference value (OP3: Yes), the processing shifts to control processing of the bias voltage of the driver amplifier 7 by the APC 82 that is illustrated in FIG. 7B. This is because as a result that the input power monitor value is varied, it is determined that the gains of the power amplifier 5 and the driver amplifier 7 are varied due to an external factor such as a temperature change.); and adjusting a power amplifier bias when the gain value is different from the temperature calibrated reference gain value ([0075]-0076]: ] If the output power monitor value is larger than the reference value (OP13: larger), the processing proceeds to OP 14. If the output power monitor value is larger than the reference value, the temperature becomes lower than the reference temperature, and it is determined that the gains of the power amplifier 5 and the driver amplifier 7 become large. Therefore, the bias voltage of the driver amplifier 7 is controlled to be small so that the output power of the power amplifier 5 and the driver amplifier 7 becomes small. Accordingly, in OP 14, the APC 82 obtains the correction value that is a smaller value, from the reference table. Thereafter, the processing proceeds to OP 16. If the output power monitor value is smaller than the reference value (OP13: smaller), the processing proceeds to OP 15. If the output power monitor value is smaller than the reference value, it is determined that the temperature becomes higher than the reference temperature, and the gains of the power amplifier 5 and the driver amplifier 7 become small. Therefore, the bias voltage of the driver amplifier 7 is controlled to be large so that the output power of the power amplifier 5 and the driver amplifier 7 becomes large.) However, Kawasaki does not disclose, sampling a thermistor signal to determine a junction temperature associated with the output power. In the same field of endeavor, Jeon discloses, sampling a thermistor signal to determine a junction temperature associated with the output power (Referring to FIG. 6, Vref denotes a bias voltage node used to provide a bias voltage to a bias circuit of the power amplifier. The bias voltage is about 2.6-3.2 V according to the type of the power amplifier. Further, Vt denotes an output node of a voltage regulator, TH denotes a temperature sensor comprised of a thermistor, and C denotes a bypass capacitor, [0032]-[0037]). Therefore, it would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify Kawasaki by specifically providing sampling a thermistor signal to determine a junction temperature associated with the output power, as taught by Jeon for the purpose of provide a temperature compensation circuit for a power amplifier that is capable of stabilizing a variation in current of a bias circuit [0018]. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Kawasaki, in view of Jeon and further in view of Ranta et al. (US 20190173433, hereinafter “Ranta”). Regarding claim 2, the combination of Kawasaki and Jeon discloses everything claimed as applied above (see claim 1), however the combination of Kawasaki and Jeon does not disclose, wherein adjusting the power amplifier bias comprises: incrementing a counter that used to generate the power amplifier bias when the gain value is above the temperature calibrated reference gain value; and decrementing the counter when the gain value is below the temperature calibrated reference gain value. In the same field of endeavor, Ranta discloses, wherein adjusting the power amplifier bias comprises: incrementing a counter that used to generate the power amplifier bias when the gain value is above the temperature calibrated ([0039]-[0040]: The invention encompasses temperature compensation circuits that adjust one or more circuit parameters of a power amplifier (PA) to maintain approximately constant Gain versus time during pulsed operation sufficient to substantially offset self-heating of the PA.) reference gain value; and decrementing the counter when the gain value is below the temperature calibrated reference gain value ([0067]-[0070]: the differential voltage sum from the summing circuit 708 (i.e., plus-voltage less minus-voltage) is applied to the comparators 710a, 710b. While the Up-Down counter 712 is enabled (e.g., the HOLD signal=0), if the sum is greater than +Vref, the Up-Down counter 712 counts UP; conversely, if the sum is less than −Vref, the Up-Down counter 712 counts DOWN. The digital output of the Up-Down counter 712 is converted back to an analog signal by the DAC 714). Therefore, it would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the combination of Kawasaki and Jeon by specifically providing wherein adjusting the power amplifier bias comprises: incrementing a counter that used to generate the power amplifier bias when the gain value is above the temperature calibrated reference gain value; and decrementing the counter when the gain value is below the temperature calibrated reference gain value, as taught by Ratna for the purpose of controlling a power amplifier circuit to maintain approximately constant Gain versus time during pulsed operation sufficient to substantially offset self-heating of the power amplifier [0010]. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Kawasaki, in view of Jeon and further in view of Shafer et al. (US 20130049735, hereinafter “Shafer”). Regarding claim 4, the combination of Kawasaki and Jeon discloses everything claimed as applied above (see claim 1), however the combination of Kawasaki and Jeon does not disclose, estimating a voltage standing wave ratio (VSWR) value using the input power and the output power; and signaling a power back-off of the output Tx power amplifier based on the VSWR value exceeding a threshold value, without using a peak detector measurement for the signaling of the power back-off. In the same field of endeavor, Shafer discloses, estimating a voltage standing wave ratio (VSWR) value using the input power and the output power ([0005]-[0006]: Shafer explains VSWR and reflected power including equations for the reflection coefficient and VSWR; the load that is connected to a signal source will reflect some of the source power. To get full transfer of power to a "load" (e.g., an antenna) from an RF signal source, the load impedance should be equal to the source impedance, which in practice is normally 50.OMEGA. (ohms). If the load impedance is different from the source impedance, a portion of the transmitted power will be reflected back. ); and signaling a power back-off of the output Tx power amplifier based on the VSWR value exceeding a threshold value ([0034]-[0037]: The process 180 shown in FIG. 3 illustrates example steps for performing a calibration process. As an example, the calibration process 180 may comprise connecting a known 50.OMEGA. load (block 182), and measuring the output of the peak detector 118 for a plurality of test pulses transmitted at a lower power, blocks 184 and 186. Measurements may be taken for phase lengths between 0 and 180 degrees (using suitable steps, e.g., 10 degrees, or the like)), without using a peak detector measurement for the signaling of the power back-off ([0024]-[0027]: The voltage divider 102 scales down the drain voltage at node 22 approximately 17:1 to match an input dynamic range of an RF peak detector 118 that is coupled to the output 110 of the voltage divider 102 through a capacitor 114. In some embodiments, the capacitor 114 may have a value of 330 pF. As an example, a suitable device for the peak detector 118 is the LTC5507 RF peak detector, available from Linear Technology, Milpitas, Calif. The peak detector 118 is fast enough to capture the cycles of the RF carrier frequency. Perhaps more importantly, the peak detector 118 is operative to easily follow the time-varying envelope of the baseband amplitude modulation that is impressed on the RF carrier signal.). Therefore, it would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the combination of Kawasaki and Jeon by specifically providing estimating a voltage standing wave ratio (VSWR) value using the input power and the output power; and signaling a power back-off of the output Tx power amplifier based on the VSWR value exceeding a threshold value, without using a peak detector measurement for the signaling of the power back-off, as taught by Shafer for the purpose of providing systems and methods for protecting RF power amplifiers that are at risk of being damaged as a result of poor load impedances [0002]. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Kawasaki, in view of Jeon and further in view of Karoui et al. (US 20080211585, hereinafter “Karoui”). Regarding claim 5, the combination of Kawasaki and Jeon discloses everything claimed as applied above (see claim 1), however the combination of Kawasaki and Jeon does not disclose, estimating a voltage standing wave ratio (VSWR) value using the input power and the output power; and performing, using the control circuitry, an output Tx power amplifier protection action based on the VSWR value. In the same field of endeavor, Karoui discloses, estimating a voltage standing wave ratio (VSWR) value using the input power and the output power; and performing, using the control circuitry, an output Tx power amplifier protection action based on the VSWR value ([0024]-[0027]: the output 325 of the RF power transistor 224 is operably coupled to a protection circuit 345. The protection circuit 226 is integrated onto the PA die and comprises a first transistor 355, whose collector port is operably coupled to the output 325 and whose base port 350 is operably coupled to the base port of the RF power transistor 224… Under extreme VSWR conditions, and high battery voltage, the collector current of the power transistor 224 increases more than would be expected under a 50-ohm load. The current flowing through the elementary transistor 355 increases proportionally to the current in the power transistor 224. The detected voltage developed across the sensing resistor 365 also increases with the above-mentioned current.). Therefore, it would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the combination of Kawasaki and Jeon by specifically providing estimating a voltage standing wave ratio (VSWR) value using the input power and the output power; and performing, using the control circuitry, an output Tx power amplifier protection action based on the VSWR value, as taught by Karoui for the purpose of providing a radio frequency device, a PA module and method of operation that prevents high current under VSWR and high battery voltage [0010]. Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Kawasaki, in view of Paul et al. (US 20070111685, hereinafter “Paul”) and further in view of Jeon. Regarding claim 11, Kawasaki discloses, A method of operating a wireless communication apparatus (i.e., transceiver 100; Fig. 4), comprising: setting, using control circuitry of the wireless communication apparatus ([0046]-[0049]: The driver amplifier 7 is an amplifier capable of adjustment of a gain. By adjusting a gain of the driver amplifier 7, transmission power of the transceiver 100 can be adjusted to a desired value. The driver control circuit 8 controls a bias voltage of the driver amplifier 7. The driver control circuit 8 includes a TPC 81 and an APC 82, and controls the bias voltage of the driver amplifier 7 thereby), a mission mode for an output transmission (Tx) power amplifier ([0046]-0050] describes execution of control processing while the power amplifier is operating to transmit signals, which corresponds to the claimed “mission mode”); measuring, using an output power detector (output power monitor 3; Fig. 4), an output power of the output Tx power amplifier operating in the mission mode ([0055]-[0059]: when the output power monitor value becomes small, it is determined that the temperature rises, and the gain is reduced, and in order to increase the output power of the driver amplifier 7 and the power amplifier 5, the correction value becomes a larger value. When the output power monitor value becomes large, it is determined that the temperature is lowered and the gain is increased, and in order to decrease the output power of the driver amplifier 7 and the power amplifier 5, the correction value becomes a smaller value); measuring, using an input power detector, an input power to the output Tx power amplifier associated with the output power ([0053]-[0057]: in the transceiver 100, the gain variation due to the external factor such as a temperature change is detected by detecting the variation of the output power from the driver amplifier 7, that is, the input power monitor value. When the input power monitor value varies from the reference value stored in the load variation lookup table 11, it is detected that the gains of the driver amplifier 7 and the power amplifier 5 are varied by the temperature varying from the reference temperature.); calculating, using the control circuitry, a gain value for the output Tx power amplifier using the input power and the output power ([0069]-[0071] and [075]-[0081]: the load determination circuit 12 determines whether or not the input power monitor value varies from the reference value. If the input power monitor value varies from the reference value (OP3: Yes), the processing shifts to control processing of the bias voltage of the driver amplifier 7 by the APC 82 that is illustrated in FIG. 7B. This is because as a result that the input power monitor value is varied, it is determined that the gains of the power amplifier 5 and the driver amplifier 7 are varied due to an external factor such as a temperature change…..In OP 21, the PA bias control circuit 13 reads the PA bias lookup table 14. In OP 22, the PA bias control circuit 13 reads the output power monitor value from, for example, the buffer for the output power monitor value, If the output power monitor value varies from the output power monitor value of the previous time (OP 23: Yes), a variation of the gain of the power amplifier 5 is determined. In this case, the processing proceeds to OP 24, and the PA bias control circuit 13 performs control of the PA bias voltage); comparing, using the control circuitry, the gain value with a temperature calibrated reference gain value selected using the junction temperature ([0070]-[0071]: In OP3, the load determination circuit 12 determines whether or not the input power monitor value varies from the reference value. If the input power monitor value varies from the reference value (OP3: Yes), the processing shifts to control processing of the bias voltage of the driver amplifier 7 by the APC 82 that is illustrated in FIG. 7B. This is because as a result that the input power monitor value is varied, it is determined that the gains of the power amplifier 5 and the driver amplifier 7 are varied due to an external factor such as a temperature change.); and adjusting a power amplifier bias when the gain value is different from the temperature calibrated reference gain value ([0075]-0076]: ] If the output power monitor value is larger than the reference value (OP13: larger), the processing proceeds to OP 14. If the output power monitor value is larger than the reference value, the temperature becomes lower than the reference temperature, and it is determined that the gains of the power amplifier 5 and the driver amplifier 7 become large. Therefore, the bias voltage of the driver amplifier 7 is controlled to be small so that the output power of the power amplifier 5 and the driver amplifier 7 becomes small. Accordingly, in OP 14, the APC 82 obtains the correction value that is a smaller value, from the reference table. Thereafter, the processing proceeds to OP 16. If the output power monitor value is smaller than the reference value (OP13: smaller), the processing proceeds to OP 15. If the output power monitor value is smaller than the reference value, it is determined that the temperature becomes higher than the reference temperature, and the gains of the power amplifier 5 and the driver amplifier 7 become small. Therefore, the bias voltage of the driver amplifier 7 is controlled to be large so that the output power of the power amplifier 5 and the driver amplifier 7 becomes large.) However, Kawasaki does not disclose, a cascode sliced output Tx power amplifier and adjust a gain bit setting for the Cascode sliced output Tx power amplifier when the gain value has more than a threshold difference from the temperature calibrated reference gain value. In the same field of endeavor, Paul discloses, a cascode sliced output Tx power amplifier ([0031]: FIG. 4 is a diagram illustrating an example of a power amplifier of the present invention. FIG. 4 shows a power amplifier 400 divided into N parallel slices, where each slice has its own power amplifier, including an output stage 402, and its own transformation network 404. For the purposes of this description, the term "slice" is intended to refer to one of the parallel power amplifiers) and adjust a gain bit setting for the Cascode sliced output Tx power amplifier when the gain value has more than a threshold difference ([0038]-[0043]:(FIG. 8 is a schematic diagram of a power amplifier 800 with N unequally sized slices. Like the examples described above, each slice of the power amplifier 800 includes an output stage and a transformation network. One example of the use of a power amplifier, such as power amplifier 800, with unequally sized slices is an amplifier whose output power is controlled digitally from 0 to P.sub.max. Slice 1 of the power amplifier 800 is designed to output a power level of P.sub.max/2. Slice 2 is designed to output a power level of P.sub.max/4. Slice N is designed to output a power level of P.sub.max2.sup.-N. Combinations of slices 1 through N can then be selectively enabled and disabled to produce any one of 2.sup.N output power levels ranging from 0 to P.sub.max(1-2.sup.-N) The transformed impedances (Z.sub.in1, Z.sub.in2, Z.sub.in3, . . . Z.sub.inN) of each slice of the power amplifier 800 are illustrated in FIG. 8). Therefore, it would have been obvious to one of ordinary skill in art in art before the effective filing date of the claimed invention to modify Kawasaki by specifically providing a cascode sliced output Tx power amplifier and adjust a gain bit setting for the Cascode sliced output Tx power amplifier when the gain value has more than a threshold difference from the temperature calibrated reference gain value, as taught by Paul for the purpose of providing power amplifiers where multiple parallel power amplifiers provide various output power levels, where selectively enabling and disabling the parallel power amplifiers and combining their outputs, a desired output power can be realized (abstract). Further, the combination of Kawasaki and Paul does not disclose, sampling a thermistor signal to determine a junction temperature associated with the output power. In the same field of endeavor, Jeon discloses, sampling a thermistor signal to determine a junction temperature associated with the output power (Referring to FIG. 6, Vref denotes a bias voltage node used to provide a bias voltage to a bias circuit of the power amplifier. The bias voltage is about 2.6-3.2 V according to the type of the power amplifier. Further, Vt denotes an output node of a voltage regulator, TH denotes a temperature sensor comprised of a thermistor, and C denotes a bypass capacitor, [0032]-[0037]). Therefore, it would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the combination of Kawasaki and Paul by specifically providing sampling a thermistor signal to determine a junction temperature associated with the output power, as taught by Jeon for the purpose of provide a temperature compensation circuit for a power amplifier that is capable of stabilizing a variation in current of a bias circuit [0018]. Claims 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Kawasaki, in view of Paul, in view of Jeon and further in view of Karoui. Regarding claim 12, the combination of Kawasaki, Paul and Jeon discloses everything claimed as applied above (see claim 11), however the combination of Kawasaki, Paul and Jeon does not disclose, estimating a voltage standing wave ratio (VSWR) value using the input power and the output power; and performing, using the control circuitry, an output Tx power amplifier protection action based on the VSWR value. In the same field of endeavor, Karoui discloses, estimating a voltage standing wave ratio (VSWR) value using the input power and the output power; and performing, using the control circuitry, an output Tx power amplifier protection action based on the VSWR value ([0024]-[0027]: the output 325 of the RF power transistor 224 is operably coupled to a protection circuit 345. The protection circuit 226 is integrated onto the PA die and comprises a first transistor 355, whose collector port is operably coupled to the output 325 and whose base port 350 is operably coupled to the base port of the RF power transistor 224… Under extreme VSWR conditions, and high battery voltage, the collector current of the power transistor 224 increases more than would be expected under a 50-ohm load. The current flowing through the elementary transistor 355 increases proportionally to the current in the power transistor 224. The detected voltage developed across the sensing resistor 365 also increases with the above-mentioned current.). Therefore, it would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the combination of Kawasaki, Paul and Jeon by specifically providing estimating a voltage standing wave ratio (VSWR) value using the input power and the output power; and performing, using the control circuitry, an output Tx power amplifier protection action based on the VSWR value, as taught by Karoui for the purpose of providing a radio frequency device, a PA module and method of operation that prevents high current under VSWR and high battery voltage [0010]. Regarding claim 13, the combination of Kawasaki, Paul, Jeon and Karoui discloses everything claimed as applied above (see claim 12), in addition Kawasaki discloses, wherein the output Tx power amplifier protection action comprises adjusting a gate bias value for the output Tx power amplifier when the VSWR value is less than a threshold value ([0075]-0076]: ] If the output power monitor value is larger than the reference value (OP13: larger), the processing proceeds to OP 14. If the output power monitor value is larger than the reference value, the temperature becomes lower than the reference temperature, and it is determined that the gains of the power amplifier 5 and the driver amplifier 7 become large. Therefore, the bias voltage of the driver amplifier 7 is controlled to be small so that the output power of the power amplifier 5 and the driver amplifier 7 becomes small. Accordingly, in OP 14, the APC 82 obtains the correction value that is a smaller value, from the reference table. Thereafter, the processing proceeds to OP 16. If the output power monitor value is smaller than the reference value (OP13: smaller), the processing proceeds to OP 15. If the output power monitor value is smaller than the reference value, it is determined that the temperature becomes higher than the reference temperature, and the gains of the power amplifier 5 and the driver amplifier 7 become small. Therefore, the bias voltage of the driver amplifier 7 is controlled to be large so that the output power of the power amplifier 5 and the driver amplifier 7 becomes large.) Regarding claim 14, the combination of Kawasaki, Paul, Jeon and Karoui discloses everything claimed as applied above (see claim 12), in addition Kawasaki discloses, wherein the output Tx power amplifier protection action comprises adjusting the gain bit setting to lower the gain value when the VSWR value is greater than a threshold value ([0075]-0076]: ] If the output power monitor value is larger than the reference value (OP13: larger), the processing proceeds to OP 14. If the output power monitor value is larger than the reference value, the temperature becomes lower than the reference temperature, and it is determined that the gains of the power amplifier 5 and the driver amplifier 7 become large. Therefore, the bias voltage of the driver amplifier 7 is controlled to be small so that the output power of the power amplifier 5 and the driver amplifier 7 becomes small. Accordingly, in OP 14, the APC 82 obtains the correction value that is a smaller value, from the reference table. Thereafter, the processing proceeds to OP 16. If the output power monitor value is smaller than the reference value (OP13: smaller), the processing proceeds to OP 15. If the output power monitor value is smaller than the reference value, it is determined that the temperature becomes higher than the reference temperature, and the gains of the power amplifier 5 and the driver amplifier 7 become small. Therefore, the bias voltage of the driver amplifier 7 is controlled to be large so that the output power of the power amplifier 5 and the driver amplifier 7 becomes large.) Allowable Subject Matter Claims 3, 6-10 and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 3, The following is a statement of reasons for the indication of allowable subject matter: the closest prior art, Kawasaki, Jeon, and Ratna, does not teach nor fairly suggest, “the method comprising updating the gain value with an updated output power measurement, an updated input power measurement, and an updated thermistor sample approximately every millisecond (ms); and updating the power amplifier bias as part of a voltage standing wave ratio (VSWR) compensation loop”, in combination with the other limitations in claim 1 and intervening claim 2. Regarding claim 6, The following is a statement of reasons for the indication of allowable subject matter: the closest prior art, Kawasaki, Jeon, and Karoui, does not teach nor fairly suggest, “the method comprising wherein the output Tx power amplifier protection action comprises adjusting a gate bias value for the output Tx power amplifier when the VSWR value is less than 2:1”, in combination with the other limitations in claim 1 and intervening claim 5. Regarding claim 7, The following is a statement of reasons for the indication of allowable subject matter: the closest prior art, Kawasaki, Jeon, and Karoui, does not teach nor fairly suggest, “the method comprising wherein the output Tx power amplifier protection action comprises adjusting an input power to the output Tx power amplifier when the VSWR value is greater than 2:1”, in combination with the other limitations in claim 1 and intervening claim 5. Regarding claim 8, The following is a statement of reasons for the indication of allowable subject matter: the closest prior art, Kawasaki, Jeon, and Karoui, does not teach nor fairly suggest, “the method comprising wherein the output Tx power amplifier protection action comprises adjusting an automatic gain control setting of the output Tx power amplifier when the VSWR value is greater than 2:1”, in combination with the other limitations in claim 1 and intervening claim 5. Regarding claim 9, The following is a statement of reasons for the indication of allowable subject matter: the closest prior art, Kawasaki and Jeon, does not teach nor fairly suggest, “the method comprising comparing, using the control circuitry, the gain value with a low impedance estimate threshold value; and lowering a supply voltage for the output Tx power amplifier and increasing the power amplifier bias to improve a linear power efficiency when the gain value is below the low impedance estimate threshold value”, in combination with the other limitations in claim 1. Regarding claim 10, The following is a statement of reasons for the indication of allowable subject matter: the closest prior art, Kawasaki and Jeon, does not teach nor fairly suggest, “the method comprising comparing, comparing, using the control circuitry, the gain value with a high impedance estimate threshold value; and setting a supply voltage for the output Tx power amplifier to a maximum value and lowering an input power to the output Tx power amplifier”, in combination with the other limitations in claim 1. Regarding claim 15, The following is a statement of reasons for the indication of allowable subject matter: the closest prior art, Kawasaki, Paul, Jeon and Karoui, does not teach nor fairly suggest, “the method comprising wherein the output Tx power amplifier protection action comprises signaling a power back-off of the output Tx power amplifier based on the VSWR value exceeding a threshold value, without using a peak detector measurement for the signaling of the power back-off”, in combination with the other limitations in claim 11 and intervening claim 12. Prior Art of the Record: The prior art made of record not relied upon and considered pertinent to Applicant’s disclosure: US 12451913: The RF communication system includes a transmitter configured to receive an input transmit signal and to output an RF transmit signal, and a power amplifier configured to amplify the RF transmit signal. The transmitter includes digital pre-distortion (DPD) system configured to process the input transmit signal to pre-distort the RF transmit signal. The DPD system includes a first non-linear filter along a first signal path and a second non-linear filter along a second signal path in parallel with the first signal path. US 20230096011: A power amplifier includes an over-current protection loop and/or an over-voltage protection loop to assist in preventing operation outside a safe operation zone. In a further exemplary aspect, triggering of the over-current protection loop adjusts a threshold voltage for the over-voltage protection loop. In further exemplary aspects, the over-current protection loop may adjust not only a bias regulator, but also provide an auxiliary control signal that further limits signals reaching the power amplifier. US 20220109407: This application is directed to methods and devices for an efficient power amplification system. An electronic device includes a first and a second power amplifier that are coupled to a quadrature combiner, a temperature monitoring circuit coupled to the first and second power amplifiers, and a controller coupled to the temperature monitoring circuit. The temperature monitoring circuit is configured to determine a temperature difference between the first and second power amplifiers. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to GOLAM SOROWAR whose telephone number is (571)270-3761. The examiner can normally be reached Mon-Fri: 8:30AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Charles Appiah can be reached at (571) 272-7904. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GOLAM SOROWAR/ Primary Examiner, Art Unit 2641
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Prosecution Timeline

Sep 20, 2023
Application Filed
Jan 08, 2026
Non-Final Rejection mailed — §103
Apr 08, 2026
Response Filed
May 07, 2026
Final Rejection mailed — §103
Jul 07, 2026
Response after Non-Final Action

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99%
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2y 9m (~0m remaining)
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