DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 1-4 are objected to because of the following informalities:
“A method for producing a wiring circuit board comprising:” (claim 1, preamble) the following formats is suggested to reflect method invention formats:
--" A method for producing a wiring circuit board, the method comprising steps of:”--
“a preparation step of preparing” (claim 1, line 2) should be updated to: -- “providing” --, since preparing not an active method limitation.
“a metal layer forming step of” (claim 1, line 3); “a first patterning step of” (claim 1, line 5”; “a second patterning step of” (claim 1, line 7); “a removing step of” (claim 1, line 11); “a deposition step of” (claim 1, line 12) should be deleted to reflect changes as suggested in the preamble line 1.
“after the second patterning step” (claim 1, line 12) should be updated to: --"after the forming a conductive pattern on one side of the insulating layer”--
“the removing step” (claim 1, line 16) should be updated to: --" after the removing the substrate and exposing at least a portion of the metal layer” --, for clarity of the claim as so to reflect changes as noted above.
Similar to the above apply to claims 2-3, where “an etching step of” (claim 2, line 2); “a thinning step of” (claim 3, line 2) should be deleted.
“the deposition step” (claim 2, line 3) should be updated to: --“the depositing” --, to reflect changes as mentioned above.
“in the moving step” (claim 4, line 5) should be updated to: --"in the removing the substrate and exposing at least a portion of the metal layer,” --.
Claim 4 does not agree with that in line 11 of claim 1, since the substrate has been removed prior to claim 4. It is suggested that the phrase “removing the substrate” appears to be “removing a portion of the substrate”, for clarity of the claim. Appropriate correction is required.
Further, it is also suggested that Applicant should carefully revise the disclosure and correct other typos in the claims and/or specification.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-4 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-5 of U.S. PG pub. No. 20240114628 A1 hereinafter the ‘628. Although the claims at issue are not identical, they are not patentably distinct from each other because every-aspect method limitations set forth in this instant application are recited in the claims 1-5 of the ‘628.
The ‘628 reference claims a method for producing a wiring circuit board comprising:
a preparation step of preparing a substrate made of a first metal (see claim 1, line 3 of the ‘628);
a metal layer forming step of forming a metal layer made of a second metal different from the first metal on one side of the substrate in a thickness direction (see claim 3, lines 2-3);
a first patterning step of forming an insulating layer on one side of the metal layer in the thickness direction (see claim 1, lines 3-5);
a second patterning step of forming a conductive pattern on one side of the insulating layer in the thickness direction, the conductive pattern having a first terminal, a second terminal, a first wiring connected to the first terminal, and a second wiring connected to the second terminal and disposed spaced from the first wiring (see claim 1, lines 6-9);
a removing step of removing the substrate and exposing at least a portion of the metal layer after the second patterning step (see claim 4, lines 3-4); and
a deposition step of depositing a metal on the other side of the metal layer in the thickness direction and forming a first metal support layer having a terminal support portion supporting the first terminal and the second terminal, a first wiring support portion supporting the first wiring, and a second wiring support portion supporting the second wiring and disposed spaced from the first wiring support portion after the removing step (see claim 1, lines 12-19 of the ‘628).
Note that the thinning to reduce the thickness claim 4 equivalents to the removing step as mentioned above.
The ‘628 further claims regarding:
Claim 2, regarding further etching the metal layer to form a second metal support layer disposed between the first metal support layer and the insulating layer after the deposition step (see claim 2 of the ‘628).
Claim 3, regarding “a thinning step of reducing a thickness of the metal layer after the removing step and before the deposition step” (compare claim 4).
Claim 4, regarding “wherein the substrate has a first region in which the terminal support portion is formed and a second region in which the first wiring support portion and the second wiring support portion are formed, and in the removing step, the second region is removed without removing the first region” (compare claim 5, lines 3-6, respectively).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MINH N TRINH whose telephone number is (571)272-4569. The examiner can normally be reached M-TH ~5:00-3:30.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas J Hong can be reached at 571-272-0993. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MINH N TRINH/ Primary Examiner, Art Unit 3729 mt 7/15/26
Prosecution Insights