Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I (claims 1-10 and 18-20) in the reply filed on April 3, 2026 is acknowledged. Claims 11-17 are canceled and new claims 21-27 have been added.
Remarks
The Office has cited particular columns, line numbers, paragraph numbers, references, or figures in the references applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses to fully consider the reference in entirety, as potentially teaching all or part of the claimed invention. See MPEP § 2141.02 and § 2123.
Claim Objections
Claims 21-23 are objected to because of the following informalities:
Claim 21, line 8, “the current mode transceiver” appears to be “the current mode transmitter”.
Claim 22, lines 1-2, “the second resistor trimming code” appears to be “the second trimming code”.
Claim 23 should depend from claim 21 instead of claim 22.
Appropriate correction is required. For the purposes of expediting prosecution on the merits of the claims, the examiner has attempted to construe the claims to the extent possible for the following art rejection.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-10, 18, and 20-27 are rejected under 35 U.S.C. 103 as being unpatentable over Ji et al. (US10193552B1, hereinafter referred to as Ji) in view of Alexeyev (US8253526B2, hereinafter referred to as Alexeyev).
Regarding Claim 1, Ji discloses a method comprising:
measuring a resistance of a first resistor of a current mode transceiver, wherein the first resistor is external to a transmission driver of the current mode transceiver (“generate an absolute current Iabs based on the reference voltage VBG and a resistance Rext of the off-chip resistor Rext, where Iabs= VBG / Rext”, col. 5, ll. 19+; “off-chip resistor”, claim 1; Fig. 3);
generating a first trimming code based on a difference between the resistance of the first resistor and a reference resistance (“generating, by the calibration control module, a configuration signal based on an output signal of the comparator”, col. 2, ll. 53+; “calibrate ... by using dichotomy”, col. 2, ll. 60+; Fig. 3);
adjusting a resistance of a second resistor internal to the transmission driver by storing a second trimming code in a second memory associated with the second resistor (“the configuration signal is used for adjusting a resistance of each of the first termination resistor and the second termination resistor”, col. 2, ll. 55+; “transmits a configuration signal to control the electronic switch in each of the resistor branches of the adjustable resistor”, col. 6, ll. 31+; “adjustable resistor formed by multiple resistor branches connected in parallel with each other. Each of the resistor branches includes an electronic switch”, col. 6, ll. 27+; Fig. 3).
Ji does not disclose: adjusting the resistance of the first resistor by storing the first trimming code in a memory associated with the first resistor.
Alexeyev discloses adjusting the resistance of the first resistor by storing the first trimming code in a memory associated with the first resistor (“first conductive circuitry to conduct said calibration current and including a resistance having a magnitude related to one or more control signals”, claim 1; “first switching circuitry coupled to said first plurality of resistances and responsive to said one or more control signals”, claim 5; “digital storage element (volatile or nonvolatile), e.g., RAM, ROM or EEPROM, to provide the N-bit word for controlling”, col. 7, ll. 50+; FIGS. 9-11, 13).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the termination resistor calibration circuit and control method of Ji by incorporating the control-signal-based adjustment of the first (reference) resistance using digital storage and switching circuitry taught by Alexeyev in order to directly compensate for variations in the external/reference resistor itself, thereby further improving calibration accuracy, avoiding duplication errors, and reducing area as explicitly desired by Ji.
Claim 2 Ji discloses the method of claim 1, wherein the second trimming code is identical to the first trimming code (“the configuration signal is used for adjusting a resistance of each of the first termination resistor and the second termination resistor”, claim 3; Fig. 3; same configuration signal applied to both internal termination resistors; Fig. 3; claim 3).
Claim 3 Ji discloses all the features and limitations as discussed above but does not disclose wherein the second trimming code is different from the first trimming code.
Alexeyev discloses the second trimming code is different from the first trimming code (“one or more control signals” and “at least one of said one or more control signals” allow independent control values for first and second conductive circuitry; claim 1; claim 5).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the termination resistor calibration circuit and control method of Ji by incorporating the independent control-signal-based adjustment of the first (reference) resistance using digital storage and switching circuitry taught by Alexeyev in order to allow different codes where needed for process/temperature variations in the external/reference resistor itself, thereby further improving calibration accuracy, avoiding duplication errors, and reducing area as explicitly desired by Ji.
Claim 4 Ji discloses the method of claim 3, comprising computing the second trimming code based on the first trimming code (“generating, by the calibration control module, a configuration signal based on an output signal of the comparator”, claim 3; "calibrate ... by using dichotomy”, col. 2, ll. 60+; Fig. 3).
Claim 5 Ji discloses the method of claim 1, wherein the first resistor includes a plurality of first sub-resistors coupled in parallel ("adjustable resistor formed by multiple resistor branches connected in parallel with each other", col. 6, ll. 27+; Fig. 3).
Claim 6 Ji discloses the method of claim 5, wherein adjusting the resistance of the first resistor includes selectively opening and closing a plurality of first switches each coupled to a respective first sub-resistor (“control the electronic switch in each of the resistor branches of the adjustable resistor to be turned on or turned off”, col. 6, ll. 29+; “Each of the resistor branches includes an electronic switch”, col. 6, ll. 29+).
Claim 7 Ji discloses the method of claim 6, wherein the second resistor includes a plurality of second sub-resistors coupled in parallel (“adjustable resistor formed by multiple resistor branches connected in parallel with each other”, col. 6, ll. 26+; Fig. 3).
Claim 8 Ji discloses the method of claim 7, wherein adjusting the resistance of the second resistor includes selectively opening and closing a plurality of second switches each coupled to a respective second sub-resistor (“control the electronic switch in each of the resistor branches of the adjustable resistor to be turned on or turned off”, col. 6, ll. 29+; “Each of the resistor branches includes an electronic switch”, col. 6, ll. 29+).
Claim 9 Ji discloses all the features and limitations as discussed above but does not disclose the first resistor has a different number of first sub-resistor than a number of second sub-resistors of the second resistor.
Alexeyev disclose the first resistor has a different number of first sub-resistor than a number of second sub-resistors of the second resistor (“first conductive circuitry ... resistance having a magnitude related to one or more control signals”, claim 1; “first plurality of resistances, and first switching circuitry”, claim 5; FIGS. 9-11, 13) (different numbers of resistances in first vs. second conductive circuitry are expressly allowed by independent control signals).
Claim 10 Ji discloses the method of claim 1, comprising: transmitting data in a current mode transmission scheme from the current mode transceiver (“CML transmitter... to form a voltage difference between OUTP and OUTN, so as to generate an output signal”, col. 4, ll. 16+; Figs. 1-3).
Claim 18 Ji discloses a method, comprising:
measuring a resistance of a first resistor of a current mode transceiver of an integrated circuit (“generate an absolute current I abs based on the reference voltage VBG and a resistance Rext of the off-chip resistor Rext”, col. 5, ll. 19+; claim 1; Fig. 3);
adjusting the resistance of the second resistor of the current mode transceiver based on the measured resistance of the first resistor (“the configuration signal is used for adjusting a resistance of each of the first termination resistor and the second termination resistor”, col. 2, ll. 55+).
Ji does not disclose adjusting the resistance of the first resistor based on the measured
resistance of the first resistor.
Alexeyev discloses adjusting the resistance of the first resistor based on the measured resistance of the first resistor (“first conductive circuitry to conduct said calibration current and including a resistance having a magnitude related to one or more control signals”, claim 1; “control circuitry ... provide said one or more control signals”, claim 1; “first switching circuitry ... responsive to said one or more control signals”, claim 5; FIGS. 9-11, 13).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the termination resistor calibration circuit and control method of Ji by incorporating the control-signal-based adjustment of the first (reference) resistance using digital storage and switching circuitry taught by Alexeyev in order to directly compensate for variations in the external/reference resistor itself based on its own measured resistance, thereby further improving calibration accuracy, avoiding duplication errors, and reducing area as explicitly desired by Ji.
Claim 20 Ji discloses all the features and limitations as discussed above and further disclose adjusting the resistance of the second resistor includes writing a second trimming code to a second register of the integrated circuit (“the configuration signal is used for adjusting...”, claim 3; digital control implies register storage).
Ji does not disclose: adjusting the resistance of the first resistor includes writing a first
trimming code to a first register of the integrated circuit.
Alexeyev discloses adjusting the resistance of the first resistor includes writing a first trimming code to a first register of the integrated circuit (“digital storage element (volatile or nonvolatile), e.g., RAM, ROM or EEPROM, to provide the N-bit word for controlling the on-die termination resistances”, col. 7, ll. 50+; FIGS. 9-11, 13).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the termination resistor calibration circuit and control method of Ji by incorporating the digital storage (register) based adjustment of the first (reference) resistance using control signals taught by Alexeyev in order to directly compensate for variations in the external/reference resistor itself, thereby further improving calibration accuracy, avoiding duplication errors, and reducing area as explicitly desired by Ji.
Claim 21 Ji discloses a method, comprising:
measuring a resistance of a first resistor of a current mode transmitter of an integrated circuit (“generate an absolute current Iabs based on the reference voltage VBG and a resistance Rext of the off-chip resistor Rext, where Iabs= VBG / Rext”, col. 5, ll. 19+; “off-chip resistor”, claim 1; Fig. 3);
generating a first trimming code by comparing the resistance of the first resistor to a reference resistance (“generating, by the calibration control module, a configuration signal based on an output signal of the comparator”, col. 2, ll. 53+; “calibrate ... by using dichotomy”, col. 2, ll. 60+; Fig. 3); and
storing a second trimming code in a second register associated with a second resistor internal to a transmission driver of the current mode transceiver (“the configuration signal is used for adjusting a resistance of each of the first termination resistor and the second termination resistor”, col. 2, ll. 55+; “transmits a configuration signal to control the electronic switch in each of the resistor branches of the adjustable resistor”, col. 6, ll. 31+; “transmits a configuration signal to control the electronic switch in each of the resistor branches of the adjustable resistor”, col. 6, ll. 29+; Fig. 3).
Ji does not disclose: a first resistor coupled to a receiving driver of a current mode transmitter of an integrated circuit; storing the first trimming code in a first register associated with the first resistor.
Alexeyev discloses a first resistor coupled to a receiving driver of a current mode transmitter of an integrated circuit (“integrated calibration and differential signal receiver circuitry”; “amplifier circuitry to sense said signal voltage and in response thereto provide a corresponding output signal”, claim 1; Figs. 9, 10);
storing the first trimming code in a first register associated with the first resistor (“digital storage element (volatile or nonvolatile), e.g., RAM, ROM or EEPROM, to provide the N-bit word for controlling the on-die termination resistances”, col. 7, ll. 50+; FIGS. 9-11, 13).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the termination resistor calibration circuit and control method of Ji by incorporating the receiver-coupled first resistor and digital register storage of the first trimming code taught by Alexeyev in order to extend the calibration to a full current-mode transmitter with integrated receiver path while directly storing a trimming code for the external/reference resistor coupled to the receiving driver, thereby further improving calibration accuracy, avoiding duplication errors, and reducing area as explicitly desired by Ji.
Claim 22 Ji discloses the method of claim 21, wherein the first trimming code is the same as the second trimming code (“the configuration signal is used for adjusting a resistance of each of the first termination resistor and the second termination resistor"; same configuration signal applied to both; Fig. 3; claim 3).
Claim 23 Ji discloses all the features and limitations as discussed above but does not disclose the first trimming code is different from the second trimming code.
Alexeyev discloses the first trimming code is different from the second trimming code (“one or more control signals” and “at least one of said one or more control signals” allow independent control values for first and second conductive circuitry; claim 1; claim 5).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the termination resistor calibration circuit and control method of Ji by incorporating the receiver-coupled first resistor and digital register storage of the first trimming code taught by Alexeyev in order to extend the calibration to a full current-mode transmitter with integrated receiver path while allowing different codes where needed for process/temperature variations, thereby further improving calibration accuracy, avoiding duplication errors, and reducing area as explicitly desired by Ji.
Claim 24 Ji discloses all the features and limitations as discussed above and further disclose controlling a plurality of second switches coupled to the second resistor based on the second trimming code (“control the electronic switch in each of the resistor branches of the adjustable resistor to be turned on or turned off”, col. 6, ll. 29+; “Each of the resistor branches includes an electronic switch”, col. 6, ll. 29+).
Ji does not disclose controlling a plurality of first switches coupled to the first resistor based on the first trimming code.
Alexeyev discloses controlling a plurality of first switches coupled to the first resistor based on the first trimming code (“first switching circuitry coupled to said first plurality of resistances and responsive to said one or more control signals”, claim 5; FIGS. 9-11, 13).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the termination resistor calibration circuit and control method of Ji by incorporating the receiver-coupled first resistor, digital storage (register) of the first trimming code, and switch control taught by Alexeyev in order to extend the calibration to a full bidirectional current-mode transceiver while using switch control for the first resistor, thereby further improving calibration accuracy, avoiding duplication errors, and reducing area as explicitly desired by Ji.
Claim 25 Ji discloses all the features and limitations as discussed above but does not disclose a first transmission line is coupled to a first input of the receiving driver, a first output of the transmission driver, and a first I/O terminal of the integrated circuit;
a second transmission line is coupled to a second input of the receiving driver, a second output of the transmission driver, and a second I/O terminal of the integrated circuit.
Alexeyev discloses a first transmission line is coupled to a first input of the receiving driver, a first output of the transmission driver, and a first I/O terminal of the integrated circuit (“first and second signal conductors disposed on said substrate and coupled to said first and second signal electrodes to conduct said signal current”, claim 1; “first and second signal electrodes ... to convey a differential signal”, claim 1);
a second transmission line is coupled to a second input of the receiving driver, a second output of the transmission driver, and a second I/O terminal of the integrated circuit (same differential pair structure).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the termination resistor calibration circuit and control method of Ji by incorporating the receiver-coupled first resistor, transmission lines, and digital storage (register) of the first trimming code taught by Alexeyev in order to extend the calibration to a full bidirectional current-mode transceiver with explicit differential transmission lines connected to both receiving inputs and transmission outputs at the I/O terminals, thereby further improving calibration accuracy, avoiding duplication errors, and reducing area as explicitly desired by Ji.
Claim 26 Ji discloses all the features and limitations as discussed above but does not disclose wherein the first resistor is coupled between the first and second transmission lines.
Alexeyev discloses the first resistor is coupled between the first and second transmission lines (termination resistance Rtr is coupled across the differential signal pair, FIG. 9; claim 1).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the termination resistor calibration circuit and control method of Ji by incorporating the receiver-coupled first resistor (coupled between the transmission lines) and digital storage (register) of the first trimming code taught by Alexeyev in order to extend the calibration to a full bidirectional current-mode transceiver with differential termination resistor placement, thereby further improving calibration accuracy, avoiding duplication errors, and reducing area as explicitly desired by Ji.
Claim 27 Ji discloses all the features and limitations as discussed above and further disclose driving data, with the transmission driver, to the first and second I/O terminals via the first and second transmission lines (“CML transmitter... to form a voltage difference between OUTP and OUTN, so as to generate an output signal”, col. 4, ll. 11+; FIGS . 1-3).
Ji does not disclose receiving, with the receiving driver, data from the first and second I/O terminals via the first and second transmission lines.
Alexeyev discloses receiving, with the receiving driver, data from the first and second I/O terminals via the first and second transmission lines (“amplifier circuitry to sense said signal voltage and in response thereto provide a corresponding output signal”; claim 1).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the termination resistor calibration circuit and control method of Ji by incorporating the receiver-coupled first resistor, bidirectional data driving/receiving over the transmission lines, and digital storage (register) of the first trimming code taught by Alexeyev in order to extend the calibration to a full bidirectional current-mode transceiver, thereby further improving calibration accuracy, avoiding duplication errors, and reducing area as explicitly desired by Ji.
Allowable Subject Matter
Claim 19 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Dettloff et al. (US 8633733 B2) discloses voltage mode transmitter equalizer.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL D CHANG whose telephone number is (571)272-1801. The examiner can normally be reached M-F 8-5 EST.
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/DANIEL D CHANG/ Primary Examiner, Art Unit 2845
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