DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of group I (claims 1-6 and 14-20) in the reply filed on 02/17/2026 is acknowledged.
Claims 7-13 withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claims. Therefore claims 7-13 should be cancelled.
Election was made without traverse in the reply filed on 02/17/2026.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-6 and 14-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter.
Step 1:
According to the first part of the analysis, in the instant case, claims 1-16 are directed to a method, claim 17-18 are directed to using a wind farm controller to perform the method, and claims 19-20 are directed to a wind farm controller. Thus, each of the claims falls within one of the four statutory categories (i.e. process, machine, manufacture, or composition of matter).
Regarding claim 1:
A method of characterizing threshold voltage of a power electronic device using an artificial intelligence (AI) model, the method comprising:
sampling, by a microcontroller of the power electronic device, measured voltage and current values of the power electronic device at power-on; and
characterizing, by the microcontroller, the threshold voltage of the power electronic device using the AI model in inference mode with the measured voltage and current values as inputs, the AI model being trained using a joint loss function comprising a Jacobian regularization term to compensate for noise.
Step 2A Prong 1:
“sampling, by a microcontroller of the power electronic device, measured voltage and current values of the power electronic device at power-on” is directed to math because the process from capturing the raw analog signal to analyzing it for control or monitoring purposes relies on mathematical principles, formulas, and data processing algorithms. At power-on, the microcontroller uses math to transform raw, noisy, or high voltage signal into accurate data for monitoring, protection, and control during startup sequence.
“characterizing, by the microcontroller, the threshold voltage of the power electronic device using the AI model in inference mode with the measured voltage and current values as inputs, the AI model being trained using a joint loss function comprising a Jacobian regularization term to compensate for noise” is directed to math because characterizing threshold voltage involves finding a critical parameter (voltage) from I-V (current-voltage). This is typical formulated as finding the point where the derivative of the current with respect to voltage, dI/dV, meet a specific threshold, or mapping input data (V,I) to a Vth output via a function. The microcontroller executed a trained model, which is a mathematical function f(x,θ)(e.g. .., a neural network) that maps inputs (voltage/current measurements) to an output (threshold voltage). To train the AI model, a loss function is minimized. A joint loss function combines multiple criteria. Jacobian regularization term is an explicit mathematical constraint applied during training to improve robustness. It penalizes the norm of the Jacobian matrix, which represents the matrix of partial derivatives of the model outputs with respect to input. Compensating for noise is mathematically, Jacobian regularization restricts the Lipschitz constant of the function, ensuring that small perturbations (noise) in input measurement (V,I) do not cause large fluctuation in the predicted Vth.
Each limitation recites in the claim is a process that, under BRI covers performance of the limitation in the mind but for the recitation of a generic “measurement” which is a mere indication of the field of use. Nothing in the claim elements precludes the steps from practically being performed in the mind. Thus, the claim recites a mental process.
Further, the claim recites the step of "sampling, by a microcontroller of the power electronic device, measured voltage and current values of the power electronic device at power-on; and characterizing, by the microcontroller, the threshold voltage of the power electronic device using the AI model in inference mode with the measured voltage and current values as inputs, the AI model being trained using a joint loss function comprising a Jacobian regularization term to compensate for noise” which as drafted, under BRI recites a mathematical calculation. The grouping of "mathematical concepts” in the 2019 PED includes "mathematical calculations" as an exemplar of an abstract idea. 2019 PEG Section |, 84 Fed. Reg. at 52. Thus, the recited limitation falls into the "mathematical concept" grouping of abstract ideas. This limitation also falls into the “mental process” group of abstract ideas, because the recited mathematical calculation is simple enough that it can be practically performed in the human mind, e.g., scientists and engineers have been solving the Arrhenius equation in their minds since it was first proposed in 1889.
Note that even if most humans would use a physical aid (e.g., pen and paper, a slide rule, or a calculator) to help them complete the recited calculation, the use of such physical aid does not negate the mental nature of this limitation. See October Update at Section I(C)(i) and (iii).
Additional Elements:
Step 2A Prong 2:
“A method of characterizing threshold voltage of a power electronic device using an artificial intelligence (AI) model” recited in the preamble does not integrate the judicial exception into a practical application. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
“sampling, by a microcontroller of the power electronic device, measured voltage and current values of the power electronic device at power-on” does not integrate the judicial exception into a practical application. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
“characterizing, by the microcontroller, the threshold voltage of the power electronic device using the AI model in inference mode with the measured voltage and current values as inputs, the AI model being trained using a joint loss function comprising a Jacobian regularization term to compensate for noise” does not integrate the judicial exception into a practical application. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
The claim is merely selecting data, manipulating or analyzing the data using math and mental process, and displaying the results.
This is similar to electric power: MPEP 2106.05(h) vi. Limiting the abstract idea of collecting information, analyzing it, and displaying certain results of the collection and analysis to data related to the electric power grid, because limiting application of the abstract idea to power-grid monitoring is simply an attempt to limit the use of the abstract idea to a particular technological environment, Electric Power Group, LLC v. Alstom S.A., 830 F.3d 1350, 1354, 119 USPQ2d 1739, 1742 (Fed. Cir. 2016).
Whether the claim invokes computers or other machinery merely as a tool to perform an existing process. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See Affinity Labs v. DirecTV, 838 F.3d 1253, 1262, 120 USPQ2d 1201, 1207 (Fed. Cir. 2016) (cellular telephone); TLI Communications LLC v. AV Auto, LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (computer server and telephone unit). Similarly, "claiming the improved speed or efficiency inherent with applying the abstract idea on a computer" does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015). In contrast, a claim that purports to improve computer capabilities or to improve an existing technology may integrate a judicial exception into a practical application or provide significantly more. McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 1314-15, 120 USPQ2d 1091, 1101-02 (Fed. Cir. 2016); Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 1335-36, 118 USPQ2d 1684, 1688-89 (Fed. Cir. 2016). See MPEP §§ 2106.04(d)(1) and 2106.05(a) for a discussion of improvements to the functioning of a computer or to another technology or technical field.
Claim 1 recites the additional element(s) of using generic AI/ML technology, i.e. *** using an artificial intelligence (AI) model ***, to perform data evaluations or calculations, as identified under Prong 1 above. The claims do not recite any details regarding how the AI/ML algorithm or model functions or is trained. Instead, the claims are found to utilize the AI/ML algorithm as a tool that provides nothing more than mere instructions to implement the abstract idea on a general purpose computer. See MPEP 2106.05(f). Additionally, the use of the *** artificial intelligence (AI) model *** merely indicates a field of use or technological environment in which the judicial exception is performed. See MPEP 2106.05(h). Therefore, the use of ***s artificial intelligence (AI) model *** to perform steps that are otherwise abstract does not integrate the abstract idea into a practical application. See the 2024 Guidance Update on Patent Subject Matter Eligibility, Including on Artificial Intelligence; and Example 47, ineligible claim 2.
The claim as a whole does not meet any of the following criteria to integrate the judicial exception into a practical application:
An additional element reflects an improvement in the functioning of a computer, or an improvement to other technology or technical field;
an additional element that applies or uses a judicial exception to effect a particular treatment or prophylaxis for a disease or medical condition;
an additional element implements a judicial exception with, or uses a judicial exception in conjunction with, a particular machine or manufacture that is integral to the claim;
an additional element effects a transformation or reduction of a particular article to a different state or thing; and
an additional element applies or uses the judicial exception in some other meaningful way beyond generally linking the use of the judicial exception to a particular technological environment, such that the claim as a whole is more than a drafting effort designed to monopolize the exception.
Step 2B:
“A method of characterizing threshold voltage of a power electronic device using an artificial intelligence (AI) model” recited in the preamble does not amount to significantly more than the judicial exception in the claim. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
“sampling, by a microcontroller of the power electronic device, measured voltage and current values of the power electronic device at power-on” does not amount to significantly more than the judicial exception in the claim. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
“characterizing, by the microcontroller, the threshold voltage of the power electronic device using the AI model in inference mode with the measured voltage and current values as inputs, the AI model being trained using a joint loss function comprising a Jacobian regularization term to compensate for noise” does not amount to significantly more than the judicial exception in the claim. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
The claim is therefore ineligible under 35 USC 101.
Claim 14 is similar to claim 1 but recites a power electronics system comprising: a power electronic device; and a microcontroller comprising a processor and a non-transitory computer-readable memory storing a program that, when executed by the processor, causes the power electronics system to perform a method of characterizing a parameter of the power electronic device using an artificial intelligence (AI) model. These additional elements fail to integrate the abstract idea into a practical application. These limitations are recited at a high level of generality and do not add significantly more to the judicial exception. These elements are generic computing devices that perform generic functions. Using generic computer elements to perform an abstract idea does not integrate an abstract idea into a practical application. See 2019 Guidance, 84 Fed. Reg. at 55. Moreover, “the mere recitation of a generic computer cannot transform a patent-ineligible abstract idea into a patent-eligible invention.” Alice, 573 U.S. at 223; see also FairWarninglP, LLCv. latric SysInc., 839 F.3d 1089, 1096 (Fed. Cir. 2016) (citation omitted) (“[T]he use of generic computer elements like a microprocessor or user interface do not alone transform an otherwise abstract idea into patent-eligible subject matter”).
On the record before us, we are not persuaded that the hardware of claim 14 integrates the abstract idea into a practical application. Nor are we persuaded that the additional elements are anything more than well-understood, routine, and conventional so as to impart subject matter eligibility to claim 14.
Regarding claim 2, “wherein the power electronic device is a power transistor comprising a gate, a source, and a drain, and the measured voltage and current values comprise the drain-source voltage and the drain current of the power transistor” does not integrate the judicial exception into a practical application. It does not amount to significantly more than the judicial exception in the claim. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
Regarding claim 3, “wherein the inputs comprise the gate-source voltage of the power transistor” does not integrate the judicial exception into a practical application. It does not amount to significantly more than the judicial exception in the claim. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
Regarding claim 4, “wherein characterizing the threshold voltage of the power electronic device further comprises outputting an estimated threshold voltage within about 100 ms of powering on the power electronic device” does not integrate the judicial exception into a practical application. It does not amount to significantly more than the judicial exception in the claim. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
Regarding claim 5, “characterizing drift of the threshold voltage of the power electronic device as a predictive marker of device degradation” does not integrate the judicial exception into a practical application. It does not amount to significantly more than the judicial exception in the claim. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
Regarding claim 6, “rehabilitating the device degradation using new parameter values selected according to the characterization, the new parameter values comprising one or more of driving voltage, gate voltage, or source voltage” does not integrate the judicial exception into a practical application. It does not amount to significantly more than the judicial exception in the claim. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
Regarding claim 15, “an analog-to-digital converter (ADC) circuit coupled to the power electronic device, the ADC circuit being configured to receive analog voltage and current signals from the power electronic device, convert the analog voltage and current signals to voltage and current values, and output the voltage and current values to the processor does not integrate the judicial exception into a practical application. It does not amount to significantly more than the judicial exception in the claim. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
Regarding claim 16, “wherein the microcontroller comprises the ADC circuit” does not integrate the judicial exception into a practical application. It does not amount to significantly more than the judicial exception in the claim. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
Regarding claim 17, “a conditioning circuit coupled between the power electronic device and the ADC circuit, the conditioning circuit being configured to condition raw analog voltage and current signals to generate the analog voltage and current signals received by the ADC circuit” does not integrate the judicial exception into a practical application. It does not amount to significantly more than the judicial exception in the claim. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
Regarding claim 18, “wherein the conditioning circuit comprises a plurality of operational amplifiers comprising inputs coupled to respective ones of the raw analog voltage and current signals, and outputs coupled to the ADC circuit” does not integrate the judicial exception into a practical application. It does not amount to significantly more than the judicial exception in the claim. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
Regarding claim 19, “wherein the power electronic device is a power transistor comprising a gate, a source, and a drain, the parameter of the power electronic device is the threshold voltage of the power transistor, and the measured voltage and current values comprise the drain-source voltage and the drain current of the power transistor” does not integrate the judicial exception into a practical application. It does not amount to significantly more than the judicial exception in the claim. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h))..
Regarding claim 20, “wherein the power electronic device is a power silicon (Si) device or a power silicon carbide (SiC) device” does not integrate the judicial exception into a practical application. It does not amount to significantly more than the judicial exception in the claim. This additional element is merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(h)).
Hence the claims 1-6 and 14-20 are treated as ineligible subject matter under 35 U.S.C. § 101.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s)1-4 and 14-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kolter et al. (US 2022/0027723 A1) in view of Liu et al. (“Jacobian Norm with Selective Input Gradient Regularization for Improved and Interpretable Adversarial Defense”)
Regarding claims 1 and 14, Kolter et al. disclose a method of characterizing threshold voltage of a power electronic device using an artificial intelligence (AI) model (para. [0036], [0155]: : FIG. 31(a)-(d) illustrates several embodiments of compute units within an IMC-based processor for an arbitrary machine learning algorithm, para. [0214], [0216], [0225]: programmed threshold voltage), the method comprising: sampling, by a microcontroller of the power electronic device, measured voltage and current values of the power electronic device at power-on (e.g. para. [0230]); and characterizing, by the microcontroller, the threshold voltage of the power electronic device using the AI model in inference mode with the measured voltage and current values as inputs (e.g. para. [0230]).
Kolter et al. fail to disclose the AI model being trained using a joint loss function comprising a Jacobian regularization term to compensate for noise.
Liu et al. teach the AI model being trained using a joint loss function (page 3, second column: section a) Adversarial training) comprising
a Jacobian regularization term to compensate for noise (page 9, second column: A set of noise injection methods, i.e., RSE [46], Adv-BNN [47] and PNI [15], combine the adversarial training and noise injection into the inputs/weights of the network. However, these methods, except for the PNI [15] manually set the noise configurations, making it very ad-hoc, and thus not generalizable to different datasets. PNI [15] exploits the min-max optimization with trade-off on clean-and perturbed data by injecting trainable Gaussian noise on various locations of the network to generate adversarial examples. Whilst PNI [15] improves the accuracy of both clean and perturbed data, noise injection is not related to the robustness response of the network. In contrast, our proposed method regularizes the Jacobian norm and the input gradients, such that the network parameters can be dynamically trained to perform better adversarial defense. In addition, the Jacobian norm regularization explicitly suggests the robustness of the classification model in response to imperceptible data perturbation).
Therefore, it would have been obvious to one of ordinary skills in the art before the effective filing date of the claimed invention to combine the teaching of Liu et al. with the teaching of Kolter et al. in order to provide Adversarial training (AT) is often adopted to improve robustness through training a mixture of corrupted and clean data (Liu et al., abstract).
Regarding claim 2, Kolter et al. disclose the power electronic device is a power transistor comprising a gate (para. [0106], [0113]), a source (para. [0106], [0113]), and a drain (para. [0106], [0113]), and the measured voltage and current values comprise the drain-source voltage and the drain current of the power transistor (para. [0113]).
Regarding claim 3, Kolter et al. disclose wherein the inputs comprise the gate-source voltage of the power transistor (para. [0106]).
Regarding claim 4, Kolter et al. disclose characterizing the threshold voltage of the power electronic device further comprises outputting an estimated threshold voltage (e.g. para. [0216]). Kolter et al. discloses the claimed invention except for the threshold voltage the within about 100 ms of powering on the power electronic device. It would have been obvious to one of ordinary skill in the art at the time the invention was made to provide the threshold voltage the within about 100 ms of powering on the power electronic device, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Regarding claim 15, Kolter et al. disclose an analog-to-digital converter (ADC) circuit coupled to the power electronic device, the ADC circuit being configured to receive analog voltage and current signals from the power electronic device, convert the analog voltage and current signals to voltage and current values, and output the voltage and current values to the processor (para. [0073], [0074], [0090], [0112], [0117], [0123], [0130], [0141]).
Regarding claim 16, Kolter et al. disclose wherein the microcontroller comprises the ADC circuit (para. [0073], [0074], [0090], [0112], [0117], [0123], [0130], [0141]).
Regarding claim 17, Kolter et al. disclose a conditioning circuit coupled between the power electronic device and the ADC circuit, the conditioning circuit being configured to condition raw analog voltage and current signals to generate the analog voltage and current signals received by the ADC circuit (para. [0073], [0074], [0090], [0112], [0117], [0123], [0130], [0141]).
Regarding claim 18, Kolter et al. disclose the conditioning circuit comprises a plurality of operational amplifiers comprising inputs coupled to respective ones of the raw analog voltage and current signals, and outputs coupled to the ADC circuit (para. [0073], [0074], [0090], [0153], [0158]).
Regarding claim 19, Kolter et al. disclose wherein the power electronic device is a power transistor comprising a gate, a source, and a drain, the parameter of the power electronic device is the threshold voltage of the power transistor, and the measured voltage and current values comprise the drain-source voltage and the drain current of the power transistor (para. [0106], [0113]).
Regarding claim 20, Kolter et al. disclose wherein the power electronic device is a power silicon (Si) device or a power silicon carbide (SiC) device (para. [0096]).
Other Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Beyene. (US 2019/0180179 A1) disclose a method for training an artificial neural network to design a power distribution network (PDN) for a system includes generating signal variation statistics of the system from PDN parameters input into the artificial neural network. The artificial neural network is modified such that the signal variation statistics of the system generated by the neural network match expected signal variation statistics of the system.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN H LE whose telephone number is (571)272-2275. The examiner can normally be reached on Monday-Friday from 7:00am – 3:30pm Eastern Time.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Shelby A. Turner can be reached on (571) 272-6334. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JOHN H LE/Primary Examiner, Art Unit 2857