DETAILED ACTION
The present Office Action is in response to Applicant Arguments/Remarks and amended claims filed on 01/27/2026. Claims 1, 5, 10-11, 15, and 20 have been amended. Claims 1-20 remain pending in the application.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendments and Arguments
Applicant’s amendments and remarks have been fully considered with the Examiner’s response set forth below.
(1)Applicant’s arguments are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
(2) Another iteration of claim analysis has been made Refer to the corresponding sections of the claim analysis below for details.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 5-6, 9-13, 15-16, and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Oh et al. (US 2019/0310774), hereinafter Oh in view of Alrod et al.(US10,871,910), hereinafter Alrod, and further in view of Yan (US 2025/0251861), hereinafter Yan.
Regarding claims 1, 11, and 20, taking claim 11 as exemplary, Oh teaches a memory system comprising:
a memory device configured to store data (Oh, [0047], The memory system 110 may operate to store data; [0049], The memory system 110 may include a memory device 150.); and
a memory controller (Oh, [0049], The memory system 110 may include … a controller 130; Fig.1) coupled to the memory device and configured to:
determine an available sub-region of a first memory region marked as a bad block in the memory device (Oh, [0136], the memory system 110, in accordance with an embodiment, may operate in such a way as to allow a super memory block, which includes a bad memory block as will be described below with reference to FIGS. 7 to 9, to utilize all good memory blocks; [0188]; [0195]), wherein the bad block comprise a first memory region (good memory block) and a second memory region (bad memory block) determined to be unusable (Oh, [0101], Such a memory block, which has poor durability, may be determined as a bad memory block because it does not perform a normal operation; [0105], Referring to FIG. 6B, it may be seen that one or more memory blocks among the 32 memory blocks … among all of super memory blocks SUPER in the memory device 150, are determined as bad memory blocks; [0188], BAD+SUPERBLOCK1), and a proportion of the second memory region in the bad block is equal to or larger than two-thirds (Oh, [0154], the controller 130 manages first super blocks SUPER BLOCK<1,4>, each of which includes a number of bad memory blocks that exceeds the preset number; Note – for example, preset number could be 6 or greater, which makes the ratio of bad blocks in a superblock 6/8);
determine a health level of the available sub-region;
determine a storage level of first data, wherein the determination of the storage level is based on a reading frequency and a writing order of the first data, wherein the first data is written at a first time and second data is written at a second time, the first time before the second time, and wherein the storage level of the first data is higher than a storage level of the second data; and
write the first data into the available sub-region based on the health level of the available sub-region and storage level of the first data,.
Oh does not explicitly teach determine a health level of the available sub-region; determine a storage level of first data, wherein the determination of the storage level is based on a reading frequency and a writing order of the first data, wherein the first data is written at a first time and second data is written at a second time, the first time before the second time, and wherein the storage level of the first data is higher than a storage level of the second data; and write the first data into the available sub-region based on the health level of the available sub-region and storage level of the first data, as claimed.
However, Oh in view of Alrod teaches determine a health level of the available sub-region (Alrod, col.5, lines 6-29, the controller 116 calculates or otherwise determines a health score for each block);
determine a storage level of first data, wherein the determination of the storage level is based on a reading frequency of the first data (Alrod, col.2, line 58 – col.3, line 2; Random data (e.g., pushed data, temporary data, operating system data and random access data) may be i) … ii) read frequently; col.5, lines 48-67, the controller 116 may deduce the category (e.g., random access or sequential) of data from past pattern of usage information, such as the file the data is associated with, the frequency of usage; col.6, lines 13-29); and
write the first data into the available sub-region based on the health level of the available sub-region and storage level of the first data (Alrod, abstract, sequential type data is written to unhealthy blocks and non-sequential data is written to healthy blocks; col.5, lines 30-47, the health mapper maps health scores/ranges to data types (e.g., random data, sequential data, or sub-types of random or sequential data); col.8, lines 27-49).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Oh to incorporate teachings of Alrod to determine a health level for each memory block as well as data usage frequency in order to store data of a specific usage frequency into memory blocks of a specific health level. A person of ordinary skill in the art would have been motivated to combine the teachings of Oh with Alrod because it improves efficiency of the storage system disclosed in Oh by storing more frequently accessed data in healthy blocks in order to achieve better wear leveling.
The combination of Oh does not explicitly teach storage level is based on a writing order of the first data, wherein the first data is written at a first time and second data is written at a second time, the first time before the second time, and wherein the storage level of the first data is higher than a storage level of the second data, as claimed.
However, the combination of Oh in view of Yan teaches a writing order of the first data, wherein the first data is written at a first time and second data is written at a second time, the first time before the second time, and wherein the storage level of the first data is higher than a storage level of the second data (Yan, [0042], writing priorities of the preprocessed data blocks are determined according to at least one of a writing sequence in the writing strategy and caching durations of the preprocessed data blocks in the first partition).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the combination of Oh to incorporate teachings of Yan to determine storage level/writing priority of data based on writing sequence and access frequency. A person of ordinary skill in the art would have been motivated to combine the teachings of the combination of Oh with Yan because it improves efficiency of the storage system disclosed in the combination of Oh by writing the data with higher priorities first.
Claims 1 and 20 have similar limitations as claim 11 and they are rejected for the similar reasons.
Regarding claims 2 and 12, taking claim 12 as exemplary, the combination of Oh teaches all the features with respect to claim 11 as outlined above. The combination of Oh further teaches the memory system of claim 11, wherein the memory controller is further configured to write the first data into the available sub-region according to a priority order, wherein the priority order is based on the health level of one or more available sub-regions of the first memory region ordered from high to low available sub-regions ordered from high to low (Yan, [0042]; Alrod, col.6, lines 1-12, the controller 116 determines a desired partition 114 using enhanced file-tagging information from the host 101. For example, the host 101 can … indicate a priority level for the data; col.8, lines 27-49, the controller ranks the blocks according to health … For example, the controller assigns a first block to a first partition, such as the partition 114A, associated with a random data type when the health score of the first block satisfies (e.g., is higher than) a first predetermined threshold (e.g., the health score falling within a first health score range). In another example, the controller assigns a second block to a second partition, such as the partition 114N, associated with a sequential data type when the health score of the second block satisfies (e.g., is lower than) a second predetermined threshold (e.g., the health score falling within a second health score range lower than the first health score range) ).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Oh to incorporate teachings of Alrod to determine a health level for each memory block as well as data usage frequency in order to store data of a specific usage frequency into memory blocks of a specific health level. A person of ordinary skill in the art would have been motivated to combine the teachings of Oh with Alrod because it improves efficiency of the storage system disclosed in Oh by storing more frequently accessed data in healthy blocks in order to achieve better wear leveling.
Claim 2 has similar limitations as claim 12 and is rejected for the similar reasons.
Regarding claims 3 and 13, taking claim 13 as exemplary, the combination of Oh teaches all the features with respect to claim 11 as outlined above. The combination of Oh further teaches the memory system of claim 11, wherein the memory controller is further configured to write the first data into the available sub-region of the corresponding health level based on the storage level (Alrod, abstract, sequential type data is written to unhealthy blocks and non-sequential data is written to healthy blocks; col.2, line 58 – col.3, line 2, Random data … may be i) … ii) read frequently).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Oh to incorporate teachings of Alrod to determine a health level for each memory block as well as data usage frequency in order to store data of a specific usage frequency into memory blocks of a specific health level. A person of ordinary skill in the art would have been motivated to combine the teachings of Oh with Alrod because it improves efficiency of the storage system disclosed in Oh by storing more frequently accessed data in healthy blocks in order to achieve better wear leveling.
Claim 3 has similar limitations as claim 13 and is rejected for the similar reasons.
Regarding claims 5 and 15, taking claim 15 as exemplary, the combination of Oh teaches all the features with respect to claim 11 as outlined above. The combination of Oh further teaches the memory system of claim 11, wherein the memory controller is further configured to determine the storage level to which the first data belongs according to an importance degree (Alrod, col.6, lines 1-12, the controller 116 determines a desired partition 114 using enhanced file-tagging information from the host 101. For example, the host 101 can … indicate a priority level for the data).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Oh to incorporate teachings of Alrod to determine storage level of data based partially on importance degree. A person of ordinary skill in the art would have been motivated to combine the teachings of Oh with Alrod because it improves efficiency of the storage system disclosed in Oh by storing more frequently accessed data in healthy blocks in order to achieve better wear leveling.
Claim 5 has similar limitations as claim 15 and is rejected for the similar reasons.
Regarding claims 6 and 16, taking claim 16 as exemplary, the combination of Oh teaches all the features with respect to claim 13 as outlined above. The combination of Oh further teaches the memory system of claim 13, wherein the memory controller is further configured to: obtain a first mapping relationship, wherein the first mapping relationship includes a corresponding relationship between the storage level and the corresponding health level; and write the first data to be stored into the available sub-regions of the corresponding health level based on the first mapping relationship and the storage level corresponding to the first data to be stored (Alrod, abstract, sequential type data is written to unhealthy blocks and non-sequential data is written to healthy blocks.; col.7, lines 27-46, the controller 116 determines a data type of the non-compliant data and/or health of a block that the non-compliant data is programmed to. In some embodiments, responsive to the non-compliant data being a first data type (e.g., random data) and the health of a block satisfying a threshold (e.g., having a health score that is lower than the health score range mapping to sequential data), the controller 116 re-programs the data to new block using the updated health score and health mapper.).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Oh to incorporate teachings of Alrod to determine a health level for each memory block as well as data usage frequency in order to store data of a specific usage frequency into memory blocks of a specific health level. A person of ordinary skill in the art would have been motivated to combine the teachings of Oh with Alrod because it improves efficiency of the storage system disclosed in Oh by storing more frequently accessed data in healthy blocks in order to achieve better wear leveling.
Claim 6 has similar limitations as claim 16 and is rejected for the similar reasons.
Regarding claims 9 and 19, taking claim 19 as exemplary, the combination of Oh teaches all the features with respect to claim 11 as outlined above. The combination of Oh further teaches the memory system of claim 11, wherein the memory controller is further configured to maintain a management table, wherein the management table is configured to record management information of the available sub-region in the first memory regions included in the bad block (Oh, [0187], in the case of the zeroth super memory block SUPER BLOCK<0>, among the third super blocks BAD+SUPERBLOCK1, one memory block corresponding to the zeroth plane PLANE<0> of the zeroth die DIE<0> is a bad memory block, and the remainder are good memory blocks. Thus, the value of the state bitmap G/B BITMAP corresponding to the zeroth super memory block SUPER BLOCK<0> is ‘10000000’; Fig.9), and wherein the management information includes at least address information of the available sub-region (Note – address of zeroth plane PLANE<0> of the zeroth die DIE<0> is a bad memory block).
Regarding claim 10, the combination of Oh teaches all the features with respect to claim 9 as outlined above. The combination of Oh does not explicitly teach the operating method of claim 9, wherein the operating method further comprises: determining a storage requirement of the second data to be stored; checking the management table when it is determined that the storage requirement of the second data is that the second data can be stored in the available sub-region; storing the second data in the available sub-region when the available sub-region exist in the management table (Oh, [0195]-[0196], [0197], In this way, the controller 130 stores the map data in only the good memory blocks of the third super blocks BAD+SUPERBLOCK1 as a result of checking the state bitmap G/B BITMAP; [0198]-[0200]); and storing the second data in a third memory region that does not contain a bad block mark when the available sub-region does not exist in the management table (Oh, [0152], Thus, each of the normal super memory blocks SUPER BLOCK<5:N−3, N−1, N>, in which no bad memory block is included, satisfy the condition of the access processing unit being the super memory block unit because the eight memory blocks are accessed at once.).
Claim(s) 4, 8, 14, and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over the combination of Oh, Alrod, and Yan as applied to claims 2 and 12 respectively above, and further in view of Navon et al. (US 2016/0141029), hereinafter Navon.
Regarding claims 4 and 14, taking claim 14 as exemplary, the combination of Oh teaches all the features with respect to claim 12 as outlined above. The combination of Oh does not explicitly teach the memory system of claim 12, wherein the memory controller is further configured to: evaluate the available sub-region to determine a health status of the available sub-regions; and determine the health level of the available sub-region based on the health status of the available sub-regions, as claimed.
However, the combination of Oh in view of Navon the memory system of claim 12, wherein the memory controller is further configured to: evaluate the available sub-region to determine a health status (Note – parameters are construed as health values) of the available sub-regions; and
determine the health level (Note – for example, “healthy”, “unhealthy”, “faulty”) of the available sub-region based on the health status of the available sub-regions (Navon, [0033], The reliability data 128 may include the parameter data 122, health data, or a combination thereof. For example, the reliability data 128 may include the health data and may indicate a status (e.g., a health status) associated with a storage element. The status may be determined from a set of multiple statuses, such as a set that includes statuses of “healthy”, “unhealthy”, “faulty”, and/or one or more other statuses; [0034], In some implementations a first storage element that has a single parameter that fails to satisfy a corresponding threshold may be identified as healthier (e.g., less unhealthy) as compared to a second storage element with multiple parameters that each fail to satisfy corresponding thresholds).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the combination of Oh to incorporate teachings of Navon to determine a health level of a memory element based on its health status. A person of ordinary skill in the art would have been motivated to combine the teachings of the combination of Oh with Navon because it improves efficiency of the storage system disclosed in the combination of Oh by providing an aggregated health score for memory element based on multiple factors.
Claim 4 has similar limitations as claim 14 and is rejected for the similar reasons.
Regarding claims 8 and 18, taking claim 18 as exemplary, the combination of Oh teaches all the features with respect to claim 14 as outlined above. The combination of Oh further teaches the memory system of claim 14, wherein the memory controller is further configured to: obtain a second mapping relationship, wherein the second mapping relationship includes a corresponding relationship between the health status (Navon, [0034], parameter) and the health level of the available sub-region (Navon, [0033], statuses of “healthy”, “unhealthy”, “faulty”, and/or one or more other statuses;); and determine the health level of the available sub-region according to the second mapping relationship and the health status of the available sub-region (Navon,[0034], In response to a determination that the parameter does not satisfy the corresponding threshold or the corresponding threshold range, the reliability meter 126 may generate the reliability data 128 to indicate that the storage element has a status of unhealthy or faulty; [0062]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Navon to incorporate teachings of Liu to define a memory block being unusable when the program/erase (P/E) cycle of the memory block exceeds a threshold, which is similar to a faulty memory block disclosed in Navon. A person of ordinary skill in the art would have been motivated to combine the teachings of Navon with Liu because it improves efficiency of the storage system disclosed in Navon to identify memory blocks that are unusable to prevent storing critical data in unusable memory blocks.
Claim 8 has similar limitations as claim 18 and is rejected for the similar reasons.
Claim(s) 7 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over the combination of Oh, Alrod, Yan, and Navon as applied to claims 4 and 14 respectively above, and further in view of Liu (US 2017/0351428), hereinafter Liu.
Regarding claims 7 and 17, taking claim 17 as exemplary, the combination of Oh teaches all the features with respect to claim 14 as outlined above. The combination of Oh further teaches the memory system of claim 14, wherein the memory controller is further configured to: determine an erase count of the available sub-regions and/or a usable lifetime of the available sub-region (Alrod, col.5, lines 6-29, the health score is based on the number of program/erase (P/E) cycles; Navon, [0054], The metrics 276 may be tracked on a storage element-by-storage element basis, on a wordline-by-wordline basis, on a block-by-block basis, on a die-by-die basis, and/or other basis … The one or more metrics 276 may track a program/erase (P/E) count (PEC)); and determine the health status based on the erase count and/or the usable lifetime (Navon, [0055], For example, the health meter 280 may apply a health scheme to one or more of the metrics 276, to the health data 214, or a combination thereof, to generate the health indicators 282), wherein the smaller the erase count and/or the longer the usable lifetime is, the better the health status is.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Navon to incorporate teachings of Liu to define a memory block being unusable when the program/erase (P/E) cycle of the memory block exceeds a threshold, which is similar to a faulty memory block disclosed in Navon. A person of ordinary skill in the art would have been motivated to combine the teachings of Navon with Liu because it improves efficiency of the storage system disclosed in Navon to identify memory blocks that are unusable to prevent storing critical data in unusable memory blocks.
The combination of Oh does not explicitly teach wherein the smaller the erase count and/or the longer the usable lifetime is, the better the health status is, as claimed.
However, the combination of Oh in view of Liu teaches wherein the smaller the erase count and/or the longer the usable lifetime is, the better the health status is (Liu, [0048], An erase block can exceed its P/E cycle limit, wear off, and the wear leveler 418 would mark it as being unusable).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified Oh to incorporate teachings of Liu to define better health status as lower P/E cycles. A person of ordinary skill in the art would have been motivated to combine the teachings of Oh with Liu because it improves efficiency of the storage system disclosed in Oh to identify memory blocks that are unusable in order to prevent storing critical data in unusable memory blocks.
Claim 7 has similar limitations as claim 17 and is rejected for the similar reasons.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/NANCI N WONG/Primary Examiner, Art Unit 2137