Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Remarks
Regarding claims 1 and 11:
The examiner considers the applicants’ remarks. However, these remarks are now moot under new grounds of rejection as posted in the updated office action below.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 7, 9, 11, 15, 16, 18 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bunandar (US 2021/0036783).
Regarding claim 1, Bunandar teaches a device comprising: an optical layer having one or more modulators (Fig. 3A, modulators 306/308) for optically encoding a first matrix (paragraph [0064], lines 1-3; paragraph [0083]) and a second matrix (paragraph [0066], lines 1-4; paragraph [0083]) and performing a multiplication operation (paragraph [0066], multiplication…) by successively amplitude modulating an optical input signal with the first matrix to produce a first modulated optical signal (paragraph [0065], The first amplitude modulators 306 may then output first optical signals that represent elements of the input vector in amplitudes (e.g., intensity) of the first optical signals), and further amplitude modulating the first modulated optical signal with the second matrix to produce an optical signal output (paragraph [0066], The received first optical signals may be modulated by the second amplitude modulators 308 to produce a second optical signal having an intensity representing a multiplication of the matrix element w.sub.pj and vector element x.sub.j in an amplitude of the output second optical signal); and an electrical layer connected to the optical layer, wherein the optical signal output is provided to the electrical layer and the optical signal output being converted to a photocurrent input (Fig. 3A, electrical layer comprising detector 310), and wherein a sign value is applied to the photocurrent input (paragraph [0112], it is possible to implement signed matrix and/or vector values using an XOR operation to pre-compute the sign of the computation and then setting the sign of the output electrical signal of the optical detectors 606, as shown in FIG. 6B. The circuit 600b may include an XOR operation 610, in some embodiments. The cathode orientation (e.g., of optical detectors 606) may be calculated by taking the sign of the input vector element x.sub.j and the sign of the matrix element w.sub.ij and performing an XOR operation on these signals. The output cathode orientation bit may set whether the current coming from the optical detector is positive or negative (e.g., the output cathode orientation bit may trigger a change in the arrangement or settings of switches 604 and 605 of circuit 600a)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the device taught in Fig. 3A with the teachings of Fig. 6B in order to set the sign of the output electrical signal in order to control the flow of the detector current (Bunandar: paragraph [0113]).
Regarding claim 7, Bunandar teaches the device of claim 1, wherein the multiplication operation comprises amplitude modulating the optical input signal with magnitude values of the first matrix using a first modulator to produce the first modulated optical signal (paragraph [0065], The first amplitude modulators 306 may then output first optical signals that represent elements of the input vector in amplitudes (e.g., intensity) of the first optical signals), and further amplitude modulating the first modulated optical signal with magnitude values of the second matrix using a second modulator to produce the optical signal output (paragraph [0066], The received first optical signals may be modulated by the second amplitude modulators 308 to produce a second optical signal having an intensity representing a multiplication of the matrix element w.sub.pj and vector element x.sub.j in an amplitude of the output second optical signal).
Regarding claim 9, Bunandar teaches the device of claim 1, wherein the electrical layer is connected to the optical layer via an electrical interconnect (Fig. 3A shows the detector performing the interconnect from the optical layer to the electrical layer).
Regarding claim 11, Bunandar teaches a method comprising: performing a multiplication operation (paragraph [0066], multiplication…) using a first matrix (paragraph [0064], lines 1-3; paragraph [0083]) and a second matrix (paragraph [0066], lines 1-4; paragraph [0083]) in an optical layer having one or more modulators for optically encoding the first matrix and the second matrix to produce an optical signal output, wherein performing the multiplication operation comprises successively amplitude modulating an optical input signal with the first matrix to produce a first modulated optical signal (paragraph [0065], The first amplitude modulators 306 may then output first optical signals that represent elements of the input vector in amplitudes (e.g., intensity) of the first optical signals), and further amplitude modulating the first modulated optical signal with the second matrix to produce the optical signal output (paragraph [0066], The received first optical signals may be modulated by the second amplitude modulators 308 to produce a second optical signal having an intensity representing a multiplication of the matrix element w.sub.pj and vector element x.sub.j in an amplitude of the output second optical signal); providing the optical signal output to an electrical layer; converting the optical signal output into a photocurrent input (Fig. 3A, electrical layer comprising detector 310); and applying a sign value to the photocurrent input in the electrical layer (paragraph [0112], it is possible to implement signed matrix and/or vector values using an XOR operation to pre-compute the sign of the computation and then setting the sign of the output electrical signal of the optical detectors 606, as shown in FIG. 6B. The circuit 600b may include an XOR operation 610, in some embodiments. The cathode orientation (e.g., of optical detectors 606) may be calculated by taking the sign of the input vector element x.sub.j and the sign of the matrix element w.sub.ij and performing an XOR operation on these signals. The output cathode orientation bit may set whether the current coming from the optical detector is positive or negative (e.g., the output cathode orientation bit may trigger a change in the arrangement or settings of switches 604 and 605 of circuit 600a)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the method taught in Fig. 3A with the teachings of Fig. 6B in order to set the sign of the output electrical signal in order to control the flow of the detector current (Bunandar: paragraph [0113]).
Regarding claim 15, Bunandar teaches the method of claim 11, wherein Bunandar teaches applying the sign value to the photocurrent input in the electrical layer further comprises performing an XOR operation on sign bits associated with the first matric and the second matrix (paragraph [0112], The circuit 600b may include an XOR operation 610, in some embodiments. The cathode orientation (e.g., of optical detectors 606) may be calculated by taking the sign of the input vector element x.sub.j and the sign of the matrix element w.sub.ij and performing an XOR operation on these signals. The output cathode orientation bit may set whether the current coming from the optical detector is positive or negative (e.g., the output cathode orientation bit may trigger a change in the arrangement or settings of switches 604 and 605 of circuit 600a)).
Regarding claim 16, Bunandar teaches the method of claim 11, wherein performing the multiplication operation comprises amplitude modulating the optical input signal with magnitude values of the first matrix using a first modulator to produce the first modulated optical signal (paragraph [0065], The first amplitude modulators 306 may then output first optical signals that represent elements of the input vector in amplitudes (e.g., intensity) of the first optical signals), and further amplitude modulating the first modulated optical signal with magnitude values of the second matrix using a second modulator to produce the optical signal output (paragraph [0066], The received first optical signals may be modulated by the second amplitude modulators 308 to produce a second optical signal having an intensity representing a multiplication of the matrix element w.sub.pj and vector element x.sub.j in an amplitude of the output second optical signal).
Regarding claim 18, Bunandar teaches the method of claim 11, wherein teaches the electrical layer is connected to the optical layer via an electrical interconnect (Fig. 3A shows the detector performing the interconnect from the optical layer to the electrical layer).
Regarding claim 20, Miscuglio in view of Bunandar teaches the method of claim 11, , wherein Bunandar teaches further comprising performing a summation operation (Fig. 3A shows summation at 312) with the photocurrent input after the sign value has been applied to the photocurrent input (paragraph [0111]).
Claim(s) 2, 5, 6, 10 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bunandar (US 2021/0036783) in view of Lazovich (US 2020/0334576).
Regarding claim 2, Bunandar teaches the device of claim 1.
Although Bunandar teaches detection via a detector in Fig. 3A, Bunandar doesn’t teach further including a direct-detection PD, and wherein the direct- detection PD converts the optical signal output into a photocurrent input.
Lazovich teaches a direct-detection PD, and wherein the direct- detection PD converts the optical signal output into a photocurrent input (paragraph [0182], The inventors have further recognized and appreciated that it is possible to perform signed matrix operations without the need of phase-sensitive measurements at all…a direct photodetector which measures the intensity of the light at that output mode).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the detection taught by Bunandar and incorporate direct detection as taught by Lazovich in order to perform matrix operations without the need of phase-sensitive measurements thereby decreasing the processing load on the device.
Regarding claim 5, Bunandar in view of Lazovich teaches the device of claim 2, wherein Bunandar teaches further including one or more switches on the electrical layer, wherein the one or more switches performs an XOR operation to apply the sign value to the photocurrent input (paragraph [0112], The circuit 600b may include an XOR operation 610, in some embodiments. The cathode orientation (e.g., of optical detectors 606) may be calculated by taking the sign of the input vector element x.sub.j and the sign of the matrix element w.sub.ij and performing an XOR operation on these signals. The output cathode orientation bit may set whether the current coming from the optical detector is positive or negative (e.g., the output cathode orientation bit may trigger a change in the arrangement or settings of switches 604 and 605 of circuit 600a)).
Regarding claim 6, Bunandar in view of Lazovich teaches the device of claim 2, wherein Bunandar teaches further including performing a summation operation (Fig. 3A shows summation at 312) with the photocurrent input after the sign value has been applied to the photocurrent input (paragraph [0111]).
Regarding claim 10, Bunandar teaches the device of claim 1.
Although Bunandar teaches detection via a detector in Fig. 3A, Bunandar doesn’t teach wherein the optical signal output is converted into the photocurrent input by a direct-detection photodetector on a photonic integrated circuit (PIC).
Lazovich teaches wherein the optical signal output is converted into the photocurrent input by a direct-detection photodetector (paragraph [0182], The inventors have further recognized and appreciated that it is possible to perform signed matrix operations without the need of phase-sensitive measurements at all…a direct photodetector which measures the intensity of the light at that output mode) on a photonic integrated circuit (PIC) (paragraph [0149]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the detection taught by Bunandar and incorporate direct detection as taught by Lazovich in order to perform matrix operations without the need of phase-sensitive measurements thereby decreasing the processing load on the device.
The device of claim 1, wherein the optical signal output is converted into the photocurrent input by a direct-detection photodetector on a photonic integrated circuit (PIC).
Regarding claim 12, Bunandar teaches the method of claim 11.
Although Bunandar teaches detection via a detector in Fig. 3A, Bunandar doesn’t teach wherein converting the optical signal output into the photocurrent input is done at a direct-detection PD.
Lazovich teaches a direct-detection PD, and wherein the direct- detection PD converts the optical signal output into a photocurrent input (paragraph [0182], The inventors have further recognized and appreciated that it is possible to perform signed matrix operations without the need of phase-sensitive measurements at all…a direct photodetector which measures the intensity of the light at that output mode).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the detection taught by Bunandar and incorporate direct detection as taught by Lazovich in order to perform matrix operations without the need of phase-sensitive measurements thereby decreasing the processing load on the device.
Claim(s) 8 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bunandar (US 2021/0036783) in view of Miscuglio (US 2023/0152667).
Regarding claim 8, Bunandar teaches the device of claim 1.
Although Bunandar teaches the modulators are amplitude modulators, Bunandar doesn’t teach wherein the one or more modulators are electro-absorption modulators.
Miscuglio teaches wherein the one or more modulators are electro-absorption modulators (paragraph [0027], electro-absorption modulators…).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the modulator taught by Bunandar and incorporate the EAM as taught by Miscuglio as a matter of simple substitution of one known amplitude modulator for another.
Regarding claim 17, Bunandar teaches the method of claim 11.
Although Bunandar teaches the modulators are amplitude modulators, Bunandar doesn’t teach wherein the one or more modulators are electro-absorption modulators.
Miscuglio teaches wherein the one or more modulators are electro-absorption modulators (paragraph [0027], electro-absorption modulators…).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the modulator taught by Bunandar and incorporate the EAM as taught by Miscuglio as a matter of simple substitution of one known amplitude modulator for another.
Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bunandar (US 2021/0036783) in view of Raghunathan (US 2019/0317287).
Regarding claim 19, Bunandar teaches the method of claim 18.
Although Bunandar teaches the optical and electrical layers, Bunandar don’t teach wherein the electrical interconnect is a copper pillar of less than 2 millimeters (mm) in length.
Raghunathan teaches wherein the electrical interconnect is a copper pillar of less than 2 millimeters (mm) in length (paragraph [0054], The electrical path from the PMD ASIC 105 to the electro-optical chip 220 may be a short path (e.g., a path shorter than 500 microns or shorter than 300 microns) from the front surface of the PMD ASIC 105, through the lower RDL 120 (which is adjacent to the front surface of the PMD ASIC 105), through the short copper pillars).
It would have been obvious to one of ordinary skill in the art before the effective filing of the invention to modify the device taught by Bunandar and incorporate the short path length of the interconnect as taught by Raghunathan in order to comprise a compact package with low cost (Raghunathan: paragraph [0003]).
Allowable Subject Matter
Claims 3, 4, 13 and 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See the notice of reference cited (PTO-892).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PRANESH K BARUA whose telephone number is (571)270-1017. The examiner can normally be reached on Mon-Sat: 11-8pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, David Payne can be reached on 5712723024. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PRANESH K BARUA/Examiner, Art Unit 2635
