Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 7-9, 11, 15-18 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Miscuglio (US 2023/0152667) in view of Bunandar (US 2021/0036783).
Regarding claim 1, Miscuglio teaches a device (Fig. 1) comprising: an optical layer having one or more modulators (paragraph [0019], carrying encoded data) for optically encoding a first matrix (Fig. 1, input matrix A; paragraph [0019]) and a second matrix (Fig. 1, input matrix B; paragraph [0020], input data B (2), which can also comprise optical data) and performing a multiplication operation using the first and the second matrix to produce an optical signal output (paragraph [0017], the PDPE (5) can perform any number of operations on the input…the operations include multiplication between two matrixes); and an electrical layer connected to the optical layer, wherein the optical signal output is provided to the electrical layer (paragraph [0027], FIG. 4 shows various Backend-Options at the output of the Tensor Assembly (100) and at the output of the PDPE (5), including a single detector (44)).
Although Micuglio teaches the electrical layer, Miscuglio doesn’t teach the electrical layer applies a sign value.
Bunandar teaches an electrical layer where a sign value is applied (paragraph [0112], it is possible to implement signed matrix and/or vector values using an XOR operation to pre-compute the sign of the computation and then setting the sign of the output electrical signal of the optical detectors 606, as shown in FIG. 6B. The circuit 600b may include an XOR operation 610, in some embodiments. The cathode orientation (e.g., of optical detectors 606) may be calculated by taking the sign of the input vector element x.sub.j and the sign of the matrix element w.sub.ij and performing an XOR operation on these signals. The output cathode orientation bit may set whether the current coming from the optical detector is positive or negative (e.g., the output cathode orientation bit may trigger a change in the arrangement or settings of switches 604 and 605 of circuit 600a)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the device taught by Miscuglio and incorporate implementing a signed value as taught by Bunandar in order to set the sign of the output electrical signal in order to control the flow of the detector current (Bunandar: paragraph [0113]).
Regarding claim 7, Miscuglio in view of Bunandar teaches the device of claim 1, wherein the one or more modulators perform the multiplication operation by successively amplitude modulating light with the first and the second matrix (taught by Miscuglio in paragraph [0051] and amplitude modulation shown in paragraph [0083] as taught by Bunandar).
Regarding claim 8, Miscuglio in view of Bunandar teaches the device of claim 1, wherein the one or more modulators are electro-absorption modulators (Miscuglio: paragraph [0027], electro-absorption modulators…).
Regarding claim 9, Miscuglio in view of Bunandar teaches the device of claim 1, wherein Miscuglio teaches the electrical layer is connected to the optical layer via an electrical interconnect (paragraph [0031]).
Regarding claim 11, Miscuglio teaches method comprising: performing a multiplication operation using a first matrix (Fig. 1, input matrix A; paragraph [0019]) and a second matrix (Fig. 1, input matrix B; paragraph [0020], input data B (2), which can also comprise optical data) in an optical layer having one or more modulators (paragraph [0019], carrying encoded data) for optically encoding the first and the second matrix to produce an optical signal output (paragraph [0017], the PDPE (5) can perform any number of operations on the input…the operations include multiplication between two matrixes); providing the optical signal output to an electrical layer, converting the optical signal output into a photocurrent input (paragraph [0027], FIG. 4 shows various Backend-Options at the output of the Tensor Assembly (100) and at the output of the PDPE (5), including a single detector (44)).
Although Micuglio teaches the electrical layer, Miscuglio doesn’t teach the applying a sign value to the photocurrent input in the electrical layer.
Bunandar teaches an electrical layer where a sign value is applied (paragraph [0112], it is possible to implement signed matrix and/or vector values using an XOR operation to pre-compute the sign of the computation and then setting the sign of the output electrical signal of the optical detectors 606, as shown in FIG. 6B. The circuit 600b may include an XOR operation 610, in some embodiments. The cathode orientation (e.g., of optical detectors 606) may be calculated by taking the sign of the input vector element x.sub.j and the sign of the matrix element w.sub.ij and performing an XOR operation on these signals. The output cathode orientation bit may set whether the current coming from the optical detector is positive or negative (e.g., the output cathode orientation bit may trigger a change in the arrangement or settings of switches 604 and 605 of circuit 600a)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the device taught by Miscuglio and incorporate implementing a signed value as taught by Bunandar in order to set the sign of the output electrical signal in order to control the flow of the detector current (Bunandar: paragraph [0113]).
Regarding claim 15, Miscuglio in view of Bunandar teaches the method of claim 11, wherein Bunandar teaches applying the sign value to the photocurrent input in the electrical layer further comprises performing an XOR operation (paragraph [0112], it is possible to implement signed matrix and/or vector values using an XOR operation to pre-compute the sign of the computation and then setting the sign of the output electrical signal of the optical detectors 606, as shown in FIG. 6B. The circuit 600b may include an XOR operation 610, in some embodiments. The cathode orientation (e.g., of optical detectors 606) may be calculated by taking the sign of the input vector element x.sub.j and the sign of the matrix element w.sub.ij and performing an XOR operation on these signals. The output cathode orientation bit may set whether the current coming from the optical detector is positive or negative (e.g., the output cathode orientation bit may trigger a change in the arrangement or settings of switches 604 and 605 of circuit 600a)).
Regarding claim 16, Miscuglio in view of Bunandar teaches the method of claim 11, wherein performing the multiplication operation using the first matrix and the second matrix further includes successively amplitude modulating light with the first and the second matrix (taught by Miscuglio in paragraph [0051] and amplitude modulation shown in paragraph [0083] as taught by Bunandar).
Regarding claim 17, Miscuglio in view of Bunandar teaches the method of claim 11, wherein the one or more modulators are electro-absorption modulators (Miscuglio: paragraph [0027], electro-absorption modulators…).
Regarding claim 18, Miscuglio in view of Bunandar teaches the method of claim 11, wherein Miscuglio teaches the electrical layer is connected to the optical layer via an electrical interconnect (paragraph [0031]).
Regarding claim 20, Miscuglio in view of Bunandar teaches the method of claim 11, , wherein Bunandar teaches further comprising performing a summation with the photocurrent input after the sign value has been applied to the photocurrent input (paragraph [0111]).
Claim(s) 2-6 and 12-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Miscuglio (US 2023/0152667) in view of Bunandar (US 2021/0036783) in view of Lazovich (US 2020/0334576).
Regarding claim 2, Miscuglio in view of Bunandar teaches the device of claim 1.
Although Miscuglio teaches detection via a single detector, Miscuglio doesn’t teach further including a direct-detection PD, and wherein the direct- detection PD converts the optical signal output into a photocurrent input.
Lazovich teaches a direct-detection PD, and wherein the direct- detection PD converts the optical signal output into a photocurrent input (paragraph [0182], The inventors have further recognized and appreciated that it is possible to perform signed matrix operations without the need of phase-sensitive measurements at all…a direct photodetector which measures the intensity of the light at that output mode).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the detection taught by Miscuglio and incorporate direct detection as taught by Lazovich in order to perform matrix operations without the need of phase-sensitive measurements thereby decreasing the processing load on the device.
Regarding claim 3, Miscuglio in view of Bunandar in further view of Lazovich teaches the device of claim 2, wherein Lazovich teaches the photocurrent input is transmitted into an integrated circuit (paragraph [0078], In some embodiments, the photonic processor 1-103 may be disposed on the same substrate as the optical receiver 1-105 (e.g., the photonic processor 1-103 and the optical receiver 1-105 are on the same chip)).
Regarding claim 4, Miscuglio in view of Bunandar in further view of Lazovich teaches the device of claim 3, wherein Lazovich teaches the integrated circuit is an application-specific integrated circuit (ASIC) (paragraph [0078], In some embodiments, the photonic processor 1-103 may be disposed on the same substrate as the optical receiver 1-105 (e.g., the photonic processor 1-103 and the optical receiver 1-105 are on the same chip)).
Regarding claim 5, Miscuglio in view of Bunandar teaches the device of claim 2, wherein Bunandar teaches further including one or more switches on the electrical layer, wherein the one or more switches performs an XOR operation to apply the sign value to the photocurrent input (paragraph [0112], it is possible to implement signed matrix and/or vector values using an XOR operation to pre-compute the sign of the computation and then setting the sign of the output electrical signal of the optical detectors 606, as shown in FIG. 6B. The circuit 600b may include an XOR operation 610, in some embodiments. The cathode orientation (e.g., of optical detectors 606) may be calculated by taking the sign of the input vector element x.sub.j and the sign of the matrix element w.sub.ij and performing an XOR operation on these signals. The output cathode orientation bit may set whether the current coming from the optical detector is positive or negative (e.g., the output cathode orientation bit may trigger a change in the arrangement or settings of switches 604 and 605 of circuit 600a)).
Regarding claim 6, Miscuglio in view of Bunandar teaches the device of claim 2, wherein Bunandar teaches further including performing a summation with the photocurrent input after the sign value has been applied to the photocurrent input (paragraph [0111]).
Regarding claim 12, Miscuglio in view of Bunandar teaches the method of claim 11.
Although Miscuglio teaches detection via a single detector, Miscuglio doesn’t teach wherein converting the optical signal output into the photocurrent input is done at a direct-detection PD.
Lazovich teaches a direct-detection PD, and wherein the direct- detection PD converts the optical signal output into a photocurrent input (paragraph [0182], The inventors have further recognized and appreciated that it is possible to perform signed matrix operations without the need of phase-sensitive measurements at all…a direct photodetector which measures the intensity of the light at that output mode).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the detection taught by Miscuglio and incorporate direct detection as taught by Lazovich in order to perform matrix operations without the need of phase-sensitive measurements thereby decreasing the processing load on the device.
Regarding claim 13, Miscuglio in view of Bunandar in further view of Lazovich teaches the method of claim 12, wherein Lazovich teaches the photocurrent input from the direct-detection PD is transmitted into an integrated circuit (paragraph [0078], In some embodiments, the photonic processor 1-103 may be disposed on the same substrate as the optical receiver 1-105 (e.g., the photonic processor 1-103 and the optical receiver 1-105 are on the same chip)).
Regarding claim 14, Miscuglio in view of Bunandar in further view of Lazovich teaches the method of claim 13, wherein Lazovich teaches the integrated circuit is an application-specific integrated circuit (ASIC) (paragraph [0078], In some embodiments, the photonic processor 1-103 may be disposed on the same substrate as the optical receiver 1-105 (e.g., the photonic processor 1-103 and the optical receiver 1-105 are on the same chip)).
Claim(s) 10 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Miscuglio (US 2023/0152667) in view of Bunandar (US 2021/0036783) in view of Raghunathan (US 2019/0317287).
Regarding claim 10, Miscuglio in view of Bunandar teaches the device of claim 9.
Although Miscuglio in view of Bunandar teaches the optical and electrical layers, Miscuglio in view of Bunandar don’t teach wherein the electrical interconnect is a copper pillar of less than 2 millimeters (mm) in length.
Raghunathan teaches wherein the electrical interconnect is a copper pillar of less than 2 millimeters (mm) in length (paragraph [0054], The electrical path from the PMD ASIC 105 to the electro-optical chip 220 may be a short path (e.g., a path shorter than 500 microns or shorter than 300 microns) from the front surface of the PMD ASIC 105, through the lower RDL 120 (which is adjacent to the front surface of the PMD ASIC 105), through the short copper pillars).
It would have been obvious to one of ordinary skill in the art before the effective filing of the invention to modify the device taught by Miscuglio in view of Bunandar and incorporate the short path length of the interconnect as taught by Raghunathan in order to comprise a compact package with low cost (Raghunathan: paragraph [0003]).
Regarding claim 19, Miscuglio in view of Bunandar teaches the method of claim 18.
Although Miscuglio in view of Bunandar teaches the optical and electrical layers, Miscuglio in view of Bunandar don’t teach wherein the electrical interconnect is a copper pillar of less than 2 millimeters (mm) in length.
Raghunathan teaches wherein the electrical interconnect is a copper pillar of less than 2 millimeters (mm) in length (paragraph [0054], The electrical path from the PMD ASIC 105 to the electro-optical chip 220 may be a short path (e.g., a path shorter than 500 microns or shorter than 300 microns) from the front surface of the PMD ASIC 105, through the lower RDL 120 (which is adjacent to the front surface of the PMD ASIC 105), through the short copper pillars).
It would have been obvious to one of ordinary skill in the art before the effective filing of the invention to modify the device taught by Miscuglio in view of Bunandar and incorporate the short path length of the interconnect as taught by Raghunathan in order to comprise a compact package with low cost (Raghunathan: paragraph [0003]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See the notice of reference cited (PTO-892).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PRANESH K BARUA whose telephone number is (571)270-1017. The examiner can normally be reached on Mon-Sat: 11-8pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, David Payne can be reached on 5712723024. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PRANESH K BARUA/Examiner, Art Unit 2635