DETAILED ACTION
This Office Action is in response to the Amendments filed 24 August 2026. Claims 1-9 are currently pending in this application. Claims 3, 5, 7-9 are currently withdrawn.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1 is/are rejected under 35 U.S.C. 103 as being unpatentable over Umemoto et. al (US 2020/0287027 A1) (newly cited) in view of Umemoto et. al (2019/0386122 A1) (of record).
Regarding Claim 1, Umemoto (‘027) discloses (as shown in Figs. 4, 5) A semiconductor device ([0057] FIG. 4 is a plan view of one of a plurality of unit transistors 70 included in the semiconductor device according to the first embodiment.) comprising: a substrate ([0061] substrate 60);
a bipolar transistor ([0057] FIG. 4 is a plan view of one of a plurality of unit transistors 70 included in the semiconductor device according to the first embodiment.) ([0076] the operation of the HBT) above the substrate (60),
the bipolar transistor (70) including a collector layer, a base layer, and an emitter layer that are stacked in order from a substrate side; ([0061] Of both surfaces of the substrate 60, the one surface where the subcollector layer 20 is formed is referred to as a main surface. The collector layer 21, the base layer 22, and the emitter layer 23 are stacked in this order above a partial region of the subcollector layer 20.)
at least one emitter electrode ([0063] The emitter electrode 33) above the emitter layer (23), ([0063] The emitter electrode 33 is disposed on the emitter mesa layer 25.)
the emitter electrode (33) being electrically coupled to the emitter layer (23); ([0037] he emitter electrode 33 is formed from a metal and is in ohmic contact with the emitter mesa layer 25)
an interlayer insulating film , ([0064] An insulating film 61) on the emitter electrode (33), ([0064] An insulating film 61 is disposed in such a manner as to cover the collector electrodes 31, the base electrode 32, and the emitter electrode 33)
and at least one emitter contact hole ([0041] the emitter aperture 37) in the interlayer insulating film (61), ([0064] the emitter aperture 37 provided in the insulating film 61)
the emitter contact hole (37) being surrounded by the emitter electrode (33) when viewed in plan view; (See Fig. 4)
and an emitter wire ([0064] The emitter wiring line E1) on the interlayer insulating film (61), ([0064] On the insulating film 61, the emitter wiring line E1 and the collector wiring lines C1 are disposed.)
the emitter wire (E1) being coupled to the emitter electrode (33) through the emitter contact hole (37), wherein when viewed in plan view, ([0064] The emitter wiring line E1 is connected to the emitter electrode 33 passing through the emitter aperture 37 provided in the insulating film 61.)
the emitter electrode (33) and the emitter contact hole (37) are elongated in a longitudinal direction, (See Fig. 4)
an end of the emitter wire (E1) extending in the longitudinal direction is located between, in a width direction perpendicular to the longitudinal direction, an end of the emitter electrode (33) and an end of the emitter layer (23) nearest to the end of the emitter electrode (33). (See Fig. 4, showing the emitter wire E1 extends between emitter electrode 33 and the emitter layer 23 in the width direction)
However, Umemoto (‘027) fails to disclose:
a first condition is satisfied with respect to the at least one emitter electrode and the emitter contact hole surrounded by the emitter electrode when viewed in plan view; such that in the first condition, a length of the emitter contact hole is 85% or less of a length of the emitter electrode, and of two side ends of the emitter electrode, a distance from each side end to the emitter contact hole is 5% or more of the length of the emitter electrode.
Umemoto (‘122) discloses (as shown in Figs. 4-5, 14A):
and a first condition is satisfied with respect to the at least one emitter electrode ([0064] emitter electrode 32) and the emitter contact hole ([0047] contact hole 33) surrounded by the emitter electrode (32) when viewed in plan view;
such that in the first condition, a length of the emitter contact hole (33) is 85% or less of a length of the emitter electrode (32), and of two side ends of the emitter electrode (32), a distance from each side end to the emitter contact hole (33) is 5% or more of the length of the emitter electrode. ([0106] In one example, the distance a1 with respect to the longitudinal direction and the distance a2 with respect to the width direction are each about 0.5 μm or less, and the distance b1 with respect to the longitudinal direction is 4 μm or more… [0110] Each of the emitter layers 31 has a length of 40 μm and a width of 3 μm)
Therefore, as shown in Fig. 14A, the emitter electrode (32) has a length of the emitter layer (31) minus 2*a1. This means the emitter electrode (32) has a length of at least 39 µm (40 µm – 2*(<0.5 µm)). The emitter contact hole (33) has a length of the emitter layer (31) minus 2*b1. This means the emitter contact hole (32) has a length of at most 32 µm (40 µm – 2*(>4 µm)). Therefore, the emitter contact hole (33) is at most ~82% (32 µm/39 µm).
Furthermore, the emitter electrode (32) extends beyond the contact hole (33) in the extension direction by the length b1 (from the end of the contact hole 33 to the end of the emitter layer 31) minus the length a1 (from the end of the contact hole 33 to the end of the emitter layer 31). This means the distance between the end of the emitter electrode (32) and the contact hole (31) is b1 (>4 µm) – a1 (<0.5µm). Therefore, the distance between the end of the emitter electrode (32) and the contact hole (31) is at least 3.5 µm. This means the distance from the ends of the emitter contact hole (33) is at least ~9% (3.5 µm/ 39µm)
Umemoto ('027) fails to disclose the specific relative dimensions of the contact hole and emitter electrode. Umemoto ('122) discloses these specific dimensions. Umemoto ('122) teaches that increasing the distance between the end of the contact hole (33) and the end of the emitter layer (31) increases the transition voltage. ([0111] With an increase in the distance b1 with respect to the longitudinal direction from about 3 μm to about 10 μm, the transition voltage Vt gradually increases.) Umemoto (‘122) further teaches that increasing the transition voltage increases the safe operating range of the device. ([0005] It is desirable to extend the SOA by increasing the transition voltage so that the HBT is operated at a high collector voltage without being damaged even if a change in the load occurs) Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the application to apply the dimensions taught in Umemoto (‘122) in order to increase the transition voltage, thereby increasing the safe operating voltage of the device.
Regarding Claim 2, Umemoto (‘027) further discloses (as shown in Fig. 4) wherein the emitter wire (E1) is within an area having the collector layer (21) and the base layer (22) in a longitudinal direction of the emitter electrode (23). (See Fig. 4, showing the emitter wire E1 is in an area over the collector layer 21 and base layer 22)
Claim interpretation Note: the claim does not require the emitter wire e1 to be entirely within an area having the collector layer and the base layer in a longitudinal direction of the emitter electrode. As long as part of thee emitter wire is in this area, the claim is satisfied under BRI
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Umemoto (‘027) in view of Umemoto (‘122) as applied to claim 1 above, and further in view of Sasaki et. al (US 2021/0083080 A1) (of record) and Kurokawa (US 2019/0172806 A1) (of record).
Regarding Claim 4, Umemoto (‘027) in view of Umemoto (‘122) fails to disclose a conductive raised portion on the emitter wire (E1), the conductive raised portion being configured to be coupled to an external circuit, wherein the conductive raised portion is electrically coupled to the emitter wire (E1).
Sasaki discloses (as shown in Figs. 1, 5A-B) a conductive raised portion ([0073] The second-layer emitter line E2 extends through a cavity EV2 in the insulating film disposed thereunder and is electrically connected to the first-layer emitter line E1 accordingly... An emitter bump E3 is disposed so as to be in contact with the second-layer emitter line E2 in the cavity EV3.) on the emitter wire (E1), wherein the conductive raised portion (E2-3) is electrically coupled to the emitter wire (E1). ([0073] The second-layer emitter line E2 extends through a cavity EV2 in the insulating film disposed thereunder and is electrically connected to the first-layer emitter line E1 accordingly... An emitter bump E3 is disposed so as to be in contact with the second-layer emitter line E2 in the cavity EV3.)
Sasaki teaches that the second-layer emitter line E2 is part of a heat transfer path which increases the efficiency of heat transfer. ([0101] The cavity EV2 is provided to form a connection between the first-layer emitter line E1 and the second-layer emitter line E2. When viewed in plan, the cavity EV2 in the second example has an area greater than the area of the cavity EV2 in the first example. This configuration increases the cross-sectional area of the heat transfer path extending from the heat generation region of the bipolar transistor to the emitter bump E3 and reduces the thermal resistance in the heat transfer path accordingly. Consequently, the efficiency of heat transfer from the heat generation region may be enhanced.) Therefore, it would have been obvious to include a second-layer emitter line, as in Sasaki, in Umemoto (‘027) in view of Umemoto (‘122) in order to increase the efficiency of heat transfer.
However, Sasaki fails to disclose the conductive raised portion (E3) being configured to be coupled to an external circuit,
Kurokawa discloses (as shown in Fig. 2) the conductive raised portion ([0050] the bump 30 ) being configured to be coupled to an external circuit. ([0050] Thus, in addition to its original function of serving as an external connection terminal, the bump 30 also functions as a collective wiring line that connects the two conductor patterns of the emitter electrodes E0 to each other.)
Kurokawa teaches that the bump (30) serves two function of connecting the emitter electrodes together and serving as an external connection terminal. Kurokawa further teaches that doing so allows the manufacturing cost to be reduced by not needing to provide wiring lines crossed with collector collective wiring.
([0050] Thus, in addition to its original function of serving as an external connection terminal, the bump 30 also functions as a collective wiring line that connects the two conductor patterns of the emitter electrodes E0 to each other. Therefore, there is no need to provide wiring lines that are crossed with the collector collective wiring line CC as illustrated in FIG. 3.
[0051] As described above, since there is no need to provide two wiring line layers in the first embodiment, the number of wiring line layers can be reduced compared with the comparative example (FIG. 3). As a result of the number of wiring line layers being reduced, a reduction in manufacturing cost can be achieved.)
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the application to have the bump (E3) in Sasaki serve additional functions of connecting the emitter electrodes together and serving as an external connection terminal, as in Kurokawa, in order to reduce manufacturing costs.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Umemoto (‘027) in view of Umemoto (‘122) as applied to claim 1 above, and further in view of Sasaki et. al (US 2021/0083080 A1) (of record) and Kurokawa (US 2019/0172806 A1).
Regarding Claim 6, Umemoto (‘027) in view of Umemoto (‘122) fails to disclose a conductive raised portion on the emitter wire (E1), the conductive raised portion being configured to be coupled to an external circuit, wherein the conductive raised portion is electrically coupled to the emitter wire (E1).
Sasaki further discloses (as shown in Figs. 1, 5A-B) a conductive raised portion ([0073] The second-layer emitter line E2 extends through a cavity EV2 in the insulating film disposed thereunder and is electrically connected to the first-layer emitter line E1 accordingly... An emitter bump E3 is disposed so as to be in contact with the second-layer emitter line E2 in the cavity EV3.) on the emitter wire (E1), wherein the conductive raised portion (E2-3) is electrically coupled to the emitter wire (E1). ([0073] The second-layer emitter line E2 extends through a cavity EV2 in the insulating film disposed thereunder and is electrically connected to the first-layer emitter line E1 accordingly... An emitter bump E3 is disposed so as to be in contact with the second-layer emitter line E2 in the cavity EV3.)
Sasaki teaches that the second-layer emitter line E2 is part of a heat transfer path which increases the efficiency of heat transfer. ([0101] The cavity EV2 is provided to form a connection between the first-layer emitter line E1 and the second-layer emitter line E2. When viewed in plan, the cavity EV2 in the second example has an area greater than the area of the cavity EV2 in the first example. This configuration increases the cross-sectional area of the heat transfer path extending from the heat generation region of the bipolar transistor to the emitter bump E3 and reduces the thermal resistance in the heat transfer path accordingly. Consequently, the efficiency of heat transfer from the heat generation region may be enhanced.) Therefore, it would have been obvious to include a second-layer emitter line, as in Sasaki, in Umemoto (‘027) in view of Umemoto (‘122) in order to increase the efficiency of heat transfer.
However, Sasaki fails to disclose the conductive raised portion (E3) being configured to be coupled to an external circuit,
Kurokawa discloses (as shown in Fig. 2) the conductive raised portion ([0050] the bump 30 ) being configured to be coupled to an external circuit. ([0050] Thus, in addition to its original function of serving as an external connection terminal, the bump 30 also functions as a collective wiring line that connects the two conductor patterns of the emitter electrodes E0 to each other.)
Kurokawa teaches that the bump (30) serves two function of connecting the emitter electrodes together and serving as an external connection terminal. Kurokawa further teaches that doing so allows the manufacturing cost to be reduced by not needing to provide wiring lines crossed with collector collective wiring.
([0050] Thus, in addition to its original function of serving as an external connection terminal, the bump 30 also functions as a collective wiring line that connects the two conductor patterns of the emitter electrodes E0 to each other. Therefore, there is no need to provide wiring lines that are crossed with the collector collective wiring line CC as illustrated in FIG. 3.
[0051] As described above, since there is no need to provide two wiring line layers in the first embodiment, the number of wiring line layers can be reduced compared with the comparative example (FIG. 3). As a result of the number of wiring line layers being reduced, a reduction in manufacturing cost can be achieved.)
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the application to have the bump (E3) in Sasaki serve additional functions of connecting the emitter electrodes together and serving as an external connection terminal, as in Kurokawa, in order to reduce manufacturing costs.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASON JAMES GREAVING whose telephone number is (703)756-5653. The examiner can normally be reached 7:30am - 5:00 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached at (571)270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JASON JAMES GREAVING/Examiner, Art Unit 2893
/Britt Hanley/Supervisory Patent Examiner, Art Unit 2893
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