Prosecution Insights
Last updated: April 19, 2026
Application No. 18/476,038

CONFIGURATION VERIFICATION USING VARIABLE INPUTS AND HASH FUNCTIONS

Non-Final OA §101
Filed
Sep 27, 2023
Examiner
SHEPPERD, ERIC W
Art Unit
2492
Tech Center
2400 — Computer Networks
Assignee
Microsoft Technology Licensing, LLC
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
3y 2m
To Grant
99%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
401 granted / 519 resolved
+19.3% vs TC avg
Strong +35% interview lift
Without
With
+35.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
14 currently pending
Career history
533
Total Applications
across all art units

Statute-Specific Performance

§101
13.5%
-26.5% vs TC avg
§103
42.4%
+2.4% vs TC avg
§102
15.0%
-25.0% vs TC avg
§112
22.4%
-17.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 519 resolved cases

Office Action

§101
DETAILED ACTION This action is in response to the claims filed 10/7/2025. Claims 1-20 are pending. Claims 14-18 are withdrawn. Independent claims 1 and 19, and corresponding dependent claims are directed towards a device and method for configuration verification using variable inputs and hash functions. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Election/Restrictions Applicant’s election without traverse of Group I. Claims 1-13 and 19-20 in the reply filed on 10/07/2025 is acknowledged. Drawings The drawings are objected to because: Fig. 2B item 200 is not described in specification; Fig. 3 item 300 is not described in specification; Fig. 7 item 750 is not described in the specification; and Fig. 8 item 850 is not described in the specification. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Specification The disclosure is objected to because of the following informalities: the first recitation of the following acronyms is not expanded: [00078] CD-ROM; [00079] RF; [00089] EPROM, NVRAM, PRAM, DRAM and SRAM. Appropriate correction is required. Claim Rejections - 35 USC § 101 35 U.S.C. § 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-11 and 19-20 are rejected under 35 U.S.C. § 101 because the claimed invention is directed to non-statutory subject matter. Regarding claim 1, the claimed invention is directed to an abstract idea without significantly more. The claim(s) recite(s) a “computing device” comprising “at least one processor” and “memory”, the “computing device” performing “operations” that result in the generation of a “verification code” the entirety of which falls under the abstract idea enumerated grouping of mathematical concepts (see MPEP 2106.04(a) and 2106.04(a)(2)). This judicial exception is not integrated into a practical application because the claims fail to recite additional elements that integrate the judicial exception into a practical application. The entirety of the claim is directed towards mathematical calculations resulting in the generation of a “verification code”. The generated “verification code” is not being practically applied in any way (i.e. to be used to verify a user configuration). With regards to the “at least one processor” and “memory”, although not labelled as such these elements can be considered as processor/memory components of a general-purpose computer as the functionality to generate the “verification code” (i.e. the mathematical concept) can be performed by a general-purpose computer. The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception because computing devices, processors and memory, can be considered to be well-understood, routine, or conventional elements of a general-purpose computer. Claims 2-11 further fail to recite any meaningful limitations that integrate the judicial exception into a practical application to overcome the 35 U.S.C. §101 issues of Claim 1, discussed above, and are also rejected. Claims 12-13 provides meaningful limitations that integrate the judicial exception into a practical application, specifically, the comparison of verification codes and application of a configuration based on the comparison. Regarding claim 19, the claimed invention is directed to an abstract idea without significantly more. The claim(s) recite(s) a “method” that result in the generation of a “verification code” the entirety of which falls under the abstract idea enumerated grouping of mathematical concepts (see MPEP 2106.04(a) and 2106.04(a)(2)). This judicial exception is not integrated into a practical application because the claims fail to recite additional elements that integrate the judicial exception into a practical application. The entirety of the claim is directed towards mathematical calculations resulting in the generation of a “verification code”. The generated “verification code” is not being practically applied in any way (i.e. to be used to verify a user configuration). The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception because “replacing” (i.e. “storing”), can be considered to be well-understood, routine, or conventional elements of a general-purpose computer. Claim 20 further fails to recite any meaningful limitations that integrate the judicial exception into a practical application to overcome the 35 U.S.C. §101 issues of Claim 1, discussed above, and is also rejected. Allowable Subject Matter Claims 12-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 1-11 and 19-20 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 101, set forth in this Office action. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 1 and its dependent claims, the prior art of record fails to disclose or fairly suggest, in combination, a computing device for verifying user-selected configuration settings, in which a first hash configuration (detailing how to perform hash, hash input order, inputs types, algorithm, etc.) is received, after which a first request to change user configuration settings is received and a first verification code is generated based on the first hash configuration and configuration data received in the first request, after which the verification code is stored, the steps are repeated again with a second hash configuration and a second change request, in the specific manner and combination as recited in claim 1. Regarding claim 19 and its dependent claims, the prior art of record fails to disclose or fairly suggest, in combination, a method performed at a computing device, in which a verification code is generated by hashing a set of inputs comprising “configuration data associated with a configuration setting, a configuration item, a unique identifier associated with a user of the computing device, a timestamp associated with the configuration data, and a constant string”, the verification code is then used to replace a preexisting value in memory, in the specific manner and combination as recited in claim 19. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Suresh et al. (US 2022/0086010 A1) is related to order of inputs to a hash-based signature scheme. Dix et al. (US 2017/0346693 A1) is related to distribution of configuration data utilizing a blockchain. Petersen (US 2021/0075623 A1) is related to using hashing to verify data on a blockchain. Bettger (US 2019/0052467 A1) is related to generation of an acceptance hash code. Campagna et al. (US 2021/0326442 A1) is related to host attestation. Pedersen (US 9,832,022 B1) is related to hashing a data stream with multiple inputs. Scarlata (US 2007/0094719 A1) is related to hashes of platform configuration information. Kliewer et al. (US 2019/0163911 A1) is related to hashing BIOS configuration information. Hu et al. (US 2021/0334375 A1) is related to malicious event detection in computing environments. Babb (US 4,183,464) is related to a hash-coding storage arrangement. Lyman et al. (US 2010/0174807 A1) is related to configuration synchronicity. Zhu (US 2016/0323016 A1) is related to comparison of a verification code. Wang (US 2010/0058066 A1) is related to comparison of a configuration verification code upon boot. Bowers et al. (US 2017/0147827 A1) is related to integrity checking for computing devices. Sosiade et al. (US 2020/0382499 A1) is related to checking default configuration settings of a network device. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC W SHEPPERD whose telephone number is (571)270-5654. The examiner can normally be reached on Monday - Thursday, Alt. Friday, 7:30AM - 5:00PM, EST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rupal Dharia can be reached on (571)272-3880. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Eric W Shepperd/Primary Examiner, Art Unit 2492
Read full office action

Prosecution Timeline

Sep 27, 2023
Application Filed
Nov 15, 2025
Non-Final Rejection — §101 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
99%
With Interview (+35.0%)
3y 2m
Median Time to Grant
Low
PTA Risk
Based on 519 resolved cases by this examiner. Grant probability derived from career allow rate.

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