DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed June 24, 2026 has been entered. Claims 2-21 remain pending in the application. Applicant’s amendments to the specification and claims have overcome each and every objection previously presented in the Non-Final Office Action mailed March 25, 2026, hereafter referred to as the Non-Final Office Action.
Response to Arguments
Applicant's arguments filed June 24, 2026 have been fully considered but they are not persuasive. Applicant argues, see pages 1-5, that previously presented prior art reference Chang (Patent Publication Number US 2009/0174481 A1), as cited by applicant, hereafter referred to as Chang, fails to disclose the bias circuit and subthreshold biasing circuit, as claimed by the applicant, that previously presented prior art reference Troch et al. (Patent Publication Number EP 2,302,851 A1), as cited by applicant, hereafter referred to as Troch, additionally fails to teach the bias circuit and subthreshold biasing circuit, as claimed by the applicant, and that previously presented prior art reference Chakraborty et al. (Patent Publication Number US 2021/0050829 A1), as cited by applicant, hereafter referred to as Chakraborty, additionally fails to teach the subthreshold biasing circuit and lacks sufficient motivation to combine with Chang. Examiner respectfully disagrees.
Regarding applicant’s first argument, applicant states that the bias voltage of Chang VG_MAIN does not qualify as the claimed bias circuit, and that the bias circuit 424 of Chang does not qualify as the claimed subthreshold biasing circuit. However, as would be understood by one of ordinary skill in the art, the broadest reasonable interpretation of the claim term “bias circuit” would be a circuit that provides a bias voltage (or current). Under this interpretation, the bias voltage VG_MAIN does qualify, as it is a voltage source that provides a bias voltage, and a voltage source is a circuit. Based on applicant’s claims, no further details of the bias circuit are required to meet the claim limitation, so therefore the bias voltage of Chang VG_MAIN is a biasing circuit as claimed by the applicant.
Furthermore, as described in Chang, bias circuit 424 provides bias voltage VG_CANCEL to transistor 404, which is explicitly described as a subthreshold biasing voltage (Chang, Paragraph 45, lines 30-33, “Cancel FET 404 is based at a bias voltage VG_CANCEL such that cancel FET 404 is biased in its sub-threshold (also known as weak inversion) operating region.”). Therefore, bias circuit 424 is a subthreshold biasing circuit as claimed by the applicant.
Regarding applicant’s second argument, applicant states that Troch teaches a supply voltage switch network, and that therefore Troch fails to teach the biasing circuit and subthreshold biasing circuit as claimed by the applicant. In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). In this case, the biasing circuit and subthreshold biasing circuit as claimed are fully disclosed in Chang, and Troch is used merely to supply a switch network that enables switching between voltage levels provided to an amplifier. Regardless of the type of voltage provided, the circuit of Troch would enable switching between different voltage levels, which would have the benefit of providing a low-cost method to switch between different voltage levels (in this case, between bias voltage levels) (Troch, Paragraph 20, lines 1-4). Therefore, Troch does teach the bias voltage switch network as claimed by the applicant.
Regarding applicant’s third argument, applicant states that Chakraborty fails to teach a subthreshold biasing circuit and that the combination with Chang is impermissible hindsight due to a lack of motivation to combine. However, as described by Chakraborty, elements 704 and 801 of the circuit of Fig. 8 provide a bias to transconductance amplifier transistors 702, which are biased in a subthreshold region (Chakraborty, Paragraph 46, lines 1-3). Therefore, Chakraborty does teach a subthreshold biasing circuit.
Furthermore, in response to applicant's argument that the examiner's conclusion of obviousness is based upon improper hindsight reasoning, it must be recognized that any judgment on obviousness is in a sense necessarily a reconstruction based upon hindsight reasoning. But so long as it takes into account only knowledge which was within the level of ordinary skill at the time the claimed invention was made, and does not include knowledge gleaned only from the applicant's disclosure, such a reconstruction is proper. See In re McLaughlin, 443 F.2d 1392, 170 USPQ 209 (CCPA 1971). In this case, the motivation to combine provided in the Non-Final Office Action is that due to the subthreshold biasing circuit 424 of Chang lacking any specific details of any circuit elements, in order to properly implement the subthreshold biasing circuit 424 of Chang, one of ordinary skill in the art would be required to look elsewhere in the art to provide a suitable subthreshold biasing circuit to compensate for the lack of disclosure in Chang. As Chakraborty provides an example of a subthreshold biasing circuit used in the art, one of ordinary skill in the art would have sufficient motivation to combine it with Chang. Therefore, the motivation to combine Chang and Chakraborty in the Non-Final Office Action is sufficient without relying on improper hindsight reasoning.
Therefore, all of applicant’s arguments are unconvincing and the rejections of claims 2-21 are maintained.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-10 are rejected under 35 U.S.C. 103 as being unpatentable over Chang in view of Troch and Chakraborty.
Regarding claim 2, Chang discloses:
A variable gain amplifier circuit (Chang, Fig. 11), comprising: a first amplifier (Chang, Fig. 11, 402); a second amplifier (Fig. 11, 404); a biasing circuit (Fig. 11, VG_MAIN) configured to couple to the first amplifier (Fig. 11, see connection between VG_MAIN and 402) and a subthreshold biasing circuit (Fig. 11, 424) and configured to couple to the second amplifier (Fig. 11, see connection between 424 and 404), but fails to disclose a first switch coupled to the first amplifier; a second switch coupled to the second amplifier; [the biasing circuit configured to couple to the first amplifier] via the first switch; and [the biasing circuit] configured to couple to the second amplifier via the second switch; [the subthreshold biasing circuit] configured to couple to the first amplifier via the first switch [and configured to couple to the second amplifier] via the second switch; the subthreshold biasing circuit comprising a current source circuit and a first transistor coupled to the current source circuit, the first switch, and the second switch.
However, Troch teaches a first switch (Troch, Fig. 2, 41a) coupled to the first amplifier (Fig. 2, see connection between 41a and 10a); a second switch (Fig. 2, 41b) coupled to the second amplifier (Fig. 2, see connection between 41b and 10c); [the biasing circuit configured to couple to the first amplifier] via the first switch (Fig. 2, see connection between 3.3 V biasing supply and amplifier 10a via switch 41a); and [the biasing circuit] configured to couple to the second amplifier via the second switch (Fig. 2, see connection between 3.3 V biasing supply and amplifier 10c via switch 41b); [the subthreshold biasing circuit] configured to couple to the first amplifier via the first switch (Fig. 2, see connection between 1.2 V subthreshold biasing supply and amplifier 10a via switch 41a) [and configured to couple to the second amplifier] via the second switch (Fig. 2, see connection between 1.2 V subthreshold biasing supply and amplifier 10c via switch 41b); but fails to teach the subthreshold biasing circuit comprising a current source circuit and a first transistor coupled to the current source circuit, the first switch, and the second switch.
However, Chakraborty teaches the subthreshold biasing circuit (Chakraborty, Fig. 8, 700) comprising a current source circuit (Fig. 8, current source 704) and a first transistor (Fig. 8, 802a) coupled to the current source circuit (Fig. 8, see connection between 802a and 704), the first switch, and the second switch (Paragraph 44, lines 1-6).
Chang, Troch, and Chakraborty are all considered to be analogous to the claimed invention because they are in the same field of improving amplifiers used in radio frequency communications. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Chang to incorporate the teachings of Troch and Chakraborty to include the switch of Troch in the circuit of Chang to allow for the amplifiers of Chang to connect to varying biasing conditions, which would have the effect of providing a low-cost method to achieve multiple different biasing conditions (Troch, Paragraph 20, lines 1-4). Because Chang does not disclose any specific details of the circuit used for the subthreshold biasing circuit, one of ordinary skill in the art would have looked for relevant art for a suitable circuit, and would have found using the bias circuit of Chakraborty.
Regarding claim 3, Chang further discloses:
wherein the variable gain amplifier circuit is configured to combine an output of the first amplifier and an output of the second amplifier (Chang, Fig. 11, see connection between drain of 402 and drain of 404).
Regarding claim 4, Chang further discloses:
wherein the first amplifier is configured to generate a first amplified signal (Chang, Fig. 11, consider output signal of 402) and a first distortion signal based on coupling to the biasing circuit at a first time (Paragraph 49, lines 20-24), the second amplifier is configured to generate a first distortion cancelling signal based on coupling to the subthreshold biasing circuit at the first time(Paragraph 49, lines 20-21), the first distortion cancelling signal reducing a power of the first distortion signal (Paragraph 49, lines 21-24).
Regarding claim 5, Chang further discloses:
wherein the second amplifier is configured to generate a second amplified signal (Fig. 11, consider output signal of 404) and a second distortion signal based on coupling to the biasing circuit at a second time (Paragraph 49, lines 20-24, consider also connection between VG_MAIN and 404), the first amplifier is configured to generate a second distortion cancelling signal based on coupling to the subthreshold biasing circuit at the second time (Paragraph 49, lines 20-21, consider also connection between 424 and 402), the second distortion cancelling signal reducing a power of the second distortion signal (Paragraph 49, lines 21-24).
Regarding claim 6, Chang further discloses:
wherein the biasing circuit is configured to output a bias voltage equal to or above a bias voltage threshold (Chang, Fig. 11, see VG_MAIN, see also Paragraph 48, last four lines), the first amplifier and the second amplifier configured to amplify an input signal based on the bias voltage (Fig. 11, see connection between VG_MAIN and 402).
Regarding claim 7, Chang further discloses:
wherein the subthreshold biasing circuit is configured to output a first subthreshold nonzero bias voltage below a bias voltage threshold (Chang, Paragraph 45, lines 1-4 on Page 5), the first amplifier and the second amplifier being configured to generate first respective distortion cancelling signals based on the first subthreshold nonzero bias voltage (Paragraph 49, lines 20-21).
Regarding claim 8, Chang further discloses:
the first amplifier and the second amplifier being configured to generate second respective distortion cancelling signals based on the second subthreshold nonzero bias voltage (Chang, Paragraph 49, lines 20-21), but fails to disclose wherein the subthreshold biasing circuit comprises a second transistor configured to couple to the first transistor via a third switch, the subthreshold biasing circuit being configured to output a second subthreshold nonzero bias voltage below the bias voltage threshold based on the second transistor coupling to the first transistor via the third switch.
However, Chakraborty further teaches wherein the subthreshold biasing circuit comprises a second transistor (Chakraborty, Fig. 8, 802b) configured to couple to the first transistor via a third switch (Fig. 8, see connection between 802a and 802b via switch 804b), the subthreshold biasing circuit being configured to output a second subthreshold nonzero bias voltage below the bias voltage threshold (Paragraph 44, lines 1-6) based on the second transistor coupling to the first transistor via the third switch (Fig. 8, see connection between 802a and 802b via switch 804b).
Chang, Troch, and Chakraborty are all considered to be analogous to the claimed invention because they are in the same field of improving amplifiers used in radio frequency communications. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Chang to incorporate the teachings of Chakraborty. Because Chang does not disclose any specific details of the circuit used for the subthreshold biasing circuit, one of ordinary skill in the art would have looked for relevant art for a suitable circuit, and would have found using the bias circuit of Chakraborty.
Regarding claim 9, Chang further discloses:
the first amplifier and the second amplifier being configured to generate third respective distortion cancelling signals based on the third subthreshold nonzero bias voltage (Chang, Paragraph 49, lines 20-21), but fails to disclose wherein the subthreshold biasing circuit comprises a third transistor configured to couple to the second transistor via a fourth switch, the subthreshold biasing circuit being configured to output a third subthreshold nonzero bias voltage below the bias voltage threshold based on the third transistor coupling to the first transistor and the second transistor via the third switch and the fourth switch.
However, Chakraborty further teaches wherein the subthreshold biasing circuit comprises a third transistor (Chakraborty, Fig. 8, 802c) configured to couple to the second transistor via a fourth switch (Fig. 8, see connection between 802b and 802c via switch 804c), the subthreshold biasing circuit being configured to output a third subthreshold nonzero bias voltage below the bias voltage threshold (Paragraph 44, lines 1-6) based on the third transistor coupling to the first transistor and the second transistor via the third switch and the fourth switch (Fig. 8, see connection between 802b and 802c via switch 804c).
Chang, Troch, and Chakraborty are all considered to be analogous to the claimed invention because they are in the same field of improving amplifiers used in radio frequency communications. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Chang to incorporate the teachings of Chakraborty. Because Chang does not disclose any specific details of the circuit used for the subthreshold biasing circuit, one of ordinary skill in the art would have looked for relevant art for a suitable circuit, and would have found using the bias circuit of Chakraborty.
Regarding claim 10, Chang further discloses:
comprising a third amplifier (Chang, Fig. 11, 406), the biasing circuit configured to couple to the third amplifier (Fig. 11, see connection between VG_MAIN and 406), but fails to disclose [the biasing circuit configured to couple to the third amplifier] via a third switch, and the first transistor coupled to the current source circuit, the first switch, the second switch, and the third switch.
However, Troch further teaches [the biasing circuit configured to couple to the third amplifier] via a third switch (Troch, Fig. 2, see connection between 3.3 V biasing supply and 10b via 41a), but fails to teach and the first transistor coupled to the current source circuit, the first switch, the second switch, and the third switch.
However, Chakraborty further teaches and the first transistor coupled to the current source circuit (Chakraborty, Fig. 8, see connection between 802a and 704), the first switch, the second switch, and the third switch (Paragraph 44, lines 1-6).
Chang, Troch, and Chakraborty are all considered to be analogous to the claimed invention because they are in the same field of improving amplifiers used in radio frequency communications. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Chang to incorporate the teachings of Troch and Chakraborty to include the switch of Troch in the circuit of Chang to allow for the amplifiers of Chang to connect to varying biasing conditions, which would have the effect of providing a low-cost method to achieve multiple different biasing conditions (Troch, Paragraph 20, lines 1-4). Because Chang does not disclose any specific details of the circuit used for the subthreshold biasing circuit, one of ordinary skill in the art would have looked for relevant art for a suitable circuit, and would have found using the bias circuit of Chakraborty.
Claims 11-21 are rejected under 35 U.S.C. 103 as being unpatentable over Chang in view of Chakraborty.
Regarding claim 11, Chang discloses:
An electronic device (Chang, Figs. 3 and 11) comprising: an antenna (Fig. 3, 202); a first amplifier (Fig. 11, 402); a biasing circuit (Fig. 11, VG_MAIN) configured to couple to the first amplifier (Fig. 11, see connection between VG_MAIN and 402); a subthreshold biasing circuit (Fig. 11, 424) configured to couple to the first amplifier (Fig. 11, see connection between 424 and 404), and a processor coupled to the first amplifier (Paragraph 28, lines 8-12), the processor being configured to couple the biasing circuit and the subthreshold biasing circuit to the first amplifier (Fig. 11, see connections between VG_MAIN, 424, and 402), but fails to disclose the subthreshold biasing circuit comprising a current source circuit and a first transistor coupled to the current source circuit and the first amplifier.
However, Chakraborty teaches the subthreshold biasing circuit (Chakraborty, Fig. 8, 700) comprising a current source circuit (Fig. 8, current source 704) and a first transistor (Fig. 8, 802a) coupled to the current source circuit (Fig. 8, see connection between 802a and 704) and the first amplifier (Paragraph 44, lines 1-6).
Chang and Chakraborty are both considered to be analogous to the claimed invention because they are in the same field of improving amplifiers used in radio frequency communications. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Chang to incorporate the teachings of Chakraborty. Because Chang does not disclose any specific details of the circuit used for the subthreshold biasing circuit, one of ordinary skill in the art would have looked for relevant art for a suitable circuit, and would have found using the bias circuit of Chakraborty.
Regarding claim 12, Chang further discloses:
comprising a second amplifier (Chang, Fig. 11, 404), the processor being coupled to the second amplifier (Paragraph 28, lines 8-12), and the processor configured to couple the biasing circuit and the subthreshold biasing circuit to the second amplifier (Fig. 11, see connections between VG_MAIN, 424, and 404).
Regarding claim 13, Chang further discloses:
wherein the first amplifier is configured to generate an amplified signal (Chang, Fig. 11, consider output signal of 402) and a distortion signal based on coupling to the biasing circuit (Paragraph 49, lines 20-24), and the first amplifier is configured to generate a distortion cancelling signal based on coupling to the subthreshold biasing circuit (Paragraph 49, lines 20-21).
Regarding claim 14, Chang further discloses:
wherein the subthreshold biasing circuit is configured to output a first subthreshold nonzero bias voltage below a bias voltage threshold (Chang, Paragraph 45, lines 1-4 on Page 5), the first amplifier being configured to generate a first distortion cancelling signal based on the first subthreshold nonzero bias voltage (Paragraph 49, lines 20-21), the first distortion cancelling signal reducing a power of the distortion signal (Paragraph 49, lines 21-24).
Regarding claim 15, Chang further discloses:
the first amplifier being configured to generate a second distortion cancelling signal based on the second subthreshold nonzero bias voltage (Chang, Paragraph 49, lines 20-21), but fails to disclose wherein the subthreshold biasing circuit comprises a second transistor configured to couple to the first transistor, the subthreshold biasing circuit being configured to output a second subthreshold nonzero bias voltage below the bias voltage threshold based on the second transistor coupling to the first transistor.
However, Chakraborty further teaches wherein the subthreshold biasing circuit comprises a second transistor (Chakraborty, Fig. 8, 802b) configured to couple to the first transistor (Fig. 8, see connection between 802a and 802b via switch 804b), the subthreshold biasing circuit being configured to output a second subthreshold nonzero bias voltage below the bias voltage threshold (Paragraph 44, lines 1-6) based on the second transistor coupling to the first transistor (Fig. 8, see connection between 802a and 802b via switch 804b).
Chang and Chakraborty are both considered to be analogous to the claimed invention because they are in the same field of improving amplifiers used in radio frequency communications. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Chang to incorporate the teachings of Chakraborty. Because Chang does not disclose any specific details of the circuit used for the subthreshold biasing circuit, one of ordinary skill in the art would have looked for relevant art for a suitable circuit, and would have found using the bias circuit of Chakraborty.
Regarding claim 16, Chang further discloses:
comprising: a transmitter comprising the first amplifier (Chang, Paragraph 28, lines 10-12), the first amplifier configured to output amplified transmission signals to the antenna (Fig. 3, see connection between 204 and 202), or a receiver comprising the first amplifier (Paragraph 28, lines 10-12), the first amplifier configured to output amplified received signals to the processor (Fig. 3, see connection between 204 and 206).
Regarding claim 17, Chang discloses:
A transceiver (Chang, Figs. 3 and 11) comprising: a first amplifier (Fig. 11, 402) configured to couple to an antenna (Fig. 3, see connection between 202 and 204); a second amplifier (Fig. 11, 404) configured to couple to the antenna (Fig. 3, see connection between 202 and 204); a biasing circuit (Fig. 11, VG_MAIN) configured to couple to the first amplifier (Fig. 11, see connection between VG_MAIN and 402) and the second amplifier (Fig. 11, see connection between VG_MAIN and 404), the biasing circuit configured to generate a bias voltage equal to or above a bias voltage threshold (Fig. 11, see VG_MAIN, see also Paragraph 48, last four lines); and a subthreshold biasing circuit (Fig. 11, 424) configured to couple to the first amplifier (Fig. 11, see connection between 424 and 402) and the second amplifier (Fig. 11, see connection between 424 and 404), the subthreshold biasing circuit configured to generate a first subthreshold nonzero bias voltage below the bias voltage threshold (Chang, Paragraph 45, lines 1-4 on Page 5), but fails to disclose the subthreshold biasing circuit comprising a current source circuit and a first transistor coupled to the current source circuit and configured to couple to the first amplifier and the second amplifier.
However, Chakraborty teaches the subthreshold biasing circuit (Chakraborty, Fig. 8, 700) comprising a current source circuit (Fig. 8, current source 704) and a first transistor (Fig. 8, 802a) coupled to the current source circuit (Fig. 8, see connection between 802a and 704) and configured to couple to the first amplifier and the second amplifier (Paragraph 44, lines 1-6).
Chang and Chakraborty are both considered to be analogous to the claimed invention because they are in the same field of improving amplifiers used in radio frequency communications. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Chang to incorporate the teachings of Chakraborty. Because Chang does not disclose any specific details of the circuit used for the subthreshold biasing circuit, one of ordinary skill in the art would have looked for relevant art for a suitable circuit, and would have found using the bias circuit of Chakraborty.
Regarding claim 18, Chang further discloses:
wherein the first amplifier is configured to generate a first amplified signal (Chang, Fig. 11, consider output signal of 402) and a first distortion signal based on coupling to the biasing circuit at a first time (Paragraph 49, lines 20-24), the second amplifier is configured to generate a first distortion cancelling signal based on coupling to the subthreshold biasing circuit at the first time (Paragraph 49, lines 20-21), the first distortion cancelling signal reducing a power of the first distortion signal (Paragraph 49, lines 21-24).
Regarding claim 19, Chang further discloses:
wherein the second amplifier is configured to generate a second amplified signal (Fig. 11, consider output signal of 404) and a second distortion signal based on coupling to the biasing circuit at a second time (Paragraph 49, lines 20-24, consider also connection between VG_MAIN and 404), the first amplifier is configured to generate a second distortion cancelling signal based on coupling to the subthreshold biasing circuit at the second time (Paragraph 49, lines 20-21, consider also connection between 424 and 402), the second distortion cancelling signal being reducing a power of the second distortion signal (Paragraph 49, lines 21-24).
Regarding claim 20, Chang further discloses:
the first amplifier and the second amplifier being configured to generate second respective distortion cancelling signals based on the second subthreshold nonzero bias voltage (Chang, Paragraph 49, lines 20-21), but fails to disclose wherein the subthreshold biasing circuit comprises a second transistor configured to couple to the first transistor and the current source circuit, the subthreshold biasing circuit being configured to output a second subthreshold nonzero bias voltage below the bias voltage threshold based on the second transistor coupling to the first transistor and the current source circuit.
However, Chakraborty further teaches wherein the subthreshold biasing circuit comprises a second transistor (Chakraborty, Fig. 8, 802b) configured to couple to the first transistor (Fig. 8, see connection between 802a and 802b via switch 804b) and the current source circuit (Fig. 8, see connection between 802a and 704), the subthreshold biasing circuit being configured to output a second subthreshold nonzero bias voltage below the bias voltage threshold (Paragraph 44, lines 1-6) based on the second transistor coupling to the first transistor and the current source circuit (Fig. 8, see connection between 802a and 802b via switch 804b).
Chang and Chakraborty are both considered to be analogous to the claimed invention because they are in the same field of improving amplifiers used in radio frequency communications. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Chang to incorporate the teachings of Chakraborty. Because Chang does not disclose any specific details of the circuit used for the subthreshold biasing circuit, one of ordinary skill in the art would have looked for relevant art for a suitable circuit, and would have found using the bias circuit of Chakraborty.
Regarding claim 21, Chang further discloses:
comprising: a transmitter comprising the first amplifier and the second amplifier (Chang, Paragraph 28, lines 10-12), the first amplifier and the second amplifier configured to output amplified transmission signals to the antenna (Fig. 3, see connection between 204 and 202); or a receiver comprising the first amplifier and the second amplifier (Paragraph 28, lines 10-12), the first amplifier and the second amplifier configured to output amplified received signals received by the antenna (Fig. 3, see connection between 204 and 202).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Tabatabaei et al. (Patent Publication Number CA 3,052,176 A1) discloses (Fig. 9) an amplifier with bias signals controlled by a processor using a lookup table.
Wang et al. (Patent Publication Number US 2018/0091136 A1) discloses (Fig. 21B) an amplifier with a subthreshold biased amplifier path.
Cabanillas et al. (Patent Publication Number WO 2009/079491 A1) discloses (Figs. 6 and 9-10) subthreshold biased amplifiers.
Holenstein et al. (Patent Publication Number WO 2009/100387 A1) discloses subthreshold biased amplifiers.
Okanobu (Patent Publication Number US 2008/0186100 A1) discloses three amplifiers coupled in parallel.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lance T Bartol whose telephone number is (703)756-1267. The examiner can normally be reached Monday - Thursday 6:30 a.m. - 4:00 p.m. CT, Alternating Fridays 6:30 - 3:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Lindgren Baltzell can be reached at 571-272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/LANCE TORBJORN BARTOL/Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843
Prosecution Insights