DETAILED ACTION
This Action is in consideration of the Applicant’s response on July 8, 2026. Claims 1, 9, and 17 are amended by the Applicant. Claims 4, 12, and 20 are canceled. Claims 1 – 3, 5 – 11, and 13 – 19, where Claims 1, 9, and 17 are in independent form, are presented for examination.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed July 8, 2026 have been fully considered but they are moot based on the new grounds of rejection necessitated by amendment.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s)1 – 3, 5 – 11, and 13 – 19 are rejected under 35 U.S.C. 103 as being unpatentable over PGPub. 2023/00223470 (hereinafter “Deshpande”), in view of PGPub. 2021/0110235 (hereinafter “Hoang”).
1. Regarding Claims 1, 9, and 17, Deshpande discloses a non-transitory computer-readable medium storing instructions that, when executed by a processor (Claim 9), cause the processor to perform a method (Claim 1) [Fig. 14; Para. 0071], the method comprising
determining one or more groups of computing units computing units in a computing-in-memory (CIM) macro that are to be turned off , the CIM macro including an array of the computing units with dimensions of X rows and Y columns, the X rows of computing units being organized into N row-groups indexed from 0 to N-1, each row-group including one or more rows of computing units, the Y columns of computing units being organized into M column-groups indexed from 0 to M-1, each column-group including one or more columns of computing units [Figs. 6-10; Para. 0060-63];
based on the determination of the one or more groups of computing units that re to be turned off, turning off at least one row-group of computing units or at least one column-group of computing units, each row-group of computing units being separately controllable to be turned off , each column-group of computing units being separately controllable to be turned off by a corresponding column-control signal [Figs. 6-10; Para. 0060-63]; and
performing a computation based on kernel weights and activations of a neural network using the active computing units in the CIM macro that are not turned off [Figs. 6-10; Para. 0003, 0026, 0058-63];
Deshpande, however, does not specifically disclose of turning off one or more groups of computing units based on an operand-value-dependent inactivity condition of a neural network layer, wherein the operand-value-dependent inactivity condition comprises at least one of: determining that all kernel weights associated with an output channel of the neural network layer are zero; determining that activations corresponding to the at least one row-group of computing units are zero; or determining, corresponding to the at least one row-group of computing units, that second bit values corresponding to second bit positions of activations are the same as first bit values corresponding to neighboring first bit positions of the activations.
Hoang discloses a system and method for accelerating sparse matrix multiplication in convolutional neural networks [Abstract]. Hoang further discloses that during the CNN inferencing process, the all-zero columns and/or all-zero rows can be skipped to accelerate the CNN inference process (turning off one or more groups of computing units based on an operand-value-dependent inactivity condition of a neural network layer) [Para. 0062]. Hoang also discloses that one of the inactivity conditions comprises zero weights in the rows (determining that all kernel weights associated with an output channel of the neural network layer are zero, or determining that activations corresponding to the at least one row-group of computing units are zero) [Fig. 15; Para. 0068-70]. It would have been obvious to one skilled in the art before the effective filing date of the current invention to incorporate the teachings of Hoang with Deshpande since both systems use convolution neural networks to process data. The motivation to do so is to provide improved performance and reduced power consumption by skipping unnecessary computations [Hoang, Para. 0023].
2. Regarding Claims 2, 10, and 18, Deshpande, in view of Hoang, discloses the limitations of Claims 1, 9, and 17. Deshpande further discloses that the determining which computing units in a computing-in-memory (CIM) macro are to be turned off comprises:
determining a number of output channels (OCs) in a layer of the neural network [Fig. 1-3; Para. 0036-42];
determining a number of kernel weights corresponding to each OC, the kernel weights corresponding to each OC being to be mapped to a respective one of the Y columns of computing units [Fig. 1-3; Para. 0036-42];
in response to the number of OCs being smaller than Y, determining to turn off the column-groups of computing units to which no kernel weights are to be mapped; and in response to the number of kernel weights corresponding to each OC being smaller than X, determining to turn off the row-groups of computing units to which no kernel weights are to be mapped [Para. 0003, 0026, 0036-42, 0058-63].
3. Regarding Claims 3, 11, and 19, Deshpande, in view of Hoang, discloses the limitations of Claims 1, 9, and 17. Deshpande further discloses that determining which computing units in a computing-in-memory (CIM) macro are to be turned off comprises:
determining a number of output channels (OCs) in a layer of the neural network [Fig. 1-3; Para. 0036-42];
determining a number of kernel weights corresponding to each OC, the kernel weights corresponding to each OC being to be mapped to a respective one of the Y columns of computing units [Fig. 1-3; Para. 0036-42];
in response to the number of OCs being larger than Y, determining to turn off the
column-groups of computing units to which no kernel weights are to be mapped during
sequential computing cycles; and
in response to the number of kernel weights corresponding to each OC being larger than X, determining to turn off the row-groups of computing units to which no kernel weights are to be mapped during sequential computing cycles [Para. 0003, 0026, 0036-42, 0058-63].
4. Regarding Claims 5 and 13, Deshpande, in view of Hoang, discloses the limitations of Claims 1 and 9. Deshpande further discloses that determining which computing units in a computing-in-memory (CIM) macro are to be turned off comprises:
receiving a number of activations shared by a number of output channels (OCs) in a layer of the neural network, the activations shared by the OCs being to be mapped to respective ones of the Y columns of computing units [Para. 0003, 0026, 0036-42, 0058-63];
among the number of activations shared by the number of OCs, determining the
activations corresponding to the at least one row-group of computing units being zero [Para. 0003, 0026, 0036-42, 0058-63]; and
determining to turn off the at least one row-group of computing units [Para. 0003, 0026, 0036-42, 0058-63].
5. Regarding Claims 6 and 14, Deshpande, in view of Hoang, discloses the limitations of Claims 1 and 9. Deshpande further discloses of:
latching first activations to a first row-group of computing units at time t for a first neural network operation [Para. 0044, 0050-55];
determining whether second activations to be latched to the first row-group of computing units at time t+1 for a second neural network operation are the same as the first activations [Para. 0044, 0050-55]; and
in response the second activations to be latched to the first row-group of computing units at time t+1 for the second neural network operation are the same as the first activations, determining not to re-latch the second activations to the first row-group of computing units [Para. 0044, 0050-55].
6. Regarding Claims 7 and 15, Deshpande, in view of Hoang, discloses the limitations of Claims 1 and 9. Deshpande further discloses that the determining which computing units in a computing-in-memory (CIM) macro are to be turned off comprises:
receiving a number of activations shared by a number of OCs in a layer of the neural network, the activations shared by the OCs being to be mapped to respective ones of the Y columns of computing units and each including first bit position and second bit position neighboring each other [Para. 0003, 0026, 0036-42, 0058-63];
performing first multiplications based on first bit values corresponding to the first bit positions of the activations shared by the OCs in the array of the computing units [Para. 0003, 0026, 0036-42, 0058-63];
determining, corresponding to the at least one row-group of computing units, second bit values corresponding to the second bit positions and the first bit values corresponding to the first bit positions of the activations being the same [Para. 0003, 0026, 0036-42, 0058-63]; and
in response to, corresponding to the at least one row-group of computing units, second bit values corresponding to the second bit positions and the first bit values corresponding to the first bit positions of the activations being the same, determining to turn off the at least one row-group of computing units for performing second multiplications based on the second bit values corresponding to the second bit positions of the activations shared by the OCs in the array of the computing units [Para. 0003, 0026, 0036-42, 0058-63].
7. Regarding Claims 8 and 16, Deshpande, in view of Hoang, discloses the limitations of Claims 1 and 9. Deshpande further discloses that the performing a computation based on kernel weights and activations of a neural network stored in the active computing units in the CIM macro that are not turned off comprises:
dividing a long bit-width activation into smaller bit-width activations [Para. 0044, 0050-55];
dividing a long bit-width kernel weight into smaller bit-width kernel weights [Para. 0044, 0050-55];
in response to compute with lower bit-width activations, determining to turn off input buffers for the higher bit-width kernel weights [Para. 0044, 0050-55]; and
in response to compute with higher bit-width activations, determining to turn off input buffers for the higher bit-width kernel weights [Para. 0044, 0050-55].
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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Any inquiry concerning this communication or earlier communications from the examiner should be directed to TAE K KIM whose telephone number is (571)270-1979. The examiner can normally be reached M-F 9:30-5:30.
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/TAE K KIM/Primary Examiner, Art Unit 2496
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