DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
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Claims 16 & 18 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 & 15 of copending Application No. 18477434 (hereinafter, the ’34 application) (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because:
The limitations of claims 16 & 18 are disclosed by the limitations of claims 1 & 15 of the ’34 application using substantially similar language, except the ’34 patent does not disclose the overcoat dielectric layer includes silicon oxide.
At the time of filing, it would have been obvious to one of ordinary skill in the art for the overcoat dielectric layer to include silicon oxide as a well-known in the art dielectric material commonly used as an overcoat layer for IDT electrodes to provide the benefit of acting as a passivation layer, as is well understood in the art.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim Objections
Claims 3 & 12 are objected to because of the following informalities:
Claims 3 & 12 each refer to an “overcoat layer,” which is inconsistent with the language set forth in claim 1 disclosing an “overcoat dielectric layer.” As the terms appear to refer to the same layer, the terminology should be consistent.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Iwaki et al. (US PGPub 20170170808), as cited by applicant, in view of and Komatsu et al. (US PGPub 20140285287)
As per claim 19:
Iwaki et al. discloses in Figs. 14A-C & 17B:
A radio frequency device comprising:
an acoustic wave device (title) configured to generate a surface acoustic wave ([0003-0004]) having a wavelength L (λ, [0044]), the acoustic wave device including
a piezoelectric layer (10) including lithium niobate ([0044]),
an interdigital transducer electrode (21) over the piezoelectric layer,
an overcoat dielectric layer (36) over the interdigital transducer electrode,
the piezoelectric layer having a trench (recess 32) in an edge region (gap region 17) within 0.25L and 0.45L (gap region is 0.5λ, [0050], thus 0.5L in width, placing the recess 32 within 0.25L and 0.45L) from an edge of an active region (overlap region 15) where the surface acoustic wave is generated;
Iwaki et al. does not disclose:
a raised frame structure over the overcoat dielectric layer, the raised frame structure positioned in the edge region of the active region; and
an antenna electrically coupled with the acoustic wave device.
Komatsu discloses in Figs. 1-2C:
An acoustic wave device (title) configured to generate a surface acoustic wave ([0049]) wherein a raised frame structure (dielectric film 14) is provided over an overcoat dielectric layer (dielectric film 13), the raised frame structure positioned in an edge region (gap regions 19A/B) of an active region (interdigitating region 20); and that the acoustic wave device is applicable to antenna duplexers and mobile communications equipment ([0057]).
At the time of filing, it would have been obvious to one of ordinary skill in the art to provide the raised frame structure of Komatsu to provide the benefit of reducing spurious emissions, as taught by Komatsu et al. ([0032]).
It would have been further obvious to electrically couple an antenna to the acoustic wave device as suggested by Komatsu ([0057]) to provide the benefit of utilizing the acoustic wave device with mobile communications equipment using antenna duplexers or multiplexers to provide for wireless communication, as is well understood in the art.
Claim(s) 1-3 & 15-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Iwaki et al. (US PGPub 20170170808), as cited by applicant, in view of Turner (US PGPub 20200373903) and Nakanishi et al. (US PGPub 20130249647)
As per claim 1:
Iwaki et al. discloses in Figs. 14A-C & 17B:
An acoustic wave device (title) configured to generate a surface acoustic wave ([0003-0004]) having a wavelength L (λ, [0044]), the acoustic wave device comprising:
a piezoelectric layer (10) including lithium niobate ([0044]), the piezoelectric layer having a trench (recess 32) in an edge region (gap region 17) within 0.25L and 0.45L (gap region is 0.5λ, [0050], thus 0.5L in width, placing the recess 32 within 0.25L and 0.45L) from an edge of an active region (overlap region 15) where the surface acoustic wave is generated;
an interdigital transducer electrode (21); and
an overcoat dielectric layer (36) over the interdigital transducer electrode.
Iwaki et al. does not disclose:
a substrate;
the piezoelectric layer disposed at least partially between the substrate and the interdigital transducer electrode;
and a raised frame structure over the overcoat dielectric layer, the raised frame structure positioned in the edge region of the active region.
Turner discloses in Fig. 5:
The use of a substrate (high resistivity silicon wafer 522) with a trap-rich region (524) and an intervening dielectric layer (525) as a support substrate below a piezoelectric substrate (510) as a known piezoelectric layer support substrate that reduces insertion loss and allows for inexpensive use of silicon substrates ([0037-0039]).
Nakanishi discloses in Fig. 1:
Forming a raised frame structure (areas of increased thickness of 104 outside the intersection area) over an overcoat dielectric layer (104) of an IDT electrode (102), the raised frame structure positioned in an edge region of an active region.
At the time of filing, it would have been obvious to one of ordinary skill in the art to use the substrate of Turner to support the piezoelectric layer of Iwaki et al. to allow for the use of inexpensive silicon substrates with a reduced insertion loss as taught by Turner ([0037-0039]).
It would have been further obvious to form the overcoat dielectric layer of Iwaki et al. as per Nakanishi et al. to provide the benefit of suppressing a spurious mode as taught by Nakanishi et al. ([0060])
As a consequence of the combination, the combination discloses a substrate; an interdigital transducer electrode, the piezoelectric layer disposed at least partially between the substrate and the interdigital transducer electrode; and a raised frame structure over the overcoat dielectric layer, the raised frame structure positioned in the edge region of the active region.
As per claims 2 & 18:
Iwaki et al. does not disclose:
the raised frame structure includes a material of the overcoat dielectric layer.
Nakanishi discloses in Fig. 1:
Forming a raised frame structure (areas of increased thickness of 104 outside the intersection area) over an overcoat dielectric layer (104) of an IDT electrode (102), the raised frame structure positioned in an edge region of an active region.
As a consequence of the combination of claim 1, the raised frame structure includes a material of the overcoat dielectric layer.
As per claim 3:
Iwaki et al. does not disclose:
the overcoat layer has a height in a range between 0.05L and 0.35 L.
Nakanishi discloses in Fig. 1:
Forming a raised frame structure (areas of increased thickness of 104 outside the intersection area) over an overcoat dielectric layer (104) of an IDT electrode (102), the raised frame structure positioned in an edge region of an active region, wherein the overcoat layer has a height in a range between 0.05L and 0.35 L ([0062]).
As a consequence of the combination of claim 1, the overcoat layer has a height in a range between 0.05L and 0.35 L (Nakanishi, [0062]).
As per claim 15:
Iwaki et al. does not disclose:
an intervening dielectric layer between the substrate and the piezoelectric layer, and a trap-rich layer between the substrate and the intervening dielectric layer.
Turner discloses in Fig. 5:
The use of a substrate (high resistivity silicon wafer 522) with a trap-rich region (524) and an intervening dielectric layer (525) as a support substrate below a piezoelectric substrate (510) as a known piezoelectric layer support substrate that reduces insertion loss and allows for inexpensive use of silicon substrates ([0037-0039]).
As a consequence of the combination of claim 1, the combination discloses an intervening dielectric layer between the substrate and the piezoelectric layer, and a trap-rich layer between the substrate and the intervening dielectric layer.
As per claim 16:
Iwaki et al. discloses in Figs. 14A-C & 17B:
An acoustic wave device (title) configured to generate a surface acoustic wave ([0003-0004]) having a wavelength L (λ, [0044]), the acoustic wave device comprising:
a piezoelectric layer (10) including lithium niobate ([0044]), the piezoelectric layer having a trench (recess 32) in an edge region (gap region 17) within 0.25L and 0.45L (gap region is 0.5λ, [0050], thus 0.5L in width, placing the recess 32 within 0.25L and 0.45L) from an edge of an active region (overlap region 15) where the surface acoustic wave is generated;
an interdigital transducer electrode (21) formed with the piezoelectric layer; and
an overcoat dielectric layer (36) over the interdigital transducer electrode.
Iwaki et al. does not disclose:
a multilayer piezoelectric substrate including a support substrate, a trap-rich layer over the support substrate, an intervening dielectric layer over the trap-rich layer, and a piezoelectric layer
the overcoat dielectric layer including silicon oxide; and
a raised frame structure over the overcoat dielectric layer, the raised frame structure positioned in an edge region within 0.25L and 0.45L from an edge of an active region where the surface acoustic wave is generated.
Turner discloses in Fig. 5:
The use of a substrate (high resistivity silicon wafer 522) with a trap-rich region (524) and an intervening dielectric layer (525) as a support substrate below a piezoelectric substrate (510) as a known piezoelectric layer support substrate that reduces insertion loss and allows for inexpensive use of silicon substrates ([0037-0039]).
Nakanishi discloses in Fig. 1:
Forming a raised frame structure (areas of increased thickness of 104 outside the intersection area) over an overcoat dielectric layer (104) of an IDT electrode (102), the raised frame structure positioned in an edge region of an active region, and wherein the overcoat dielectric layer is formed of silicon oxide ([0015])
At the time of filing, it would have been obvious to one of ordinary skill in the art to use the substrate of Turner to support the piezoelectric layer of Iwaki et al. to allow for the use of inexpensive silicon substrates with a reduced insertion loss as taught by Turner ([0037-0039]).
It would have been further obvious to use silicon oxide as the overcoat dielectric layer as a known in the art dielectric used as a passivation layer over interdigital transducers as disclosed by Nakanishi ([0058]) and as is well understood in the art, and further to provide the benefit of providing temperature compensation, as taught by Nakanishi et al. ([0009])
It would have been further obvious to form the overcoat dielectric layer of Iwaki et al. as per Nakanishi et al. to provide the benefit of suppressing a spurious mode as taught by Nakanishi et al. ([0060])
As a consequence of the combination, the combination discloses a multilayer piezoelectric substrate including a support substrate, a trap-rich layer over the support substrate, an intervening dielectric layer over the trap-rich layer, and a piezoelectric layer; the overcoat dielectric layer including silicon oxide; and a raised frame structure over the overcoat dielectric layer, the raised frame structure positioned in an edge region within 0.25L and 0.45L from an edge of an active region where the surface acoustic wave is generated (the raised frame structure of Nakanishi et al. covering the gap areas, which Iwaki discloses to contain the region within 0.25L to 0.45L from the edge of an active region).
As per claim 17:
Iwaki et al. discloses in Figs. 14A-C & 17B:
the piezoelectric layer having a trench (recess 32) in the edge (gap region 17) of the active region (overlap region 15).
Claim(s) 4-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over the resultant combination of Iwaki et al. (US PGPub 20170170808), as cited by applicant, in view of Turner (US PGPub 20200373903) and Nakanishi et al. (US PGPub 20130249647) as applied to claim 1 above, and further in view of Saji (US PGPub 20190288664).
The resultant combination discloses the acoustic wave device of claim 1, as rejected above.
As per claim 4:
The resultant combination does not disclose:
the piezoelectric layer includes R rotated Y-cut X-propagation lithium niobate with R between 0 degrees and 45 degrees.
Saji discloses:
An acoustic wave device using surface acoustic waves ([0029]), wherein a piezoelectric layer (2) includes R rotated Y-cut X-propagation lithium niobate with R between 0 degrees and 45 degrees ([0032-0033]).
At the time of filing, it would have been obvious to one of ordinary skill in the art for the piezoelectric layer of the resultant combination to include R rotated Y-cut X-propagation lithium niobate with R between 0 degrees and 45 degrees as a known in the art configuration of a piezoelectric layer used in surface acoustic wave resonators as taught by Saji ([0032]).
As per claim 5:
The resultant combination does not disclose:
the piezoelectric layer includes R rotated Y-cut X-propagation lithium niobate with R between about 15 degrees and about 40 degrees.
Saji discloses:
An acoustic wave device using surface acoustic waves ([0029]), wherein a piezoelectric layer (2) includes R rotated Y-cut X-propagation lithium niobate with R between 15 degrees and 40 degrees ([0032-0033]).
At the time of filing, it would have been obvious to one of ordinary skill in the art for the piezoelectric layer of the resultant combination to include R rotated Y-cut X-propagation lithium niobate with R between 15 degrees and 40 degrees as a known in the art configuration of a piezoelectric layer used in surface acoustic wave resonators as taught by Saji ([0032]).
Claim(s) 12-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over the resultant combination of Iwaki et al. (US PGPub 20170170808), as cited by applicant, in view of Turner (US PGPub 20200373903) and Nakanishi et al. (US PGPub 20130249647) as applied to claim 1 above, and further in view of Goto (US PGPub 20210159886).
The resultant combination discloses the acoustic wave device of claim 1, as rejected above.
As per claim 12:
The resultant combination does not disclose:
the interdigital transducer electrode includes a first layer and a second layer, the first layer disposed between the second layer and the piezoelectric layer, and the second layer disposed between the first layer and the overcoat layer.
Goto discloses in Fig. 5:
An acoustic wave device using surface acoustic waves (abstract), wherein an interdigital transducer electrode (14) includes a first layer (14B) and a second layer (14A), the first layer disposed between the second layer and a piezoelectric layer (12), and the second layer disposed between the first layer and an overcoat layer (dielectric material 44).
At the time of filing, it would have been obvious to one of ordinary skill in the art to form the interdigital transducer electrode of the resultant combination as per that of Goto to provide the benefit of reducing size and lowering overall resistivity as taught by Goto et al. ([0054])
As per claim 13:
The resultant combination does not disclose:
the first layer includes molybdenum and the second layer includes aluminum.
Goto discloses in Fig. 5:
the first layer includes molybdenum and the second layer includes aluminum ([0054]).
As a consequence of the combination of claim 12, the first layer includes molybdenum and the second layer includes aluminum.
As per claim 14:
The resultant combination does not disclose:
the first layer includes tungsten and the second layer includes aluminum.
Goto discloses in Fig. 5:
the first layer includes tungsten and the second layer includes aluminum ([0054]).
As a consequence of the combination of claim 12, the first layer includes tungsten and the second layer includes aluminum.
Allowable Subject Matter
Claims 6-11 & 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the combination of limitations found in each of claims 6-11 & 20 were not disclosed or rendered obvious over the closest relevant art of Iwaki, Nakanishi, Turner, and Komatsu.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMUEL S OUTTEN whose telephone number is (571)270-7123. The examiner can normally be reached M-F: 9:30AM-6:00PM.
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/Samuel S Outten/Primary Examiner, Art Unit 2843