DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed on 10/23/2025 have been fully considered but they are not persuasive.
Applicant argued that Cherches does not disclose determining whether a macro block is “freeable” and asserts that the term must be interpreted in light of the specification’s description, e.g., the presence of data or the position of a heap pointer. Examiner respectfully disagrees. Under the broadest reasonable interpretation, claim terms are given their ordinary meaning unless explicitly defined in the specification or limiting language is present in the claims. Applicant has not provided a clear definition in the claims restricting freeable to the specific conditions disclosed in the specification. Therefore, the term “freeable” is reasonably enterpreted as memory blocks that are unused and available for release. Cherches (¶[0018]) teaches that the stack memory allocation controller releases unused memory blocks from tasks that have finished execution. Identifying a block as unused constitutes a determination that the block is in a condition suitable for release—i.e., freeable under BRI. The process of releasing an unused block inherently requires determining whether the block is no longer needed. Therefore, Cherches teaches or at least suggests the claimed determination.
Applicant argues that Cherches powers down memory blocks “when unused,” and therefore does not disclose powering down “in response to determining” that a block is freeable. Examiner respectfully disagrees. The claim language does not require any particular ordering or complex decision-making logic beyond a causal relationship between the determination and the powering off. Cherches (¶[0015]) teaches powering down memory blocks once they become unused. Because Cherches necessarily determines that the blocks are unused (¶[0018]) prior to powering them down, powering off unused memory constitutes powering off “in response to determining” that those blocks are in a releasable or freeable state. Applicant’s attempted distinction is semantic and does not amount to a substantive difference under BRI.
Applicant argues that paragraph [0028] of Cherches does not expressly disclose updating a record indicating that a macro block is powered off and unoccupied. Cherches discloses the use of a memory block index 302 and teaches that monitored activities are updated as necessary to manage the allocation of memory blocks (¶[0028]). Such monitoring and updating inherently require modifying internal data structures that track the status of individual memory blocks. While Cherches does not explicitly describe the record as indicating “powered off and unoccupied,” the reference clearly teaches updating information related to memory block allocation and utilization. Furthermore, the rejection is based on the combination of Cherches with Soule. Soule expressly teaches maintaining and updating records indicating the state and power characteristics of memory units. One of ordinary skill in the art would have readily combined Cherches’ block management with Soule’s power-state metadata to improve memory efficiency and power handling. The motivation to combine is well supported by the shared goals of efficient memory usage and power reduction. Applicant’s argument improperly addresses Cherches alone rather than the references as combined.
For the reasons above, applicant’s arguments do not overcome the rejections under 35 U.S.C. § 103. The rejections of claims 9 and its dependent claims 10–11 are therefore maintained.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 9 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over CHERCHES et al. [US 2022/0291962 A1] in view of SOULE et al. [US 2023/0161652 A1].
Claim 9 is rejected over CHERCHES and SOULE.
CHERCHES teaches “A method of memory freeing, comprising: determining whether a macro block of a memory device is freeable; and” as “the stack memory allocation controller releases unused blocks from the stack allocated to the task that just finish execution and allocates all free blocks to the task that is going to be executed.” [¶0018]
“in response to determining that the macro block is freeable,” as “The stack memory allocation controller 130 also includes a stack use manager 136, which determines how the memory blocks 110A-110N are allocated to the stacks 112A-112M.” [¶0017]
“powering off the macro block,” as “ the memory stack allocation controller also reduces power consumption by powering down memory blocks based on need and powering down unused memory blocks in a transparent way.” [¶0015]
“updating a macro block record indicating that the macro block is powered off and unoccupied, and” as “the allocation 144 of memory blocks of the RAM memory 306 by the stack memory allocation controller 130 to provide the average stack utilization 302 is performed responsive to monitored activities (updated as needed) to ensure each stack has enough memory for its current needs.” [¶0028] and “2) track stack use by monitoring memory access and instruction fetch; 3) manage RAM memory allocation on-the-fly per stack with the ability to allocate memories from different ranges (non-sequential memory blocks); 4) optional use of different memory types (e.g. GLX, ULL); 5) power-down memory blocks as appropriate;” [¶0030]
CHERCHES does not explicitly teach updating at least one heap management structure to indicate a memory block is free, wherein the memory block was previously allocated in the macro block.
However, SOULE teaches “updating at least one heap management structure to indicate a memory block is free, wherein the memory block was previously allocated in the macro block.” as “When non-arena based allocation is used, components of the message are heap-allocated so the protobuf structure in memory contains pointers to data rather than data itself.” [¶0054]
CHERCHES and SOULE are analogous arts because they teach memory system and storage controller.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of CHERCHES and SOULE before him/her, to modify the teachings of CHERCHES to include the teachings of SOULE with the motivation of to improve efficiency, a replacement for “std:: string” can be used that also uses arena-based allocation to store linearized objects. [SOULE, ¶0054]
Claim 10 is rejected over CHERCHES and SOULE.
CHERCHES teaches “in response to determining that the macro block is not freeable, marking the memory block as free, and adding the memory block to a free block list.” as “ the stack memory allocation controller 130 includes the memory blocks pool 132 with current status 134, the stack use manager 136, and the virtual memory translator 142. ” [¶0027]
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over CHERCHES et al. [US 2022/0291962 A1] in view of SOULE et al. [US 2023/0161652 A1] and in further view of Zhou et al. [US 2023/0273727 A1].
Claim 11 is rejected over CHERCHES, SOULE and Zhou.
The combination of CHERCHES and SOULE does not explicitly teach further comprising: performing an operation to reduce fragmentation in the macro block.
However, Zhou teaches “further comprising: performing an operation to reduce fragmentation in the macro block.” as “ It is appreciated that the use of the empty defrag unit can reduce fragmentation, since in some embodiments, fragmentation may occur mainly from overwriting mapped LBAs, e.g., successive write operations.” [¶0117]
CHERCHES, SOULE and Zhou are analogous arts because they teach memory system and storage controller.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of CHERCHES, SOULE and Zhou before him/her, to modify the teachings of combination of CHERCHES and SOULE to include the teachings of Zhou with the motivation of the advantages of both the segment based mapping and the hash mapping schemes. [Zhou, ¶0009]
Allowable Subject Matter
The following is an examiner’s statement of reasons for allowance: Closest prior arts do not explicitly teach or fairly suggest “within one or more powered up macro blocks that are partially occupied with data and can accommodate the determined allocation size” … and “creating a first portion or an entirely of a new free memory block withing the first macro block”. Based on this rationale, claims 1-3, 5-8, 12-14 and 16-19 are allowed.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MASUD K KHAN whose telephone number is (571)270-0606. The examiner can normally be reached Monday-Friday (8am-5pm).
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/MASUD K KHAN/ Primary Examiner, Art Unit 2132