DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1-3, 5-6, 9-12, 14-15 and 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hafeez et al. (US 2022/0166679 A1), in view of Patterson (US 2002/0052941 A1).
Regarding claim 1, Hafeez, discloses a fabric (computer network) designer system (Hafeez, figs. 2 - 4, [Abstract; 0023;0059] a system for designing a computer network) comprising:
processing circuitry (Hafeez, [0023] discloses a system comprising a processor configured to execute instructions stored on and/or provided by a memory coupled to the processor); and
a memory comprising instructions executable by the processing circuitry to cause the fabric designer system (Hafeez, [0023] discloses a system comprising a processor configured to execute instructions stored on and/or provided by a memory coupled to the processor):
generate (creating) data representative (model/template [figs. 1, 3 & 5, 0007;0064;0088]) of a user interface (UI) (fig. 5, 502) for display on a display device (Management server 102), (Hafeez, fig. 1, [0007; 0064; 0088] discloses a user interface 502 of a management server 102 used for creating a new connectivity template. User interface 502 shown in FIG. 5 is utilized in 304 of FIG. 3 to build the new connectivity template. User interface region 504 lists existing connectivity templates (including primitives) that are to be utilized in building the new connectivity template);
the data representative (Template/model) of the UI (502) comprising UI elements (computing infrastructure elements) representing one or more (server, switch, interface) fabric design (computer network) requirements (declarative requirements) (Hafeez, figs. 5-7, [0033; 0059] discloses in a user interface 502 displaying at least a portion of a computing infrastructure to implement declarative requirements represented as a template/graph model representative of computing infrastructure elements including computing infrastructure nodes and computing infrastructure edges. Data associated with each node of the graph representation include: an identifier, a node type (e.g., server, switch, interface, rule, policy, etc.));
receive (selecting), via the UI (502) on the display device (102), an indication (indication/selection of one or more devices) of a user input selecting one or more of the UI elements representing the one or more (user selection of one or more devices) fabric design requirements (declarative requirements of a computer network) (Hafeez, figs. 3-7, [0074; 0111] at step 306, an indication of an application of the connectivity template on the physical design of the computer network is received via the user interface 502, and the indicated application is implemented. A user indicates where the connectivity template is to be applied to on the physical design of the computer network. For example, via a graphical user interface, the user selects one or more devices and/or application points of the devices in the design where the connection is to be applied).
Hafeez did not explicitly disclose generate a model for a data center fabric to be realized, wherein the model comprises an architecture of the data center fabric comprising an arrangement of one or more network devices and one or more connections selected from a catalog of network devices and connections determined to support the one or more fabric design requirements; and generate UI elements representing the model for the data center fabric and fabric design specifications to realize the data center fabric for display on the display device.
Patterson discloses generate a model (template) for a data center fabric (Instant data center) to be realized (Fig. 2B -Visual Editor 216 used to create a design for an instant data center (IDC)), wherein the model (templates) comprises an architecture of the data center fabric comprising an arrangement of one or more network devices and one or more connections (user may select one or more IDC components from a palette, place the components in the IDC editor frame, and establish connections between two components) selected from a catalog of network devices (user may select one or more IDC components from a palette) and connections determined to support the one or more fabric design requirements (Patterson, fig. 2B, [0139-0145] discloses an instant data center (IDC) Designer page 214 displayed when a user wishes to graphically create or modify a logical design of an IDC. The IDC Designer page 214 is linked to a Visual Editor 216 and Service Configuration 218. Visual Editor 216 is used to create a design for an instant data center, modify a design of an IDC, save a design of an IDC, and validate a design of an IDC. For building an Instant Data Center, Visual Editor 216 enables the user to select a design from one of a plurality of templates or create a new blank IDC. The user may select one or more IDC components from a palette, place the components in the IDC editor frame, and establish connections between two components. The user may move a connected component in an IDC; after the move operation is completed, the connections of the component to other components are re-rendered. The user may remove a component from an IDC or remove a connection between two components. The user may also receive help information useful in IDC construction), and
generate UI elements (Figs. 2, 3A,4A-4F – Visual Editor – 216) representing the model (templates) for the data center fabric (Instant data center) and fabric design specifications (policy/configuration) to realize the data center fabric for display on the display device (Patterson, fig. 2B, [0139-0145] The IDC Designer page 214 is linked to a Visual Editor 216 and Service Configuration 218. Visual Editor 216 is used to create a design for an instant data center, modify a design of an IDC, save a design of an IDC, and validate a design of an IDC. Visual Editor 216 enables the user to select a design from one of a plurality of templates or create a new blank IDC. The Visual Editor 216 generates a user interface which enables the user select one or more IDC components from a palette, place the components in the IDC editor frame, and establish connections between two components. The user may move a connected component in an IDC; after the move operation is completed, the connections of the component to other components are re-rendered. The user may remove a component from an IDC or remove a connection between two components as needed based on the functional requirements of the data center to be realized).
One of ordinary skill would have been motivated to combine the teachings of Hafeez and Patterson because these teachings are from the same field of endeavor with respect to the design of models that represent connectivity of network elements of a desired data center topology.
Therefore, it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Hafeez with the teachings of Patterson to enable a user through a Visual Editor 216 to a data center design by moving, removing or adding components and connections to the design to satisfy the design, Patterson, [0142].
Regarding claim 2, Hafeez modified by Patterson disclose the fabric designer system of claim 1, wherein the fabric design specifications (requirements/constraints) to realize the data center fabric (requirements/constraints for designing a data center fabric) comprise a bill of materials (list of components required to design a data center fabric – [0059] - network pod, rack, spine node, leaf node (e.g., router, switch, server, firewall, load balancer, etc.) (Hafeez, figs. 5 & 11, [0059; 0088; 0111], the user interface region 504 lists existing connectivity templates (including primitives) that are to be utilized in building the new connectivity template. User interface region 506 shows a graphical flow visualization of the component connectivity templates used to build the new template as well as their ordering of application and relationship between each other. User interface region 508 shows input fields where the user is able to input configuration parameters for the component connectivity templates. At 1104, implicit and explicit constraints associated with the existing computer network are received. Implicit constraints are based on and inherent to a reference network type, while explicit constraints are user specified constraints. At 302, Hafeez discloses a bill of materials which include physical network devices (e.g., network pod, rack, spine node, leaf node (e.g., router, switch, server, firewall, load balancer, etc.) and interfaces and subinterfaces of devices, etc.).
The motivation to combine is similar to that of claim 1.
Regarding claim 3, Hafeez modified by Patterson disclosed the fabric designer system of claim 1, wherein the fabric design specifications (Configurations/policies) to realize the data center fabric (designing a new instant data center) comprise a diagram of the architecture of the data center fabric (connections of the component to other components) (Patterson, Figs. 2, 3A,4A-4F – Visual Editor – 216, [0142] The IDC Designer page 214 is linked to a Visual Editor 216 and Service Configuration 218. Visual Editor 216 is used to create a design for an instant data center, modify a design of an IDC, save a design of an IDC, and validate a design of an IDC. Visual Editor 216 enables the user to select a design from one of a plurality of templates or create a new blank IDC to design a required architecture for the desired IDC. The Visual Editor 216 generates a user interface which enables the user select one or more IDC components from a palette, place the components in the IDC editor frame, and establish connections between two components. The user may move a connected component in an IDC; after the move operation is completed, the connections of the component to other components are re-rendered. The user may remove a component from an IDC or remove a connection between two components as needed based on the functional requirements of the data center to be realized).
The motivation to combine is similar to that of claim 1.
Regarding claim 5, Hafeez modified by Patterson disclose the fabric designer system of claim 1, wherein to receive the indication of the user input selecting one or more of the UI elements representing the one or more fabric design requirements, the instructions cause the fabric designer system (Hafeez, figs. 5-7, [0023;0030;0088] discloses a processor configured to execute instructions stored on and/or provided by a memory coupled to the processor. Based on declarative and imperative requirements, the processor selects network elements using a user interface 502 displaying in region 504 a list of items in a catalog from which networking elements may be selected and used to generate a new connectivity template 506 for a desired network) to:
receive the indication of the user input via an application programming interface (API) (Hafeez, [0032; 0037; 0048] management server 102 facilitates interactions with users to receive and provide desired requirements, specifications, and status updates. For example, a user utilizes a user interface (e.g., web interface, application interface, command line interface, graphical interface, application programming interface (API), configuration file interface, etc. Management server 102 selects processing agents among a plurality of processing agents (e.g., triggered by patterns matching at least a portion of a graph representation) to achieve/complete a desired network requirement. Agents are accessed by a user via an API (e.g., RESTful API). For example, HTTP methods (e.g., GET, PUT, POST, DELETE, etc.) may be utilized to access and manage information via the API. URIs may be utilized to reference state and resources).
The motivation to combine is similar to that of claim 1.
Regarding claim 6, Hafeez modified by Patterson disclose the fabric designer system of claim 1, wherein to generate the model for the data center fabric, the one or more instructions (policy/configuration/specification/protocols for each link) cause the fabric designer system to: (Patterson, Figs. 2, 3A,4A-4F – Visual Editor – 216, [0142;0175; 0248; 0253] Screen Manager 278 provides a user access to Screen Definitions 268, and receives a "next screen" definition or instruction from a user through Controller Layer 272. User instructions are based on policy/configuration/specification/protocol requirements of the instant data center to be realized. In response, Screen Manager 278 fills in Screen Template 264 with appropriate information, resulting in creating a final screen definition that is sent to the client browser):
apply one or more rules to select the one or more network devices and the one or more connections from the catalog of network devices and connections (Patterson, Figs. 2, 3A,4A-4F – Visual Editor – 216, [0142] Based on policy/configuration/specification/protocol requirements of the instant data center to be realized, Visual Editor 216 is used to create a design for an instant data center, modify a design of an IDC, save a design of an IDC, and validate a design of an IDC. Visual Editor 216 enables the user to select a design from one of a plurality of templates or create a new blank IDC to design a required architecture for the desired IDC. The Visual Editor 216 generates a user interface which enables the user select one or more IDC components from a palette, place the components in the IDC editor frame, and establish connections between two components. The user may move a connected component in an IDC; after the move operation is completed, the connections of the component to other components are re-rendered. The user may remove a component from an IDC or remove a connection between two components as needed based on the functional requirements of the data center to be realized).
The motivation to combine is similar to that of claim 1.
Regarding claim 9, Hafeez modified by Patterson disclose the fabric designer system of claim 6, wherein the one or more rules comprise a rule to override the (modify requirements/primitives/existing templates) one or more network devices (requirements/primitives) or one or the more connections selected for the data center fabric (Hafeez [0079] when an existing connectivity template is modified, instances where the connectivity template was applied are updated/overwritten to implement the new modification. This allows primitives that have applied in multiples to be centrally managed/overwritten at the template level. A user is able to make a change to an existing connectivity template and the change is automatically implemented at the application points where the template was previously applied. This allows the user change to be automatically propagated without requiring the user to reapply the change template to all of the appropriate application points).
The motivation to combine is similar to that of claim 1.
Regarding claim 10, Hafeez modified by Patterson disclose the fabric designer system of claim 1, wherein the architecture of the datacenter fabric comprises (Hafeez [0108] discloses a graph model schema for a typical leaf-spine datacenter network architecture):
a multi-stage (Spine and leaf nodes) fabric architecture of the data center fabric (Hafeez [0033;0059] at step 302, a specification of a physical design of a computer network is received. The physical design of the computer network specifies physical connections between one or more physical network devices (e.g., network pod, rack, spine node, leaf node (e.g., router, switch, server, firewall, load balancer, etc.) and interfaces and subinterfaces of devices, etc.). [0039] different stages/levels of the data center topology model may define different levels of processing. One processing stage/level may determine a logical connectivity in its output declarative requirements, another processing stage/level may determine physical connectivity in its output declarative requirements, and another processing stage/level may determine a cabling diagram in its output declarative requirements).
The motivation to combine is similar to that of claim 1.
Regarding claim(s) 11-12,14-15 and 18-19, the claim(s) are rejected with rational similar to claim(s) 1,2,5-6 and 9-10, respectively.
Regarding claim 20, Hafeez discloses a non-transitory computer-readable storage media (fig. 1, 102 &104) comprising instructions executable by processing circuitry to cause the processing circuitry to (Hafeez, fig. 1, [0023], discloses a system comprising a processor configured to execute instructions stored on and/or provided by a non-transitory computer memory coupled to the processor):
The rest of the limitations of claim 20 are rejected with rational similar to that of claim 1.
Claim(s) 4 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over unpatentable over Hafeez et al. (US 2022/0166679 A1), in view of Patterson (US 2002/0052941 A1), further in view of Tsui et al. (US 2005/0283348 A1).
Regarding claim 4, Hafeez modified by Patterson to disclose the fabric designer system of claim 1, wherein the instructions further cause the fabric designer system to (Hafeez, [0023] discloses a system comprising a processor configured to execute instructions stored on and/or provided by a memory coupled to the processor):
Hafeez modified by Patterson did not explicitly disclose export the fabric design specifications.
Tsui discloses export the fabric design specifications (Tsui, [0039 & 0041-0042] discloses a data center model 210 that is exported to create Data center model clone 220 by importing into Data center simulator 230 simulation environment)
One of ordinary skill would have been motivated to combine the teachings of Hafeez, Patterson and Tsui because these teachings are from the same field of endeavor with respect to the construction of a data network that satisfies a predetermined criteria.
Therefore, it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Hafeez modified by Patterson with the teachings of Tsui to enable the system to perform off-line trouble-shooting of system problems in the environment provided by the framework. Thus, the shutdown may be totally avoided or minimized by exporting Data center model 210 to create Data center model clone 220 by importing into Data center simulator 230 simulation environment. The problem may then be reproduced in Data center simulator 230 and trouble-shooting can be carried out in the simulation environment instead of in the live system, Tsui, [0042].
Regarding claim 13, the claim is rejected with rational similar to that of claim 4.
Claim(s) 7 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hafeez et al. (US 2022/0166679 A1), in view of Patterson (US 2002/0052941 A1), further in view of Sobhani et al. (US 11,765,041 B1).
Regarding claim 7, Hafeez modified by Patterson disclose the fabric designer system of claim 6, but did not explicitly disclose wherein the one or more rules comprise a rule to select the one or more network devices based on a radix of the one or more network devices.
Sobhani discloses wherein the one or more rules (criteria for selecting a source and destination group of nodes/devices/switches) comprise a rule to select (criteria for selecting a source and destination group of nodes/devices/switches for creating a Radix topology) the one or more network devices based on a radix (radix topology) of the one or more network devices (Sobhani, Col. 1, line 50 – col. 2, line 27, discloses criteria for selecting a source and a destination group of nodes to be used in the construction and implementation of a network topology for a high radix network, nodes of the network topology corresponding to high radix switches of the high radix network. Col. 10, lines 31-39, the selection of the number of groups (group of nodes/switches) may be determined based on a predefined/rule/constraint and configuration parameters of the network, such as the number of servers (or end points) to be connected by switches, the radix (i.e., number of available ports) of the switches, and the server port ratio (i.e., the ratio representing what proportion of switch ports should be connected to servers as opposed to other network connections). Each of these parameters may be predefined by a user and/or predefined based on real-world requirements).
One of ordinary skill would have been motivated to combine the teachings of Hafeez, Patterson and Sobhani because these teachings are from the same field of endeavor with respect to the construction of a data network that satisfies a predetermined criteria.
Therefore, it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Hafeez and Patterson with the teachings of Sobhani in order to elevate the complexity of connection between switches of a high radix network topology in the real-world, Sobhani, col. 1, lines 42-47.
Regarding claim 16, the claim is rejected with rational similar to that of claim 7.
Claim(s) 8 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hafeez et al. (US 2022/0166679 A1), in view of Patterson (US 2002/0052941 A1), further in view of Clemons et al (US 2023/0111375 A1).
Regarding claim 8, Hafeez modified by Patterson disclose the fabric designer system of claim 6, but did not explicitly disclose wherein the one or more rules comprise a rule to select the one or more network devices based on cost requirements.
Clemons discloses wherein the one or more rules (rule to reduce the overall cost of a neural network) comprise a rule to select (selecting configuration, removing input channels/nodes) the one or more network devices based on cost requirements (overall cost reduction requirement) (Clemons [0038; 0048; 0062] discloses a technique for selecting network devices and settings to achieve a reduction of an overall cost in the implementation of neural network model 110. To a achieve a reduction of the overall cost implementation of the neural network model 110, an execution graph of the augmented neural network model 110 is modified compared with the execution graph of the original neural network model to reduce the overall cost of executing the augmented neural network model 110. The modification of the augmented neural network model 110 may be to reconfigure the network by the selected configuration settings to bypass or avoid a layer computation (replace the layer with an identity layer), remove input channels to a layer, where each I/O channel is comprised of one or more intermediate devices).
One of ordinary skill would have been motivated to combine the teachings of Hafeez, Patterson and Clemons because these teachings are from the same field of endeavor with respect to the construction of a data network that satisfies a predetermined criteria.
Therefore, it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Hafeez and Patterson with the teachings of Clemons in order to enable dynamic configuration of the augmented neural network model to adapt to real-time changes in the performance constraints, Clemons, [Abstract].
Regarding claim 17, the claim is rejected with rational similar to that of claim 8.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The following publications show the state of the art related to the generation of data network models for implementing predefined requirements of a network.
Hall et al. (US 2023/0403202 A1)
Nadaf et al. (US 2015/0188774 A1)
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DIXON F DABIPI whose telephone number is (571)270-3673. The examiner can normally be reached on Monday - Friday from 9:00 am – 5:00 pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christopher L Parry, can be reached at telephone number 571-272-8328. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/D.F.D/ Examiner, Art Unit 2451
/Chris Parry/Supervisory Patent Examiner, Art Unit 2451
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