CTNF 18/478,553 CTNF 80962 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 1-4, 10-13 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kaneeda et al. (US 20180270632) in view of Evanczuk, "Use an Energy Harvesting Microcontroller to Eliminate IoT Battery Replacement," DigiKey, URL: https://www.digikcy.in/cn/articles/use-an-energy- harvesting-microcontroller-to-eliminate-iot-battery-replacement February 16, 2021, downloaded July 28, 2023, 6 pages . With respect to claim 1, 10 and 19 Kaneeda teaches a system comprising: an energy transducer (110); a first capacitor (140); a second capacitor (130), wherein a capacitance of the second capacitor is greater (paragraph 0062-63) than a capacitance of the first capacitor; and a control center (20) including: a first terminal (see node to right of 120) electrically coupled to the energy transducer (see connection with 110) and the first capacitor (140); a second terminal (terminal above 130) electrically coupled to the second capacitor; a switch (160) which, in operation, is in a conductive state in which the switch electrically couples the first terminal and the second terminal together, or a nonconductive state in which the switch does not electrically couple the first terminal and the second terminal together; a voltage detector (180) which, in operation, detects a voltage at the first terminal, and a processor (150) coupled to the voltage detector and the switch, wherein the processor, in operation, controls charging of the second capacitor by controlling the switch to be in the conductive state (closed) and the nonconductive state (open) based on the voltage at the first terminal detected by the voltage detector (paragraph 0079). Kaneeda does not teach the control center comprises a microprocessor. Evanczuk teaches the known architecture of microprocessor (see MCUs) are known to comprise integrated energy harvesting circuitry (see Fig .4) and terminal connected to capacitances. It would have been obvious to one of ordinary skill in the art at the time of the invention to apply Kaneeda to a microprocessor arrangement as seen in Evanczuk for the benefit of maintaining store power for programmed operations and extending operations (page 5). With respect to claim 2, 11 and 20 Kaneeda teaches the processor controls the switch to be in the nonconductive state (open) in response to the voltage detector detecting that the voltage at the first terminal is less than or equal to a first voltage threshold (paragraph 0081), and the processor controls the switch to be in the conductive state in response to the voltage detector detecting that the voltage at the first terminal is greater than or equal to a second voltage threshold that is greater than the first voltage threshold (paragraph 0083). With respect to claim 3, 12 Kaneeda teaches the processor controls the switch to be in the conductive state in response to determining that a voltage of the second capacitor is greater than or equal to the first voltage threshold (paragraph 0081). With respect to claim 4, 13 Kaneeda teaches the system for supply power however does not teach the microprocessor operates in a first power consumption mode in which the microprocessor consumes a first amount of power, and a second power consumption mode in which the microprocessor consumes a second amount of power that is greater than the first amount of power. Evanczuk teaches the known architecture of microprocessor (see MCUs) a first power consumption mode (see multiple modes with lower power consumption page 2) in which the microprocessor consumes a first amount of power, and a second power consumption mode in which the microprocessor consumes a second amount of power that is greater than the first amount of power. Kaneeda controls the switch to be in the conductive state and causes a change in response to determining that a voltage of the second capacitor is greater than or equal to the first voltage threshold. It would have been obvious to one of ordinary skill in the art at the time of the invention to apply the switching of Kaneeda to the differing modes of a microprocessor as seen in Evanczuk for the benefit of and extending operations (page 5) . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 5-9 and 14-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. With respect to claim 5 and 14 Kaneeda teaches the system for supply power however does not teach the microprocessor, in operation, charges the second capacitor in a discontinuous charging mode and continuous charging mode, in the discontinuous charging mode, the processor controls the switch to change from being in the conductive state to being in the nonconductive state, and change from being in the nonconductive state to being in the conductive state, and in the continuous charging mode, the processor controls the switch to be in the conductive state. At least this further limitation is not rendered obvious by the prior art of record. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michael Fin whose telephone number is (571)272-5921. The examiner can normally be reached Monday-Friday 9am-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rexford Barnie can be reached at 571-272-7429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MICHAEL FIN Primary Examiner Art Unit 2836 /MICHAEL R. FIN/Primary Examiner, Art Unit 2836 Application/Control Number: 18/478,553 Page 2 Art Unit: 2836 Application/Control Number: 18/478,553 Page 3 Art Unit: 2836 Application/Control Number: 18/478,553 Page 4 Art Unit: 2836 Application/Control Number: 18/478,553 Page 5 Art Unit: 2836
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