Detailed Action
Summary
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
1.This office action is in response to the application filed on September 29, 2023.
2. Claims 1-23 are pending and has been examined.
Priority
3. Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d), which the certified copy has been placed in the record of the file.
Information Disclosure Statement
4. The information disclosure statement (IDS) submitted on 10/02/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
5. Drawings are objected because of the following informalities:
Figs.1-3 are conventional half bridge topology of flyback converter. Therefore, they should be labeled as a prior art.
Specification
6. Specification are objected because of the following informalities:
Paragraph [0075] of specification recites “the first inductor Lk, the primary edge winding Np of transformer T, and the first switch transistor Q1 are sequentially connected
in series between the voltage input terminal and the first switch transistor Q1” .
However, drawings Fig. 1 and 3-4 showing “the first inductor Lk, the primary edge winding Np of transformer T, and the second switch transistor Q2 are sequentially connected in series between the voltage input terminal and the second switch transistor Q2”. Appropriate action is required.
Paragraph [0077] of specification is referring to Fig. 3 and recites “the flyback converter further comprises a sampling resistor Rcs connected between the source of the second switch transistor Q2 and the reference ground”. Appropriate action is required.
However, Fig. 3 is showing that “the flyback converter further comprises a sampling resistor Rcs connected between the source of the first switch transistor Q1 and the reference ground”. Appropriate action is required.
Paragraph [0084] of specification is referring to Fig. 4 and recites “the flyback converter further comprises a sampling resistor Rcs connected between the source of the second switch transistor Q2 and the reference ground”.
However, Fig. 3 is showing that “the flyback converter comprises a sampling resistor Rcs connected between the source of the first switch transistor Q1 and the reference ground”. Appropriate action is required.
Claim Objections
7. Claims 8,16,18 and 23 are objected to because of the following informalities:
Claim 8 recites “the intermediate node” in line 2. There is insufficient antecedent basis for this claim limitation.
Claim 16 recites “ the second switch control signal” in line 5. There is insufficient antecedent basis for this claim limitation.
Claims 18 and 23 recites “a predetermined time” in line 3, respectively should be “the predetermined time”.
Claim 9 depend from claim 8, thus is objected because of its dependency.
Double Patenting
8. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-15,18,20-21 and 23 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1,3,5,8-21, 24 and 27of Case No 18478829. Although the claims at issue are not identical, they are not patentably distinct from each other because the case anticipates the examined claims .
Conflicting claims Case No 18/478879
Conflicting claims Case No. 18/478829
1. A protection circuit of a flyback converter, wherein the flyback converter comprises a transformer, a first switch transistor and a second switch transistor located at a primary edge of the transformer and connected between an input terminal of the flyback converter and a reference ground, and a first capacitor and a first inductor forming a resonance circuit when the second switch transistor is turned on, and the protection circuit comprises: an active discharge module, for providing a discharge path between a first current terminal and a second current terminal of the second switch transistor, and controlling turning-on and turning-off of the discharge path according to a discharge enabling signal, wherein in a normal work state of the flyback converter, the discharge path in the active discharge module is disconnected, and the resonance circuit works; before the flyback converter is restarted, the discharge path in the active discharge module is turned on for a predetermined time period to release charges stored in the resonance circuit, and reduces a resonance current after the flyback converter is restarted to a safe work current of the second switch transistor.
1. A protection circuit of a flyback converter, wherein the flyback converter comprises a transformer, a first switch transistor and a second switch transistor located at a primary edge of the transformer and connected between an input terminal of the flyback converter and a reference ground, and a first capacitor and a first inductor forming a resonance circuit when the second switch transistor is turned on, and the protection circuit comprises: an active discharge module, connected to at least one terminal of the first capacitor to provide a discharge path, and controlling turning-on and turning-off of the discharge path according to a discharge enabling signal, wherein in a normal work state of the flyback converter, the discharge path in the active discharge module is disconnected, and the first capacitor works as a resonance circuit works; before the flyback converter is restarted, the discharge path in the active discharge module is turned on for a predetermined time period to release charges stored in the first capacitor, and reduces resonance current after the flyback converter is restarted to a safe work current of the second switch transistor.
2. The protection circuit of claim 1, wherein the active discharge module comprises a third switch transistor and a first resistor connected between the first current terminal and the second current terminal of the second switch transistor, and the third switch transistor is connected in series with the first resistor.
3. The protection circuit of claim 2, wherein the active discharge module further comprises a first resistor, and the discharge transistor is a third switch transistor connected in series with the first resistor.
3. The protection circuit of claim 2, wherein the active discharge module further comprises a fourth switch transistor and a second resistor connected in series between the first current terminal and the second current terminal of the second switch transistor, and a control end of the third switch transistor is connected to an intermediate node of the fourth switch transistor and the second resistor, and a control end of the fourth switch transistor receives the discharge enabling signal, wherein the third transistor and the fourth transistor are bipolar switch transistors, respectively.
5. The protection circuit of claim 4, wherein the active discharge module further comprises a fourth switch transistor and a second resistor connected in series between the first terminal and the reference ground, and a control end of the third switch transistor is connected to an intermediate node of the fourth switch transistor and the second resistor, and a control end of the fourth switch transistor receive the discharge enabling signal, wherein the third switch transistor and the fourth switch transistor are bipolar switch transistors.
4. The protection circuit of claim 2, wherein the active discharge module further comprises a fourth switch transistor and a second resistor connected in series between a control end of the third transistor and the reference ground, and a control end of the fourth switch transistor receives the discharge enabling signal, wherein the third switch transistor is a bipolar transistor, and the fourth switch transistor is a field effect transistor.
8. The protection circuit of claim 6, wherein the active discharge module further comprises a fourth switch transistor and a second resistor connected in series between a control end of the third switch transistor and the reference ground, and a control end of the fourth switch transistor receives the discharge enabling signal, wherein the third switch transistor is a bipolar transistor, and the fourth switch transistor is a field effect transistor.
5. The protection circuit of claim 4, wherein the thirds witch transistor forms a positive PN node between a first terminal of the first capacitor and the control end of the third switch transistor, such that when the control end is connected to the reference ground, the third switch transistor is turned on so as to turn on the discharge path.
9. The protection circuit of claim 8, wherein the third switch transistor forms a positive PN node between the first terminal of the first capacitor and the control end of the third switch transistor, such that when the control end is connected to the reference ground, the third switch transistor is turned on, so as to turn on the discharge path.
6. The protection circuit of claim 1,wherein the first switch transistor and the second switch transistor are sequentially connected in series between the input terminal of the flyback converter and the reference ground, or the second switch transistor and the first switch transistor are sequentially connected in series between the input terminal of the flyback converter and the reference ground.
10. The protection circuit of claim 1, wherein the first switch transistor and the second switch transistor are sequentially connected in series between the input terminal of the flyback converter and the reference ground, or wherein the second switch transistor and the first switch transistor are sequentially connected in series between the input terminal of the flyback converter and the reference ground.
7. The protection circuit of claim 1, wherein the flyback converter further comprises a second capacitor, and the second capacitor, the second switch transistor, and the first switch transistor are sequentially connected in series between the input terminal of the flyback converter and the reference ground.
11. The protection circuit of claim 1, wherein the flyback converter further comprises a second capacitor, and the second capacitor, the second switch transistor, and the first switch transistor are sequentially connected in series between the input terminal of the flyback converter and the reference ground.
8. The protection circuit of claim 7, wherein when the first switch transistor is turned off, the intermediate node between the first switch transistor and the second switch transistor has floating ground voltage.
12. The protection circuit of claim 11, wherein when the first switch transistor is turned off, an intermediate node between the first switch transistor and the second switch transistor has floating ground voltage.
9. The protection circuit of claim8,further comprising a level conversion circuit for converting the discharge enabling signal from a first level with respect to the reference ground to a second level with respect to the floating ground voltage.
13. The protection circuit of claim 12, further comprising a level conversion circuit for converting the discharge enabling signal from a first level with respect to the reference ground to a second level with respect to the floating ground voltage.
10. The protection circuit of claim 1, further comprising: a discharge control circuit, connected to the active discharge module, and generating the discharge enabling signal of a corresponding effective state according to the work state of the flyback converter.
14. The protection circuit of claim 1, further comprising: a discharge control circuit, connected to the active discharge module, and generating the discharge enabling signal of a corresponding effective state according to the work state of the flyback converter.
11. The protection circuit of claim 10, wherein the discharge control circuit comprises: a detection module, for detecting the work state of the flyback converter, and generating a turning-on signal and a turning-off signal before the flyback converter is restarted; and control logics, for generating the discharge enabling signal according to the turning- on signal and the turning-off signal.
15. The protection circuit of claim 14, wherein the discharge control circuit comprises: a detection module, for detecting the work state of the flyback converter, and generating a turning-on signal and a turning-off signal before the flyback converter is restarted; and control logics, for generating the discharge enabling signal according to the turning-on signal and the turning-off signal.
12. The protection circuit of claim 10, wherein the discharge control circuit comprises: a detection module, for detecting the work state of the flyback converter, and generating a tuning-on signal before the flyback converter is restarted; a time delay module, for starting a delay when the turning-on signal is valid, and generating a turning-off signal when the delay arrives a predetermined time period; and control logics, for generating the discharge enabling signal according to the turning- on signal and the turning-off signal.
16. The protection circuit of claim 14, wherein the discharge control circuit comprises: a detection module, for detecting the work state of the flyback converter, and generating a tuning-on signal before the flyback converter is restarted; a time delay module, for starting a delay when the turning-on signal is valid, and generating a turning-off signal when the delay arrives a predetermined time period; and control logics, for generating the discharge enabling signal according to the turning-on signal and the turning-off signal.
13. The protection circuit of claim 11, wherein the detection module receives a first switch control signal of the first switch transistor and a second switch control signal of the second switch transistor, and generates at least one of the turning-on signal and the turning- off signal according to the first switch control signal and the second switch control signal.
17. The protection circuit of claim 16, wherein the detection module receives a first switch control signal of the first switch transistor and a second switch control signal of the second switch transistor, and generates at least one of the turning-on signal and the turning-off signal according to the first switch control signal and the second switch control signal.
14. The protection circuit of claim 13, wherein the detection module generates the turning-on signal when a duration during which both the first switch control signal and the second switch control signal are in an invalid state exceeds at least one switch cycle.
18. The protection circuit of claim 17, wherein the detection module generates the turning-on signal when a duration during which both the first switch control signal and the second switch control signal are in invalid state exceeds at least one switch cycle.
15. The protection circuit of claim 13, wherein the detection module generates the turning-off signal when it detects a complementary level state of the first switch control signal and the second switch control signal in at least one continuous switch cycle.
19. The protection circuit of claim 17, wherein the detection module generates the turning- off signal when it detects a complementary level state of the first switch control signal and the second switch control signal in at least one continues switch cycle.
18. The protection circuit of claim 11, wherein the detection module receives a system power-on signal or system error signal, and turns on the discharge path in the active discharge module for a predetermined time period before system restart event is finished.
20. The protection circuit of claim 16, wherein the detection module receives a system power- on signal or system error signal, and turns on the discharge path in the active discharge module for a predetermined time period before system restart event is finished.
20. A control method of a flyback converter, the flyback converter comprising a transformer, a first switch transistor and a second switch transistor located at a primary edge of the transformer and connected between an input terminal of the flyback converter and a reference ground, and a first capacitor and a first inductor forming a resonance circuit when the second switch transistor is turned on, and the control method comprising: providing a discharge path between a first current terminal and a second current terminal of the second switch transistor; in a normal work state of the flyback converter, disconnecting the discharge path to make the resonance circuit to work; and before the flyback converter is restarted, turning on the discharge path for a predetermined time period according to the discharge enabling signal to release charges stored in the resonance circuit, so as to reduce a resonance current to a safe work current of the second switch transistor after the flyback converter is restarted.
21. A control method of a flyback converter, wherein the flyback converter comprises a transformer, a first switch transistor and a second switch transistor located at a primary edge of the transformer and connected between an input terminal of the flyback converter and a reference ground, and a first capacitor and a first inductor forming a resonance circuit when the second switch transistor is turned on, and the control method comprises: providing a discharge path at least one end of a first capacitor; in a normal work state of the flyback converter, disconnecting the discharge path according to the discharge enable signal, to allow the first capacitor to work as a resonant capacitor; and before the flyback converter is restarted, releasing charges of the first capacitor through the discharge path for a predetermined time period, and reducing a resonance current after the flyback converter is restarted to a safe work current of the second switch transistor.
21. The control method of claim 20, wherein there is a floating ground voltage at an intermediate node of the first switch transistor and the second switch transistor when the first switch transistor is turned off, the discharge enabling signal is converted from a first level with respect to the reference ground to a second level with respect to the floating ground voltage.
24. The control method of claim 23, further comprising converting the discharge enabling signal from a first level with respect to the reference ground to a second level with respect to the floating ground voltage.
23. The control method of claim 20, wherein a system restart event is confirmed according to a system power-on signal or a system error signal, and the discharge path is turned on for a predetermined time period before the system restart event is finished.
27. The control method of claim 21, wherein system restart event is confirmed according to a system power-on signal or a system error signal, and the discharge path is turned on for a predetermined time period before the system restart event is finished.
Allowable Subject Matter
9. Claims 1-7,10-15, 17 and 19-22 are allowed.
The following is an examiner’s statement of reasons for allowance:
Claim 1 is allowed because the prior art of record fails to disclose or suggest a protection circuit including the limitation of “ before the flyback converter is restarted, the discharge path in the active discharge module is turned on for a predetermined time period to release charges stored in the resonance circuit, and reduces a resonance current after the flyback converter is restarted to a safe work current of the second switch transistor.”
Claim 20 is allowed because the prior art of record fails to disclose or suggest the control method including the limitation of “ before the flyback converter is restarted, turning on the discharge path for a predetermined time period according to the discharge enabling signal to release charges stored in the resonance circuit, so as to reduce a resonance current to a safe work current of the second switch transistor after the flyback converter is restarted.”
Claims 2-7,10-15, 17 and 19 depend from claim 1, thus are also allowed because of their dependency.
Claims 21-22 depend from claim 20, thus are also allowed because of their dependency.
The closes art is CN “113938020” which discloses a protection circuit of a flyback converter (Fig. 5 controller not shown and S3, S4, R1&R2 and Cr2 ), wherein the flyback converter comprises a transformer (T) , a first switch transistor (S1) and a second switch transistor (S2) located at a primary edge of the transformer (Np) and connected between an input terminal (Vin terminal) of the flyback converter and a reference ground (negative terminal of Vin), and a first capacitor (Cr1) and a first inductor (Lr) forming a resonance circuit (LC) when the second switch transistor is turned on (S2) , and the protection circuit comprises:
an active discharge module (S3, S4, R1&R2 and Cr2 ), for providing a discharge path between a first current terminal (drain of S2) and a second current terminal (source of S2) of the second switch transistor (S2), and controlling turning-on and turning-off of the discharge path according to a discharge enabling signal (control terminals of S3-S4 are configured to receive signals to turn on and off), wherein in a normal work state of the flyback converter (see Fig.6).
However, CN “113938020” fails to discloses, before the flyback converter is restarted, the discharge path in the active discharge module is turned on for a predetermined time period to release charges stored in the resonance circuit, and reduces a resonance current after the flyback converter is restarted to a safe work current of the second switch transistor.
Conclusion
10. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Xu “20240429827” present application relates to the technical field of switch power supply, more particularly, to a flyback switch converter and a control circuit thereof.
Yang “20200328669” the present invention generally relates to the field of power electronics, and more particularly to switching converters, and associated control circuits and methods.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SISAY G TIKU whose telephone number is (571)272-6898. The examiner can normally be reached 8:30AM-6:00PM.
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/SISAY G TIKU/
Primary Examiner, Art Unit 2838