DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Summary of the Invention
The invention discloses a phase shifter that includes an orthogonal signal generator producing in-phase (I) and quadrature (Q) signals, and an adder circuit that performs amplitude adjustment, vector composition, and phase compensation to generate a controlled phase-shifted output signal.
A controller automatically adjusts the adder’s amplitude and compensation networks (e.g., π, T, or L-type reactive circuits) based on preset or real-time phase-angle data, eliminating manual multi-channel tuning and reducing phase error.
The system may form part of an amplifier assembly in which transformers and amplifiers isolate and amplify the phase-shifted signal for RF transmission applications.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5, and 7-14 are rejected under 35 U.S.C. 102(a)(1) as being unpatentable over Kang et al. (CN 105207644 B, “Active Phase Shifter Based on Vector Synthesis on Sheet,” filed 16 Sep 2015; published 21 Aug 2018).
Regarding claims 1-5 and 7-14, Kang discloses a phase shifter comprising An orthogonal signal generator connected to an adder (Quadrature (orthogonal) signal generating unit U2 (FIG. 1; p. 4 ll. 30–36) — “generates orthogonal I, Q two signals composed of a low-pass network and a T-type high-pass” The output of U2 is connected to the signal synthesizing unit U5 (p. 4 ll. 36–41)).
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Fig. 1 of Kang annotated by the examiner for ease of reference.
Wherein Adder adjusts amplitude and performs vector composition and phase compensation (Signal synthesizing unit U5 (p. 5 ll. 1–10) “comprising a Gilbert cell circuit … having signal amplifying function of polar selection and signal synthesis.” Further (p. 4 ll. 8–13) — “by rationally selecting the combined signal of the polar and the size thereof so as to obtain an output signal of any phase.” This explicitly teaches amplitude adjustment and vector-additive phase composition.)
Wherein Multiple signal-processing units and adder units (Differential signal generating units U3 and U4 (page 4 ll. 42–47) process and feed their outputs into U5 (page 4, l. 47 – p. 5 l. 3))
Wherein Amplitude-adjustment and phase-compensation units (Power-distribution unit U1 (p. 4 ll. 17–24) performs “gain adjustment and power distribution … outputs two paths of controllable amplitude.” Orthogonal signal generator U2 (p. 4, ll. 31–36) acts as phase compensation via 90° offset)
Wherein Phase-compensation structure π, T or L TYPE (Page 5 ll. 24–29 — “The orthogonal signal generating unit is composed of a T-shaped high-pass network and a Π-type (low-pass) network of inductors and capacitors.”)
Wherein the Phase-compensation unit adjustable with gain/output power (Page 5 ll. 17–24 demonstrates gain-controlled transistors MS1–MS4 used to change signal amplitude and thus effective phase position, satisfying adaptive adjustment.)
Wherein Variable-gain amplifier or differential amplifier (FIG. 2 of Kang shows transistor pairs MA through MS4 forming dielectric-control variable-gain amplifiers; these operate as differential pairs.)
Wherein the First phase-shift signal is differential (Repeated at p. 5 ll. 10–16 — “two groups of differential signals input signal synthesizing unit … the output balun converts the differential signal into a single-end output.”)
Wherein Orthogonal signal comprises multi-channel sub-signals (Fig. 1 and text (p. 4 lines 41 – p. 5 line 3) show four sub-signals, VI+, VI−, VQ+, VQ−).
Amplifier assembly with two transformers and amplifier (Input and output baluns (FIGS. 1, 3, 4; p. 5 ll. 24–34) function as first and second transformers; the active FET amplifier stages (U3–U5) provide the required power conversion)
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Katsube et al. (US 2012/0194265 A1).
Regarding claim 6, Kang et al. (p. 3 ll. 5–8) explicitly teaches use of inductors and capacitors within the phase-compensation network. While switch elements for changing the effective reactance are not literally disclosed. However, page 3 lines 10–17 states that the Gilbert cell uses “switch control circuits … for polar selection and signal combination.”
Katsube in a similar filed of endeavor of switch control circuit for tunable integrated Phase sifter circuit including step-wise tuning of capacitance or inductance values as standard practice in RF integrated-circuit phase shifters.
It would have been obvious to extend such switch control techniques to the reactive elements of the phase network to achieve step-wise tuning of capacitance or inductance values, as is standard practice in RF integrated-circuit phase shifters. The result of such switch-controlled step wise tunable capacitor and inductor is to achieve fine, discrete phase control using switchable LC cells. This would provide predictable yields.
Claims 15 and 16 are Rejected under 35 U.S.C. § 103 as being unpatentable over Kang in view of Common Control-Algorithm Knowledge.
Regarding claims 15-16 Kang et al. (p. 3 ll. 35–38; p. 5 ll. 1–11) discloses the use of electronic control signals to select discrete gain and phase states of the FET branches, thereby controlling the phase shift angle.
However, replacing manual control signals with digital preset controls, look-up table values, or real-time feedback is a routine automation of known analog controls are common knowledge in the art where accuracy, predictability and better controls can be ensured.
Therefore, it would have been obvious to a person of ordinary skill in the art to establish automatic control algorithm and microprocessor for such automation for Kang’s vector modulator. Thus, automatic generation of the control signal based on a desired phase angle would have been an obvious design choice to a skilled RF-IC and vector modulator designer for achieving repeatable and accurate phase settings.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAFIZUR RAHMAN whose telephone number is (571)270-0659. The examiner can normally be reached M-F: 10-6.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Lindgren Baltzell can be reached on (571) 272-1769. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
/HAFIZUR RAHMAN/Primary Examiner, Art Unit 2843.