Prosecution Insights
Last updated: August 17, 2026
Application No. 18/480,249

SEMICONDUCTOR DEVICE MANUFACTURING METHOD, X-RAY DIFFRACTION DEVICE AND SEMICONDUCTOR PATTERN TRANSFER SYSTEM

Non-Final OA §103§112
Filed
Oct 03, 2023
Priority
Jan 05, 2023 — JP 2023-000369
Examiner
BRYANT, MICHAEL CASEY
Art Unit
1724
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Mitsubishi Electric Corporation
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
616 granted / 784 resolved
+13.6% vs TC avg
Strong +17% interview lift
Without
With
+16.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
31 currently pending
Career history
810
Total Applications
across all art units

Statute-Specific Performance

§101
3.2%
-36.8% vs TC avg
§103
45.8%
+5.8% vs TC avg
§102
18.3%
-21.7% vs TC avg
§112
26.5%
-13.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 784 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of Claims Claims 3-6 were elected. Claims 1-2 are withdrawn. Claims 1-6 remain pending. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “control unit” in claims 3 and 5; “transfer unit” in claims 4 and 6; “mark former” in claim 5. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over BEANLAND (US 6977986 B1) in view of HARA (US 20160211218 A1). Regarding claim 3, BEANLAND discloses an X-ray diffraction device, comprising: an X-ray source 110 that radiates an X-ray 170 to a semiconductor wafer 190 held on a check (col. 5, ll. 18-27, 57-65); an X-ray detector 160 that detects an intensity of a diffracted X-ray of said X-ray coming from the semiconductor wafer (detector 160 measures Bragg diffraction; col. 4, ll. 38-40, 57-68; col. 4, ll. 8-16); and a control unit 50 that causes the X-ray source to radiate the X-ray and the X-ray detector to detect the intensity of the diffracted X-ray, to thereby determine a direction of a predetermined crystal plane of the semiconductor wafer, viewed from a direction perpendicular to a surface of the semiconductor wafer (wafer alignment control unit 50 is incorporated into computer, and controls the source 110 and detector 160 to determine the crystal-plane orientation by monitoring the x-ray pulse rate I1 from the detector and rotating the wafer via chuck actuator unit 45 until the rate is maximized, a max occurring when the crystal planes are aligned to the diffraction tool; col. 5, ll. 1-6; col. 6, ll. 46-56; col. 3, ll. 15-20). BEANLAND does not disclose two alignment marks formed on the wafer, nor calculating an angle Ɵ created between the direction of the predetermined crystal plane and a straight line connecting said two alignment marks. PNG media_image1.png 598 772 media_image1.png Greyscale Fig 1 of BEANLAND shows the XRD crystallography apparatus 10. In the same field of endeavor, HARA discloses a system and method of forming crystal-orientation marks on a semiconductor substrate for precision alignment. HARA discloses laser-etching a marking region for crystal-orientation detection at two locations on the substrate, by which the in-plane crystal axis is determined, thereby providing a fixed alignment between two marks for precision alignment ([0013, 0021-0022]). In light of the teachings of HARA, it would have been obvious to one of ordinary skill in the art at the time of filing to combine with the teachings of BEANLAND. PNG media_image2.png 344 426 media_image2.png Greyscale Fig. 1 of HARA shows a straight-line region marked on a wafer indicating crystal alignment. Regarding claim 4, BEANLAND discloses the transfer unit configured to: after the crystal planes are aligned, the lithographic too l20 transfers the pattern onto the wafer 190 by activating the exposure source 25 to illuminate the mask 35 (col. 6, ll. 56-65), the wafer having been rotated to align the crystal planes to the pattern (col. 6, ll. 46-56). It would have been obvious, in the BEANLAND-HARA combination, to adjust the wafer position so that the angle between the predetermined reference direction and the straight line connecting the two marks matches Ɵ, for the reasons provided in claim 3. Regarding claim 5, BEANLAND discloses an X-ray diffraction device 10 (FIG 1), comprising: an X-ray source 110 that radiates an X-ray 170 to a semiconductor wafer 190 (col. 5, ll. 18-27, 57-65); an X-ray detector 160 that detects an intensity of a diffracted X-ray of said X-ray coming from the semiconductor wafer (detector 160 measures Bragg diffraction; col. 4, ll. 38-40, 57-68; col. 4, ll. 8-16); and a control unit 50 that causes the X-ray source to radiate the X-ray and the X-ray detector to detect the intensity of the diffracted X-ray, to thereby determine a direction of a predetermined crystal plane of the semiconductor wafer, viewed from a direction perpendicular to a surface of the semiconductor wafer (col. 5, ll. 1-6; col. 6, ll. 46-56; col. 3, ll. 15-20). BEANLAND does not disclose a mark former configured to form two alignment marks on the wafer, nor wherein the control unit is further configured for calculating an angle Ɵ created between the direction of the predetermined crystal plane and a straight line connecting said two alignment marks. In the same field of endeavor, HARA discloses a system and method of forming crystal-orientation marks on a semiconductor substrate for precision alignment. HARA discloses laser-etching a marking region for crystal-orientation detection at two locations on the substrate, by which the in-plane crystal axis is determined, thereby providing a fixed alignment between two marks for precision alignment ([0013, 0021-0022]). In light of the teachings of HARA, it would have been obvious to one of ordinary skill in the art at the time of filing to combine with the teachings of BEANLAND. Regarding claim 6, BEANLAND discloses the transfer unit configured to: after the crystal planes are aligned, the lithographic too l20 transfers the pattern onto the wafer 190 by activating the exposure source 25 to illuminate the mask 35 (col. 6, ll. 56-65), the wafer having been rotated to align the crystal planes to the pattern (col. 6, ll. 46-56). It would have been obvious, in the BEANLAND-HARA combination, to adjust the wafer position so that the angle between the predetermined reference direction and the straight line connecting the two marks matches Ɵ, for the reasons provided in claim 3. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CASEY BRYANT whose telephone number is (571)270-7329. The examiner can normally be reached M-F // 7-3P EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, UZMA ALAM can be reached at 571-272-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. CASEY BRYANT Primary Examiner Art Unit 2884 /CASEY BRYANT/Primary Examiner, Art Unit 2884
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Prosecution Timeline

Oct 03, 2023
Application Filed
Jul 17, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
95%
With Interview (+16.8%)
2y 6m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 784 resolved cases by this examiner. Grant probability derived from career allowance rate.

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