DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 08/17/2026 has been entered.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 2 and 15 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Van der Wiel et al. US 2023/0386752.
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Van der Wiel et al. US 2023/0386752
Regarding claim 1, Van der Wiel et al. in Figs 11-12 and [0133] disclose a capacitor structure 100 comprising a moat capacitor (annotated above) embedded in a substrate 110, the moat capacitor includes:
a bottom electrode plate 112;
a dielectric layer 120 directly above and lining the bottom electrode plate 112; and
a top electrode plate 130 directly above and lining the dielectric layer 120 (e.g. lining or covering 120 within the trench 131),
wherein the bottom electrode plate 112, the dielectric layer 120, and the top electrode plate 130 have encircling shapes and are arranged to be concentric with one another in a top view thereof, Fig. 11 and [0104].
Regarding claim 2, Van der Wiel et al. in Figs 11-12 and [0133] disclose the capacitor structure of claim 1, wherein the top electrode plate 130 has a U-shaped cross-section;
the dielectric layer 120 surrounds a bottom and sides of the top electrode plate 130; and
the bottom electrode plate 112 surrounds a bottom and sides of the dielectric layer 120.
Regarding claim 15, Van der Wiel et al. in Figs 11-12 and [0133] disclose a capacitor structure 100 comprising a moat capacitor (annotated above) the moat capacitor includes:
a bottom electrode plate 112 formed in an encircling shape in a top view thereof;
a dielectric layer 120 directly above and formed along the bottom electrode plate 112; and
a top electrode plate 130 directly above and formed along the dielectric layer 120.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 5, 6 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Van der Wiel et al.
Regarding claim 5, Van der Wiel et al. in Figs 11-12 and [0133] disclose the capacitor structure of claim 1, wherein the encircling shape of the dielectric layer 120 is a square shape Fig. 6 and [0117]-[0123] and the moat capacitor has a length and a width [0105] but do not expressly disclose, wherein the length is at least 10 times larger than the width.
Notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization. Applicant has not disclosed that the relative dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, Jn re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See also MPEP 2144.04(1V)(B).
Regarding claim 6, Van der Wiel et al. in Figs 11-12 and [0133] disclose the capacitor structure of claim 1, wherein the dielectric layer 120 has a U-shaped cross-section and the moat capacitor has a depth and a width [0105] but do not expressly disclose wherein the depth is at least 25 times larger than the width.
Notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization. Applicant has not disclosed that the relative dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, Jn re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See also MPEP 2144.04(1V)(B).
Regarding claim 18, Van der Wiel et al. in Figs 11-12 and [0133] disclose the capacitor structure of claim 15, wherein the moat capacitor has a square shape and a length, a width, and a depth, Fig. 6 and [0117]-[0123] but do not expressly disclose, wherein the length is at least 10 times larger than the width and the depth is at least 25 times larger than the width.
Notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization. Applicant has not disclosed that the relative dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, Jn re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See also MPEP 2144.04(1V)(B).
Allowable Subject Matter
Claims 3-4, 7-9, 16-17, and 19-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the prior art neither anticipates nor renders obvious in the context of the claims,
Regarding claim 3, the capacitor structure of claim 2, wherein the moat capacitor further includes a filler layer on top of the top electrode plate, the filler layer filling a space between an inner edge and an outer edge of the top electrode plate.
Regarding claim 4, the capacitor structure of claim 1, further comprising a capping layer above the substrate and the moat capacitor, a first set of contacts embedded in the capping layer in contact with the top electrode plate and a second and a third set of contacts embedded in the capping layer in contact with an inner edge and an outer edge respectively of the bottom electrode plate.
Regarding claim 7, the capacitor structure of claim 1, wherein the moat capacitor is a first moat capacitor, further comprising a second moat capacitor nested inside the first moat capacitor, wherein the second moat capacitor has a bottom electrode plate that merges with the bottom electrode plate of the first moat capacitor.
Regarding claim 8, the capacitor structure of claim 1, further comprising an isolation trench embedded in the substrate, wherein the isolation trench encircles the moat capacitor. Claim 9 depends from claim 8.
Regarding claim 16, the capacitor structure of claim 15, wherein the moat capacitor further includes a filler layer on top of the top electrode plate, filling a space between an inner edge and an outer edge of the top electrode plate, and a landing pad above the filler layer and in contact with the inner edge and the outer edge of the top electrode plate.
Regarding claim 17, the capacitor structure of claim 16, further comprising a first set of contacts in contact with the top electrode plate via the landing pad, and a second and a third set of contacts in contact with an inner edge and an outer edge respectively of the bottom electrode plate.
Regarding claim 19, the capacitor structure of claim 15, wherein the moat capacitor is a first moat capacitor, further comprising a second moat capacitor nested inside the first moat capacitor, wherein the second moat capacitor has a bottom electrode plate that merges with the bottom electrode plate of the first moat capacitor.
Regarding claim 20, the capacitor structure of claim 15, further comprising an isolation trench embedded in a substrate, wherein the isolation trench encircles the moat capacitor.
Although various prior art references disclose several individual limitations in the claims, these references, and their combinations, neither anticipate nor render obvious the above identified limitation(s), as structured and interrelated in the context of the claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SONYA D MCCALL-SHEPARD whose telephone number is (571)272-9801. The examiner can normally be reached M-F: 8:30 AM-5:00 PM.
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/Sonya McCall-Shepard/Primary Examiner, Art Unit 2898